ONSEMI MC74AC132N

MC74AC132, MC74ACT132
Quad 2−Input NAND Schmitt
Trigger
The MC74AC/74ACT132 contains four 2−input NAND gates
which are capable of transforming slowly changing input signals into
sharply defined, jitter−free output signals. In addition, they have
greater noise margin than conventional NAND gates.
Each circuit contains a 2−input Schmitt trigger. The Schmitt trigger
uses positive feedback to effectively speed−up slow input transitions,
and provide different input threshold voltages for positive and
negative-going transitions. This hysteresis between the positive−going
and negative−going input threshold is determined by resistor ratios
and is essentially insensitive to temperature and supply voltage
variations.
Features
•
•
•
•
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PDIP−14
N SUFFIX
CASE 646
14
1
SOIC−14
D SUFFIX
CASE 751A
14
1
Schmitt Trigger Inputs
Outputs Source/Sink 24 mA
′ACT132 Has TTL Compatible Inputs
Pb−Free Packages are Available
14
1
VCC
14
13
12
11
10
9
SOEIAJ−14
M SUFFIX
CASE 965
8
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1
2
3
4
5
6
7
GND
Figure 1. Pinout; 14−Lead Packages Conductors
(Top View)
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
H
L
H
L
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 7
1
Publication Order Number:
MC74AC132/D
MC74AC132, MC74ACT132
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Supply Voltage
Vin, Vout
DC Input Voltage, Output Voltage (Ref. to GND)
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
Min
Typ
Max
Unit
′AC
2.0
5.0
6.0
′ACT
4.5
5.0
5.5
0
−
VCC
VCC @ 3.0 V
−
150
−
VCC @ 4.5 V
−
40
−
VCC @ 5.5 V
−
25
−
VCC @ 4.5 V
−
10
−
VCC @ 5.5 V
−
8.0
−
−
−
140
°C
−40
25
85
°C
V
V
ns/V
tr, tf
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
TJ
Junction Temperature (PDIP)
TA
Operating Ambient Temperature Range
IOH
Output Current − High
−
−
−24
mA
IOL
Output Current − Low
−
−
24
mA
ns/V
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
DC CHARACTERISTICS
Symbol
VOH
VOL
Parameter
Minimum High Level
Output Voltage
Maximum Low Level
Output Voltage
IIN
Maximum Input
Leakage Current
IOLD
†Minimum Dynamic
Output Current
IOHD
ICC
Maximum Quiescent
Supply Current
VCC
(V)
74AC
74AC
TA = +25°C
TA =
−40°C to
+85°C
Typ
Guaranteed Limits
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
3.0
4.5
5.5
0.002
0.001
0.001
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
5.5
−
±0.1
5.5
−
5.5
−
−
5.5
Unit
V
V
IOUT = −50 mA
*VIN = VIL or VIH
−12 mA
IOH
−24 mA
−24 mA
IOUT = 50 mA
V
*VIN = VIL or VIH
12 mA
IOL
24 mA
24 mA
±1.0
mA
VI = VCC, GND
−
75
mA
VOLD = 1.65 V Max
−
−75
mA
VOHD = 3.85 V Min
4.0
40
mA
VIN = VCC or GND
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
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2
V
Conditions
MC74AC132, MC74ACT132
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
VCC*
(V)
Parameter
74AC
74AC
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
3.3
5.0
2.0
2.0
−
−
13.0
9.0
1.5
1.5
14.0
10.0
ns
3−5
tPHL
Propagation Delay
3.3
5.0
2.0
2.0
−
−
13.5
9.0
1.5
1.5
15.0
10.0
ns
3−5
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
DC CHARACTERISTICS
Symbol
VOH
VOL
Parameter
Minimum High Level
Output Voltage
Maximum Low Level
Output Voltage
VCC
(V)
74ACT
74ACT
TA = +25°C
TA =
−40°C to
+85°C
Unit
Conditions
Typ
Guaranteed Limits
4.5
5.5
4.49
5.49
4.4
5.4
4.4
5.4
4.5
5.5
−
−
3.86
4.86
3.76
4.76
4.5
5.5
0.001
0.001
0.1
0.1
0.1
0.1
4.5
5.5
−
−
0.36
0.36
0.44
0.44
V
*VIN = VIL or VIH
24 mA
IOL
24 mA
IOUT = −50 mA
V
*VIN = VIL or VIH
−24 mA
IOH
−24 mA
V
IOUT = 50 mA
V
IIN
Maximum Input
Leakage Current
5.5
−
±0.1
±1.0
mA
VI = VCC, GND
DICCT
Additional Max. ICC/Input
5.5
0.6
−
1.5
mA
VI = VCC − 2.1 V
IOLD
†Minimum Dynamic
Output Current
5.5
−
−
75
mA
VOLD = 1.65 V Max
5.5
−
−
−75
mA
VOHD = 3.85 V Min
5.5
−
4.0
40
mA
VIN = VCC or GND
IOHD
ICC
Maximum Quiescent
Supply Current
*All outputs loaded; thresholds on input associated with output under test.
†Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
Symbol
VCC*
(V)
Parameter
74ACT
74ACT
TA = +25°C
CL = 50 pF
TA = −40°C
to +85°C
CL = 50 pF
Min
Typ
Max
Min
Max
Unit
Fig.
No.
tPLH
Propagation Delay
5.0
3.0
−
11.5
2.5
13.0
ns
3−6
tPHL
Propagation Delay
5.0
3.0
−
11.0
2.5
12.5
ns
3−5
*Voltage Range 5.0 V is 5.0 V ±0.5 V.
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3
MC74AC132, MC74ACT132
INPUT CHARACTERISTICS (unless otherwise specified)
Symbol
Parameter
VCC
(V)
74AC
74ACT
Unit
Test Conditions
Vt +
Maximum Positive
Threshold
3.0
4.5
5.5
2.2
3.2
3.9
2.0
V
TA = Worst Case
Vt −
Minimum Negative
Threshold
3.0
4.5
5.5
0.5
0.9
1.1
0.8
V
TA = Worst Case
Vh(max)
Maximum Hysteresis
3.0
4.5
5.5
1.2
1.4
1.6
1.2
V
TA = Worst Case
Vh(min)
Minimum Hysteresis
3.0
4.5
5.5
0.3
0.4
0.5
0.4
V
TA = Worst Case
CAPACITANCE
Symbol
Parameter
Value
Typ
Unit
Test Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
30
pF
VCC = 5.0 V
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4
MC74AC132, MC74ACT132
MARKING DIAGRAMS
PDIP−14
14
SOIC−14
14
14
MC74AC132N
AWLYYWWG
1
14
74AC132
ALYWG
AC132G
AWLYWW
1
1
14
14
74ACT132
ALYWG
ACT132G
AWLYWW
MC74ACT132N
AWLYYWWG
1
SOEIAJ−14
1
1
A
WL, L
YY, Y
WW, W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
Package
MC74AC132N
PDIP−14
MC74AC132NG
PDIP−14
(Pb−Free)
MC74ACT132N
PDIP−14
MC74ACT132NG
PDIP−14
(Pb−Free)
MC74AC132D
SOIC−14
MC74AC132DG
SOIC−14
(Pb−Free)
MC74AC132DR2
SOIC−14
MC74AC132DR2G
SOIC−14
(Pb−Free)
MC74ACT132D
SOIC−14
MC74ACT132DG
SOIC−14
(Pb−Free)
MC74ACT132DR2
SOIC−14
MC74ACT132DR2G
SOIC−14
(Pb−Free)
MC74AC132MEL
SOEIAJ−14
MC74AC132MELG
SOEIAJ−14
(Pb−Free)
MC74ACT132MEL
SOEIAJ−14
MC74ACT132MELG
SOEIAJ−14
(Pb−Free)
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5
Shipping†
25 Units/Rail
55 Units/Rail
2500/Tape & Reel
55 Units/Rail
2500/Tape & Reel
2000/Tape & Reel
MC74AC132, MC74ACT132
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
14
8
1
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
B
A
F
L
N
C
−T−
SEATING
PLANE
H
G
D 14 PL
J
K
0.13 (0.005)
M
M
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6
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
−−−
10 _
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
−−−
10 _
0.38
1.01
MC74AC132, MC74ACT132
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE H
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
7
1
G
−T−
D 14 PL
0.25 (0.010)
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
M
F
R X 45 _
C
SEATING
PLANE
B
M
S
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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7
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
MC74AC132, MC74ACT132
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE A
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
LE
8
Q1
E HE
M_
L
7
1
DETAIL P
Z
D
VIEW P
A
e
A1
b
0.13 (0.005)
c
M
0.10 (0.004)
DIM
A
A1
b
c
D
E
e
HE
0.50
LE
M
Q1
Z
MILLIMETERS
MIN
MAX
−−−
2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
−−−
1.42
INCHES
MIN
MAX
−−− 0.081
0.002
0.008
0.014
0.020
0.004
0.008
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
−−− 0.056
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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8
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For additional information, please contact your local
Sales Representative
MC74AC132/D