NTMS4177P Power MOSFET -30 V, -11.4 A, P-Channel, SOIC-8 Features •Low RDS(on) to Minimize Conduction Losses •Low Capacitance to Minimize Driver Losses •Optimized Gate Charge to Minimize Switching Losses •SOIC-8 Surface Mount Package Saves Board Space •This is a Pb-Free Device http://onsemi.com RDS(on) Max V(BR)DSS ID Max 12 mW @ -10 V -30 V -11.4 A Applications 19 mW @ -4.5 V •Load Switches •Notebook PC's •Desktop PC's P-Channel D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Rating Drain-to-Source Voltage Gate-to-Source Voltage Symbol Value Unit VDSS -30 V VGS ±20 V ID -8.9 A Continuous Drain Current RqJA (Note 1) TA = 25°C Power Dissipation RqJA (Note 1) TA = 25°C PD 1.52 W Continuous Drain Current RqJA (Note 2) TA = 25°C ID -6.6 A Power Dissipation RqJA (Note 2) TA = 70°C Steady State -7.1 TA = 70°C PD 0.84 W Continuous Drain Current RqJA t < 10 s (Note 1) TA = 25°C ID -11.4 A Power Dissipation RqJA t < 10 s (Note 1) TA = 25°C TA = 70°C -9.3 2.5 W IDM -46 A TJ, TSTG -55 to +150 °C IS -2.1 A Single Pulse Drain-to-Source Avalanche Energy TJ = 25°C, VDD = 30 V, VGS = 10 V, IL = 20 Apk, L = 1.0 mH, RG = 25 W EAS 200 mJ Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) TL 260 °C Operating Junction and Storage Temperature Source Current (Body Diode) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 inch sq pad size, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. © Semiconductor Components Industries, LLC, 2008 March, 2008 - Rev. 0 MARKING DIAGRAM & PIN ASSIGNMENT D D D D 8 1 4177P AYWW G SOIC-8 CASE 751 STYLE 12 8 1 PD TA = 25°C, tp = 10 ms S -5.3 TA = 25°C Pulsed Drain Current G 1 S S S G 4177P A Y WW G = Device Code = Assembly Location = Year = Work Week = Pb-Free Package ORDERING INFORMATION Device Package Shipping† NTMS4177PR2G SOIC-8 (Pb-Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTMS4177P/D NTMS4177P THERMAL RESISTANCE RATINGS Rating Symbol Max Junction-to-Ambient – Steady State (Note 3) RqJA 82 Junction-to-Ambient – t≤10 s (Note 3) RqJA 50 Junction-to-FOOT (Drain) RqJF 20 Junction-to-Ambient – Steady State (Note 4) RqJA 148 Unit °C/W 3. Surface-mounted on FR4 board using 1 inch sq pad size, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)jk Characteristic Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = -250 mA -30 Typ Max Unit OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Tem‐ perature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current V(BR)DSS/TJ IDSS V 29 VGS = 0 V, VDS = -24 V mV/°C TJ = 25°C -1.0 TJ = 85°C -5.0 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = -250 mA mA ±100 nA -2.5 V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coeffi‐ cient Drain-to-Source On Resistance Forward Transconductance VGS(TH)/TJ -1.5 6.0 RDS(on) gFS mV/°C VGS = -10 V ID = -11.4 A 10 12 VGS = -4.5 V ID = -9.1 A 15 19 VDS = -1.5 V ID = -11.4 A 30 mW S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Total Gate Charge QG(TOT) Threshold Gate Charge QG(TH) Gate-to-Source Charge QGS Gate-to-Drain Charge Total Gate Charge Gate Resistance 3100 VGS = 0 V, f = 1.0 MHz, VDS = -24 V pF 370 29 VGS = -4.5 V, VDS = -15 V, ID = -11.4 A QGD QG(TOT) 550 3.3 nC 10 13 VGS = -10 V, VDS = -15 V, ID = -11.4 A, 55 RG 2.0 td(ON) 18 nC 4.0 W SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time tr td(OFF) VGS = -10 V, VDD = -15 V, ID = -1.0 A, RG = 6.0 W tf 13 ns 64 36 DRAIN-TO-SOURCE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time tRR Charge Time Ta Discharge Time Reverse Recovery Time Tb VGS = 0 V ID = -2.1 A TJ = 25°C -0.73 TJ = 125°C 0.54 34 VGS = 0 V, dIS/dt = 100 A/ms, IS = -2.1 A QRR 18 http://onsemi.com 2 V ns 16 30 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. -1.0 nC NTMS4177P TYPICAL PERFORMANCE CURVES -10V 20 TJ = 25°C -5 V -3.4 V -4.5 V 18 -ID, DRAIN CURRENT (AMPS) -ID, DRAIN CURRENT (AMPS) 22 -4.2 V 16 -4 V -3.8 V -3.6 V 14 12 -3.2 V 10 8 -3.0 V 6 4 -2.8 V 2 -2.6 V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 16 14 12 10 8 6 TJ = 25°C 2 TJ = -55°C 5.0 2.0 3.0 2.5 3.5 4.0 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics TJ = 25°C ID = -11.4 A 0.04 0.03 0.02 0.01 2 4 6 8 10 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 0.016 TJ = 25°C 0.014 VGS = -4.5 V 0.012 0.010 VGS = -10 V 0.008 0.006 2 4 6 8 10 12 14 16 18 20 22 -ID, DRAIN CURRENT (AMPS) Figure 4. On-Resistance vs. Drain Current and Gate Voltage Figure 3. On-Resistance vs. Gate-to-Source Voltage 10000 1.6 VGS = 0 V ID = -11.4 A VGS = -10 V 1.4 -IDSS, LEAKAGE (nA) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) TJ = 125°C 4 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 0.05 0 18 0 1.5 RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0 22 20 VDS ≥ 10 V 1.2 1.0 TJ = 150°C 1000 TJ = 125°C 0.8 0.6 -50 100 -25 0 25 50 75 100 125 150 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Voltage http://onsemi.com 3 30 NTMS4177P TYPICAL PERFORMANCE CURVES -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 3500 C, CAPACITANCE (pF) VGS = 0 V Ciss 3000 2500 2000 1500 Coss 1000 500 Crss 0 9 16 VDS 7 12 10 QGD QGS 4 8 6 3 4 2 ID = -11.4 A TJ = 25°C 1 0 0 10 20 30 40 50 QG, TOTAL GATE CHARGE (nC) 2 0 60 Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge -IS, SOURCE CURRENT (AMPS) 4 VDD = -15 V ID = -1 A VGS = -10 V td(off) tf 100 t, TIME (ns) 14 5 1000 tr td(on) 10 1 10 2 1 0.6 0.7 0.8 0.9 Figure 9. Resistive Switching Time Variation vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current 100 ms 1 ms 10 ms 1 VGS = -20 V SINGLE PULSE TC = 25°C dc RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 100 EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) -VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) 10 0.01 0.1 3 RG, GATE RESISTANCE (OHMS) 10 ms 0.1 VGS = 0 V TJ = 25°C 0 0.5 100 100 -ID, DRAIN CURRENT (AMPS) VGS 6 Figure 7. Capacitance Variation 1 18 8 30 15 25 5 10 20 DRAIN-TO-SOURCE VOLTAGE (VOLTS) QT -VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS) TJ = 25°C 4000 0 20 10 4500 200 ID = -20 A 175 150 125 100 75 50 25 0 25 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 150 NTMS4177P PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE AJ NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. -XA 8 5 S B 0.25 (0.010) M Y M 1 4 K -YG C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE -Z- 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J SOLDERING FOOTPRINT* S INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN 1.52 0.060 7.0 0.275 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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