MC10EP35 JK Flip Flop The MC10EP35 is a higher speed/low voltage version of the EL35 JK flip flop. The J/K data enters the master portion of the flip flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH. • • • • • • • • • • • 300ps Propagation Delay High Bandwidth to 3 GHz Typical High Bandwidth Output Transistors PECL mode: 3.0V to 5.5V VCC with VEE = 0V ECL mode: 0V VCC with VEE = –3.0V to –5.5V 75kW Internal Input Pulldown Resistors Q Output will default LOW with inputs open or at VEE ESD Protection: >4KV HBM, >200V MM Moisture Sensitivity Level 1, Indefinite Time Out of Drypack. For Additional Information, See Application Note AND8003/D Flammability Rating: UL–94 code V–0 @ 1/8”, Oxygen Index 28 to 34 Transistor Count = 77 devices http://onsemi.com 8 1 SO–8 D SUFFIX CASE 751 MARKING DIAGRAM 8 A L Y W HEP35 ALYW = Assembly Location = Wafer Lot = Year = Work Week 1 J 1 8 J *For additional information, see Application Note AND8002/D VCC PIN DESCRIPTION PIN K 2 7 K CLK 3 CLK ECL Clock Inputs J, K ECL Signal Inputs RESET ECL Asynchronous Reset Q, Q ECL Data Outputs Q Flip Flop 6 Q 5 VEE FUNCTION R RESET 4 TRUTH TABLE Figure 1. 8–Lead Pinout (Top View) and Logic Diagram J K RESET CLK Qn+1 L L H H X L H L H X L L L L H Z Z Z Z X Qn L H Qn L Z = LOW to HIGH Transition ORDERING INFORMATION Device Semiconductor Components Industries, LLC, 1999 September, 1999 – Rev. 1.0 1 Package Shipping MC10EP35D SOIC 98 Units/Rail MC10EP35DR2 SOIC 2500 Tape & Reel Publication Order Number: MC10EP35/D MC10EP35 MAXIMUM RATINGS* Value Unit VEE Symbol Power Supply (VCC = 0V) Parameter –6.0 to 0 VDC VCC Power Supply (VEE = 0V) 6.0 to 0 VDC VI Input Voltage (VCC = 0V, VI not more negative than VEE) –6.0 to 0 VDC VI Input Voltage (VEE = 0V, VI not more positive than VCC) 6.0 to 0 VDC Iout Output Current 50 100 mA TA Operating Temperature Range –40 to +85 °C Tstg Storage Temperature –65 to +150 °C θJA Thermal Resistance (Junction–to–Ambient) 190 130 °C/W θJC Thermal Resistance (Junction–to–Case) 41 to 44 ± 5% °C/W Tsol Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C Continuous Surge Still Air 500lfpm * Maximum Ratings are those values beyond which damage to the device may occur. DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = –5.5V to –3.0V) (Note 3.) –40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit IEE Power Supply Current (Note 1.) 30 40 50 30 40 50 30 40 50 mA VOH Output HIGH Voltage (Note 2.) –1135 –1060 –885 –1070 –945 –820 –1010 –885 –760 mV VOL Output LOW Voltage (Note 2.) –1935 –1810 –1685 –1870 –1745 –1620 –1810 –1685 –1560 mV VIH Input HIGH Voltage Single Ended –1210 –885 –1145 –820 –1085 –760 mV VIL Input LOW Voltage Single Ended –1935 –1610 –1870 –1545 –1810 –1485 mV IIH Input HIGH Current 150 µA 150 150 IIL Input LOW Current 0.5 0.5 0.5 µA NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 1. VCC = 0V, VEE = VEEmin to VEEmax, all other pins floating. 2. All loading with 50 ohms to VCC–2.0 volts. 3. Input and output parameters vary 1:1 with VCC. http://onsemi.com 2 MC10EP35 DC CHARACTERISTICS, LVPECL (VCC = 3.3V ± 0.3V, VEE = 0V) (Note 6.) –40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit IEE Power Supply Current (Note 4.) 30 40 50 30 40 50 30 40 50 mA VOH Output HIGH Voltage (Note 5.) 2165 2240 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 5.) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV VIH Input HIGH Voltage Single Ended 2090 2415 2155 2480 2215 2540 mV VIL Input LOW Voltage Single Ended 1365 1690 1430 1755 1490 1815 mV IIH Input HIGH Current 150 µA 150 150 IIL Input LOW Current 0.5 0.5 0.5 µA NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 4. VCC = 3.3V, VEE = 0V, all other pins floating. 5. All loading with 50 ohms to VCC–2.0 volts. 6. Input and output parameters vary 1:1 with VCC. DC CHARACTERISTICS, PECL (VCC = 5.0V ± 0.5V, VEE = 0V) (Note 9.) –40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit IEE Power Supply Current (Note 7.) 30 40 50 30 40 50 30 40 50 mA VOH Output HIGH Voltage (Note 8.) 3865 3940 4115 3930 4055 4180 3990 4115 4240 mV VOL Output LOW Voltage (Note 8.) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV VIH Input HIGH Voltage Single Ended 3790 4115 3855 4180 3915 4240 mV VIL Input LOW Voltage Single Ended 3065 3390 3130 3455 3190 3515 mV IIH Input HIGH Current 150 µA 150 150 IIL Input LOW Current 0.5 0.5 0.5 µA NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained. 7. VCC = 5.0V, VEE = 0V, all other pins floating. 8. All loading with 50 ohms to VCC–2.0 volts. 9. Input and output parameters vary 1:1 with VCC. http://onsemi.com 3 MC10EP35 AC CHARACTERISTICS (VCC = 0V; VEE = –3.0V to –5.5V) or (VCC = 3.0V to 5.5V; VEE = 0V) –40°C Symbol Characteristic Min Typ fmax Maximum Toggle Frequency (Note 10.) tPLH, tPHL Propagation Delay to Output Diff. R, CLK–>Q, Q tRR Set/Reset Recovery tS tH Setup Time Hold Time tSKEW Duty Cycle Skew (Note 11.) Skew Part–to–Part TBD TBD tPW Minimum Pulse Width CLK, RESET Cycle–to–Cycle Jitter tJITTER 25°C Max Min 3.0 Typ 85°C Max Min 3.0 Typ Max 3.0 Unit GHz ps 150 300 450 170 TBD 150 200 320 470 180 TBD 330 480 TBD ps 0 100 ps TBD TBD TBD TBD ps 400 400 400 TBD TBD TBD 0 100 150 200 0 100 150 200 ps ps tr Output Rise/Fall Times ps tf (20% – 80%) Q, Q 50 110 180 60 120 200 70 140 220 10. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only. 11. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. http://onsemi.com 4 MC10EP35 PACKAGE DIMENSIONS SO–8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751–06 ISSUE T D A 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETER. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. C 5 0.25 H E M B M 1 4 h B e X 45 _ q A C SEATING PLANE L 0.10 A1 B 0.25 M C B S A S DIM A A1 B C D E e H h L q http://onsemi.com 5 MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ MC10EP35 Notes http://onsemi.com 6 MC10EP35 Notes http://onsemi.com 7 MC10EP35 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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