NE5517, NE5517A, AU5517 Dual Operational Transconductance Amplifier The AU5517 and NE5517 contain two current-controlled transconductance amplifiers, each with a differential input and push-pull output. The AU5517/NE5517 offers significant design and performance advantages over similar devices for all types of programmable gain applications. Circuit performance is enhanced through the use of linearizing diodes at the inputs which enable a 10 dB signal-to-noise improvement referenced to 0.5% THD. The AU5517/NE5517 is suited for a wide variety of industrial and consumer applications. Constant impedance of the buffers on the chip allow general use of the AU5517/NE5517. These buffers are made of Darlington transistors and a biasing network that virtually eliminate the change of offset voltage due to a burst in the bias current IABC, hence eliminating the audible noise that could otherwise be heard in high quality audio applications. http://onsemi.com MARKING DIAGRAMS 1 SOIC−16 D SUFFIX CASE 751B xx5517DG AWLYWW 1 Features • • • • • • Constant Impedance Buffers DVBE of Buffer is Constant with Amplifier IBIAS Change Excellent Matching Between Amplifiers Linearizing Diodes High Output Signal-to-Noise Ratio Pb−Free Packages are Available* 1 NE5517yy AWLYYWWG 1 xx yy A WL YY, Y WW G Applications • • • • • • PDIP−16 N SUFFIX CASE 648 Multiplexers Timers Electronic Music Synthesizers Dolby® HX Systems Current-Controlled Amplifiers, Filters Current-Controlled Oscillators, Impedances = AU or NE = AN or N = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS N, D Packages IABCa 1 16 IABCb Da 2 15 Db +INa 3 14 +INb −INa 4 13 −INb VOa 5 12 VOb V− 6 11 V+ 7 10 INBUFFERb VOBUFFERa 8 9 VOBUFFERb INBUFFERa (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 April, 2006 − Rev. 3 1 Publication Order Number: NE5517/D NE5517, NE5517A, AU5517 PIN DESCRIPTION Pin No. Symbol 1 IABCa Description Amplifier Bias Input A 2 Da 3 +INa Diode Bias A Non-inverted Input A 4 −INa Inverted Input A 5 VOa Output A 6 V− 7 INBUFFERa Buffer Input A 8 VOBUFFERa Buffer Output A Negative Supply 9 VOBUFFERb Buffer Output B 10 INBUFFERb Buffer Input B 11 V+ 12 VOb Output B 13 −INb Inverted Input B 14 +INb Non-inverted Input B Positive Supply 15 Db 16 IABCb Diode Bias B Amplifier Bias Input B V+ 11 D4 D6 Q14 Q6 Q10 Q12 Q13 7,10 8,9 Q7 Q11 2,15 VOUTPUT D3 D2 Q4 −INPUT 4,13 Q5 5,12 +INPUT 3,14 Q15 1,16 AMP BIAS INPUT Q16 Q3 Q2 D7 Q9 R1 Q1 D8 Q8 D1 D5 V− 6 Figure 1. Circuit Schematic http://onsemi.com 2 NE5517, NE5517A, AU5517 B AMP BIAS INPUT B DIODE BIAS B INPUT (+) B INPUT (−) 16 15 14 13 B OUTPUT B BUFFER INPUT V+ (1) B BUFFER OUTPUT 12 11 10 9 5 6 7 8 − B + + A − 1 2 AMP BIAS INPUT A NOTE: DIODE BIAS A 3 4 INPUT (+) A INPUT (−) A OUTPUT A V− BUFFER INPUT A BUFFER OUTPUT A V+ of output buffers and amplifiers are internally connected. Figure 2. Connection Diagram MAXIMUM RATINGS Rating Symbol Value Supply Voltage (Note 1) VS 44 VDC or ±22 Power Dissipation, Tamb = 25 °C (Still Air) (Note 2) NE5517N, NE5517AN NE5517D, AU5517D PD Unit V mW 1500 1125 Thermal Resistance, Junction−to−Ambient D Package N Package RqJA Differential Input Voltage Diode Bias Current °C/W 140 94 VIN ±5.0 V ID 2.0 mA IABC 2.0 mA Output Short-Circuit Duration ISC Indefinite Buffer Output Current (Note 3) IOUT 20 Operating Temperature Range NE5517N, NE5517AN AU5517T Tamb Amplifier Bias Current Operating Junction Temperature TJ 0 °C to +70 °C −40 °C to +125 °C 150 mA °C °C DC Input Voltage VDC +VS to −VS Storage Temperature Range Tstg −65 °C to +150 °C °C Lead Soldering Temperature (10 sec max) Tsld 230 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. For selections to a supply voltage above ±22 V, contact factory. 2. The following derating factors should be applied above 25 °C N package at 10.6 mW/°C D package at 7.1 mW/°C. 3. Buffer output current should be limited so as to not exceed package dissipation. http://onsemi.com 3 NE5517, NE5517A, AU5517 ELECTRICAL CHARACTERISTICS (Note 4) AU5517/NE5517 Characteristic Test Conditions Min Symbol Input Offset Voltage Max Min Typ Max Unit 2.0 5.0 2.0 mV 0.4 5.0 0.4 Overtemperature Range IABC 5.0 mA 0.3 5.0 0.3 Avg. TC of Input Offset Voltage 7.0 VOS Including Diodes Diode Bias Current (ID) = 500 mA 0.5 Input Offset Change 5.0 mA ≤ IABC ≤ 500 mA DVOS/DT VOS Typ NE5517A Input Offset Current DIOS/DT VOS 0.1 IOS 0.1 Avg. TC of Input Offset Current Input Bias Current DIB/DT IBIAS 0.4 1.0 Avg. TC of Input Current 0.01 Forward Transconductance gM Overtemperature Range 6700 5400 gM Tracking 0.6 9600 Peak Output Voltage Positive Negative Supply Current VOS Sensitivity Positive Negative RL = 0, IABC = 5.0 mA RL = 0, IABC = 500 mA RL = 0, Overtemperature Range RL = ∞, 5.0 mA ≤ IABC ≤ 500 mA RL = ∞, 5.0 mA ≤ IABC ≤ 500 mA IABC = 500 mA, both channels IOUT 350 300 Leakage Current ICC 0.1 3.0 mV 0.1 0.6 mA mA/°C 5.0 8.0 0.4 1.0 5.0 7.0 mA/°C 0.01 13000 7700 4000 9600 12000 0.3 650 3.0 350 300 5.0 500 +12 −12 +14.2 −14.4 mA mmho dB 7.0 650 mA +14.2 −14.4 2.6 4.0 2.6 4.0 20 20 150 150 20 20 150 150 mA mV/V CMRR 80 110 80 110 dB ±12 ±13.5 ±12 ±13.5 V 100 dB Referred to Input (Note 5) 20 Hz < f < 20 kHz 100 IABC = 0, Input = ±4.0 V IIN IABC = 0 (Refer to Test Circuit) Input Resistance RIN Open-loop Bandwidth BW SR Slew Rate mV V +12 −12 Common-mode Range Differential Input Current 2.0 VOUT D VOS/D V+ D VOS/D V− Common-mode Rejection Ration Crosstalk 5.0 500 0.5 0.001 0.3 Peak Output Current Unity Gain Compensated Buffer Input Current 5 INBUFFER Peak Buffer Output Voltage 5 VOBUFFER DVBE of Buffer 5 0.001 Overtemperature Range mV/°C 7.0 Refer to Buffer VBE Test Circuit (Note 6) 10 0.02 100 0.02 10 nA 0.2 100 0.2 5.0 nA 26 26 kW 2.0 2.0 MHz 50 50 V/ms 0.4 10 5.0 10 0.4 5.0 10 0.5 5.0 mA V 0.5 5.0 mV 4. These specifications apply for VS = ±15 V, Tamb = 25°C, amplifier bias current (IABC) = 500 mA, Pins 2 and 15 open unless otherwise specified. The inputs to the buffers are grounded and outputs are open. 5. These specifications apply for VS = ±15 V, IABC = 500 mA, ROUT = 5.0 kW connected from the buffer output to −VS and the input of the buffer is connected to the transconductance amplifier output. 6. VS = ±15, ROUT = 5.0 kW connected from Buffer output to −VS and 5.0 mA ≤ IABC ≤ 500 mA. http://onsemi.com 4 NE5517, NE5517A, AU5517 TYPICAL PERFORMANCE CHARACTERISTICS 10 3 5 3 2 +125°C 1 -55°C 0 -1 +25°C +125°C -2 -3 -4 -5 -6 10 VS = ±15V INPUT BIAS CURRENT (nA) VS = ±15V VS = ±15V INPUT OFFSET CURRENT (nA) INPUT OFFSET VOLTAGE (mV) 4 10 4 2 -55°C 10 +25°C +125°C 1 10 10 3 2 -55°C 10 +125°C -7 +25°C 0.1 1mA 10mA 100mA 1 0.1mA 1000mA 100mA 1000mA 0.1mA 10 4 PEAK OUTPUT VOLTAGE AND COMMON-MODE RANGE (V) +125°C 10 3 +25°C -55°C 10 10mA 100mA 1000mA Figure 5. Input Bias Current 10 5 5 VS = ±15V 1mA AMPLIFIER BIAS CURRENT (IABC) Figure 4. Input Bias Current Figure 3. Input Offset Voltage 10 2 10mA AMPLIFIER BIAS CURRENT (IABC) AMPLIFIER BIAS CURRENT (IABC) PEAK OUTPUT CURRENT ( μ A) 1mA 4 VOUT 3 VCMR 2 (+)VIN = (−)VIN = VOUT = 36V LEAKAGE CURRENT (pA) -8 0.1mA VS = ±15V 1 RLOAD = ∞ 0 -1 Tamb = 25°C -2 VCMR -3 -4 -5 -6 10 4 10 3 0V 10 2 VOUT -7 1 1mA 10mA 100mA 0.1mA AMPLIFIER BIAS CURRENT (IABC) 10mA 100mA 1000mA +125°C 10 3 10 2 +25°C 10 10 5 mq m M 10 4 VS = ±15V 10 3 +125°C -55°C 10 2 +25°C 10 1 1 2 3 4 5 6 INPUT DIFFERENTIAL VOLTAGE Figure 9. Input Leakage 7 Figure 8. Leakage Current 10 2 PINS 2, 15 OPEN gM 0.1mA 1mA 10mA 100mA 1000mA AMPLIFIER BIAS CURRENT (IABC) Figure 10. Transconductance http://onsemi.com 5 0°C 25°C 50°C 75°C100°C125°C AMBIENT TEMPERATURE (TA) Figure 7. Peak Output Voltage and Common-Mode Range TRANSCONDUCTANCE (gM) — ( μ ohm) 10 4 INPUT LEAKAGE CURRENT (pA) 1mA AMPLIFIER BIAS CURRENT (IABC) Figure 6. Peak Output Current 0 10 -50°C -25°C -8 1000mA INPUT RESISTANCE (MEG Ω ) 0.1mA PINS 2, 15 OPEN 10 1 1 0.1 0.01 0.1mA 1mA 10mA 100mA 1000mA AMPLIFIER BIAS CURRENT (IABC) Figure 11. Input Resistance NE5517, NE5517A, AU5517 TYPICAL PERFORMANCE CHARACTERISTICS (continued) 7 100 VS = ±15V 1800 Tamb = +25°C RL = 10kW OUTPUT DISTORTION (%) 6 -55°C 1400 CAPACITANCE (pF) 1600 +25°C 1200 1000 +125°C 800 600 5 CIN 4 COUT 3 2 IABC = 1mA 10 1 0.1 400 1 200 0 0.1mA 1mA 10mA 100mA 0 1000mA 0.01 0.1mA 1mA 10mA 100mA AMPLIFIER BIAS CURRENT (IABC) Figure 12. Amplifier Bias Voltage vs. Amplifier Bias Current Figure 13. Input and Output Capacitance 20 OUTPUT NOISE CURRENT (pA/Hz) RL = 10kW VIN = 80mVP-P -20 VIN = 40mVP-P -40 -60 OUTPUT NOISE 20kHz BW -80 -100 0.1mA 1mA Figure 14. Distortion vs. Differential Input Voltage 600 VS = ±15V 0 1 10 100 1000 DIFFERENTIAL INPUT VOLTAGE (mVP-P) 1000mA AMPLIFIER BIAS CURRENT (IABC) OUTPUT VOLTAGE RELATIVE TO 1 VOLT RMS (dB) AMPLIFIER BIAS VOLTAGE (mV) 2000 10mA 100mA 500 400 300 IABC = 1mA 200 100 IABC = 100mA 0 10 1000mA IABC AMPLIFIER BIAS CURRENT (mA) Figure 15. Voltage vs. Amplifier Bias Current 100 1k 10k FREQUENCY (Hz) 100k Figure 16. Noise vs. Frequency +36V A 4, 13 +15V 4V − A 11 5, 12 2, 15 4, 13 − 5, 12 2, 15 NE5517 NE5517 8, 9 1, 15 3, 14 + 11 7, 10 1, 10 3, 14 6 + 6 −15V Figure 17. Leakage Current Test Circuit Figure 18. Differential Input Current Test Circuit V+ V 50kW V− Figure 19. Buffer VBE Test Circuit http://onsemi.com 6 NE5517, NE5517A, AU5517 APPLICATIONS +15V 0.01mF 3, 14 10kW INPUT 62kW − 11 1, 16 390pF 2, 15 51W 7, 10 NE5517 8, 9 5, 12 4, 13 1.3kW OUTPUT 6 0.01mF + 5kW −15V 10kW −15V 0.001mF Figure 20. Unity Gain Follower CIRCUIT DESCRIPTION The circuit schematic diagram of one-half of the AU5517/NE5517, a dual operational transconductance amplifier with linearizing diodes and impedance buffers, is shown in Figure 21. If VIN is small, the ratio of I5 and I4 will approach unity and the Taylor series of In function can be approximated as KT In I 5 [ KT I 5 * I 4 q q I4 I4 and I 4 ^ I 5 ^ I B Transconductance Amplifier KT In I 5 [ KT I 5 * I 4 + 2KT I 5 * I 4 + V IN q q 1ń2I B q I4 IB The transistor pair, Q4 and Q5, forms a transconductance stage. The ratio of their collector currents (I4 and I5, respectively) is defined by the differential input voltage, VIN, which is shown in Equation 1. V IN I5 KT + q In I4 I 5 * I 4 + V IN Where VIN is the difference of the two input voltages KT ≅ 26 mV at room temperature (300°k). Transistors Q1, Q2 and diode D1 form a current mirror which focuses the sum of current I4 and I5 to be equal to amplifier bias current IB: ǒ V IN I B The term ǒIB qǓ 2KT ǒIB qǓ 2KT q 2KT Ǔ+I (eq. 5) O is then the transconductance of the amplifier and is proportional to IB. (eq. 2) V+ 11 D6 D4 Q14 Q6 Q10 Q12 Q13 7,10 8,9 Q7 Q11 2,15 V OUTPUT D3 D2 Q4 −INPUT 4,13 Q5 5,12 +INPUT 3,14 Q15 1,16 AMP BIAS INPUT Q16 Q3 Q2 D7 Q9 R1 Q1 D8 Q8 D1 V− 6 (eq. 4) The remaining transistors (Q6 to Q11) and diodes (D4 to D6) form three current mirrors that produce an output current equal to I5 minus I4. Thus: (eq. 1) I4 ) I5 + IB (eq. 3) D5 Figure 21. Circuit Diagram of NE5517 http://onsemi.com 7 NE5517, NE5517A, AU5517 Linearizing Diodes Impedance Buffer For VIN greater than a few millivolts, Equation 3 becomes invalid and the transconductance increases non-linearly. Figure 22 shows how the internal diodes can linearize the transfer function of the operational amplifier. Assume D2 and D3 are biased with current sources and the input signal current is IS. Since I4 + I5 = IB and I5 − I4 = I0, that is: I4 = (IB − I0), I5 = (IB + I0) The upper limit of transconductance is defined by the maximum value of IB (2.0 mA). The lowest value of IB for which the amplifier will function therefore determines the overall dynamic range. At low values of IB, a buffer with very low input bias current is desired. A Darlington amplifier with constant-current source (Q14, Q15, Q16, D7, D8, and R1) suits the need. +VS APPLICATIONS Voltage-Controlled Amplifier ID ǒǓ I ID 2 * I ID S 2 I0 + 2 I ) I I D I0 + I5 * I4 S I5 I4 D3 S In Figure 23, the voltage divider R2, R3 divides the input-voltage into small values (mV range) so the amplifier operates in a linear manner. It is: B I OUT + *V IN @ D2 1/2ID Q4 IS V OUT + I OUT @ R L; I5 IS 1/2ID A+ IB Figure 22. Linearizing Diode Since gM is directly proportional to IABC, the amplification is controlled by the voltage VC in a simple way. When VC is taken relative to −VCC the following formula is valid: For the diodes and the input transistors that have identical geometries and are subject to similar voltages and temperatures, the following equation is true: ID 2 I D 2 V OUT R3 + @ gM @ RL V IN R2 ) R3 (3) gM = 19.2 IABC (gM in mmhos for IABC in mA) −VS T In q R3 @ g M; R2 ) R3 ) IS 1ń2(I B ) I O) + KT q In 1ń2(I B * I O) * IS I ABC + (eq. 6) (V C * 1.2V) R1 The 1.2 V is the voltage across two base-emitter baths in the current mirrors. This circuit is the base for many applications of the AU5517/NE5517. I I I O + I S 2 B for |I S| t D 2 ID The only limitation is that the signal current should not exceed ID. INT +VCC VC +VCC R1 R4 = R2/ /R3 3 + IABC 1 11 5 7 NE5517 R2 VIN − 4 6 8 IOUT VOUT RL RS R3 INT −VCC TYPICAL VALUES: R1 = 47kW R2 = 10kW R3 = 200W R4 = 200W RL = 100kW RS = 47kW Figure 23. http://onsemi.com 8 NE5517, NE5517A, AU5517 Stereo Amplifier With Gain Control Modulators Figure 24 shows a stereo amplifier with variable gain via a control input. Excellent tracking of typical 0.3 dB is easy to achieve. With the potentiometer, RP, the offset can be adjusted. For AC-coupled amplifiers, the potentiometer may be replaced with two 510 W resistors. Because the transconductance of an OTA (Operational Transconductance Amplifier) is directly proportional to IABC, the amplification of a signal can be controlled easily. The output current is the product from transconductance×input voltage. The circuit is effective up to approximately 200 kHz. Modulation of 99% is easy to achieve. +VCC 10kW 3 VIN1 RIN + 11 INT +VCC 15kW 1k NE5517/A RP +VCC RD IABC − 8 1 4 VOUT1 RL 10kW 30kW VC 5.1kW RC 10kW 14 VIN2 RIN 15kW 1k RP +VCC 16 + −VCC IABC 15 +VCC 10 NE5517/A 12 RD 9 6 − 13 VOUT2 RL 10kW RS −VCC INT Figure 24. Gain-Controlled Stereo Amplifier RC 30kW VIN2 SIGNAL 1 IABC +VCC 11 ID 15kW VOS VIN1 CARRIER 3 2 NE5517/A 1kW INT +VCC + 5 7 − 10kW 8 4 RL 10kW 6 −VCC Figure 25. Amplitude Modulator http://onsemi.com 9 VOUT RS −VCC INT NE5517, NE5517A, AU5517 Voltage-Controlled Resistor (VCR) Voltage-Controlled Oscillators Because an OTA is capable of producing an output current proportional to the input voltage, a voltage variable resistor can be made. Figure 26 shows how this is done. A voltage presented at the RX terminals forces a voltage at the input. This voltage is multiplied by gM and thereby forces a current through the RX terminals: Figure 32 shows a voltage-controlled triangle-square wave generator. With the indicated values a range from 2.0 Hz to 200 kHz is possible by varying IABC from 1.0 mA to 10 mA. The output amplitude is determined by IOUT × ROUT. Please notice the differential input voltage is not allowed to be above 5.0 V. With a slight modification of this circuit you can get the sawtooth pulse generator, as shown in Figure 33. Rx + R ) RA gM ) RA where gM is approximately 19.21 mMHOs at room temperature. Figure 27 shows a Voltage Controlled Resistor using linearizing diodes. This improves the noise performance of the resistor. APPLICATION HINTS To hold the transconductance gM within the linear range, IABC should be chosen not greater than 1.0 mA. The current mirror ratio should be as accurate as possible over the entire current range. A current mirror with only two transistors is not recommended. A suitable current mirror can be built with a PNP transistor array which causes excellent matching and thermal coupling among the transistors. The output current range of the DAC normally reaches from 0 to −2.0 mA. In this application, however, the current range is set through RREF (10 kW) to 0 to −1.0 mA. Voltage-Controlled Filters Figure 28 shows a Voltage Controlled Low-Pass Filter. The circuit is a unity gain buffer until XC/gM is equal to R/RA. Then, the frequency response rolls off at a 6dB per octave with the −3 dB point being defined by the given equations. Operating in the same manner, a Voltage Controlled High-Pass Filter is shown in Figure 29. Higher order filters can be made using additional amplifiers as shown in Figures 30 and 31. I DACMAX + 2 @ V REF + 2 @ 5V + 1mA R REF 10kW R 30kW +VCC 3 + R ) RA gM @ RA VC INT +VCC 11 + X IO 2 NE5517/A 5 7 C − 4 200W VOUT 8 200W RX −VCC R 100kW 10kW −VCC INT Figure 26. VCR +VCC VC +VCC ID 3 VOS 30kW 1 RP INT +VCC 11 2 NE5517/A 1kW 5 7 C 6 4 8 RX −VCC R 100kW 10kW −VCC INT Figure 27. VCR with Linearizing Diodes http://onsemi.com 10 NE5517, NE5517A, AU5517 30kW 1 +VCC 100kW 3 VIN VC IABC INT +VCC 11 + 2 NE5517/A 5 − 6 4 200W 7 C 150pF VOUT R 100kW 200W −VCC RA 8 10kW −VCC INT NOTE: f + O R A gM g(R ) RA) 2pC Figure 28. Voltage-Controlled Low-Pass Filter 30kW 1 +VCC 100kW VOS NULL VC +VCC 3 IABC INT +VCC 11 + 2 NE5517/A 5 -VCC − 6 RA 1kW 8 0.005mF 4 1kW 7 C VOUT R 100kW −VCC 10kW −VCC INT NOTE: f O + R A gM g(R ) RA) 2pC Figure 29. Voltage-Controlled High-Pass Filter 15kW VC +VCC +VCC NE5517/A − 100pF 200W RA NE5517/A 100kW C − 200W INT +VCC + + VIN −VCC R 100kW 10kW RA 100 kW C2 200pF VOUT RA 200W 10kW 200 -VCC NOTE: f O + RA gM (R ) R A) 2p C Figure 30. Butterworth Filter − 2nd Order http://onsemi.com 11 −VCC INT NE5517, NE5517A, AU5517 1 15kW 16 VC +VCC +VCC 10kW 3 14 + 11 5 2 12 − 800pF −VCC LOW PASS VOUT 800pF 13 20kW 10 NE5517/A 15 20kW 6 1kW + 7 NE5517/A − INT +VCC 9 1kW 5.1kW 20kW 5.1kW −VCC −VCC INT BANDPASS OUT Figure 31. State Variable Filter 30kW +VCC VC +VCC 4 INT +VCC 13 − 11 1 5 7 12 + 10 NE5517/A NE5517/A 3 INT +VCC 47kW − C 0.1mF 6 −VCC 16 + 8 14 VOUT2 9 20kW 10kW −VCC INT −VCC VOUT1 GAIN CONTROL Figure 32. Triangle−Square Wave Generator (VCO) IB IC 470kW 1 +VCC VC +VCC 4 + 11 − R1 30kW +VCC 30kW − 7 12 10 NE5517/A NE5517/A 3 INT 47kW 13 5 2 16 INT +VCC C 0.1mF 6 8 −VCC + 14 R2 30kW 20kW −VCC −VCC VOUT1 NOTE: (V V PK + * 0.8) R 1 C R1 ) R2 T H + 2V PK x C IB T L + 2V PKxC I C I f C I t t I B OSC 2V xC C PK Figure 33. Sawtooth Pulse VCO http://onsemi.com 12 VOUT2 INT NE5517, NE5517A, AU5517 ORDERING INFORMATION Device Temperature Range Package AU5517DR2 AU5517DR2G SOIC−16 −40 to +125 °C SOIC−16 (Pb−Free) NE5517D SOIC−16 NE5517DG SOIC−16 (Pb−Free) NE5517DR2 SOIC−16 NE5517DR2G SOIC−16 (Pb−Free) NE5517N Shipping† 0 to +70 °C 2500 Tape & Reel 48 Units/Rail 2500 Tape & Reel PDIP−16 NE5517NG PDIP−16 (Pb−Free) NE5517AN PDIP−16 NE5517ANG PDIP−16 (Pb−Free) 25 Units/Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 13 NE5517, NE5517A, AU5517 PACKAGE DIMENSIONS SOIC−16 CASE 751B−05 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 16 9 1 8 −B− P 8 PL 0.25 (0.010) B M S G R K DIM A B C D F G J K M P R F X 45 _ C −T− SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 S PDIP−16 CASE 648−08 ISSUE T NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. −A− 16 9 1 8 B F C L S SEATING PLANE −T− K H G D M J 16 PL 0.25 (0.010) M T A M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 Dolby is a registered trademark of Dolby Laboratories Inc., San Francisco, Calif. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 14 For additional information, please contact your local Sales Representative. NE5517/D