IH401A Semiconductor T UCT ROD ACEMEN 47 P E 7 T L 7 E P 42 OL RE 00-4 m OBS ENDED 8 1 s.co MM ions ECO pplicat p@harri R O A N ral ntap Cent : ce Call or email April 1999 QUAD Varafet Analog Switch Features Description • rDS(ON) (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Ω The IH401A is made up of 4 monolithically constructed combinations of varacitor type diode and a N-Channel JFET. The JFET itself is very similar to the popular 2N4391, and the driver diode is specially designed, such that its capacitance is a strong function of the voltage across it. The driver diode is electrically in series with the gate of the N-Channel FET and simulates a back-to-back diode structure. This structure is needed to prevent forward biasing the source-to-gate or drain-to-gate junctions of the JFET when used in switching applications. • ID(OFF) (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10pA • Switching Times (RL = 1kΩ) - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75ns • Built-In Overvoltage Protection . . . . . . . . . . . . . . ±25V • Charge Injection Error (Typ) into 0.01µF Capacitor . . 3mV • CISS (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <1pF • Can Be Used for Hybrid Construction Part Number Information PART NUMBER IH401A TEMP. RANGE (oC) -55 to 125 PACKAGE Previous applications of JFETs required the addition of diodes, in series with the gate, and then perhaps a gate-tosource referral resistor or a capacitor in parallel with the diode; therefore, at least 3 components were required to perform the switch function. The IH401A does this same job in one component (with a great deal better performance characteristics). Like a standard JFET, the practically perform a solid state switch function translator should be added to drive the diode. This translator takes the TTL levels and converts them to voltages required to drive the diode/FET system (typically a 0V to -15V translation and a 3V to +15V shift). With ±15V power supplies, the IH401A will typically switch 22VP-P at any frequency from DC to 20MHz, with less than 50Ω rDS(ON) . 16 Ld CERDIP Pinout IH401A (CERDIP) TOP VIEW S1 1 16 D4 D1 2 15 S4 14 DR4 DR1 3 13 4 DR2 5 12 DR3 S2 6 11 S3 D2 7 10 D3 9 8 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1999 14-1 File Number 3128.2 IH401A Absolute Maximum Ratings Thermal Information Supply Voltage VS to VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V VG to VS , VD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V Maximum Junction Temperature (Ceramic Package) . . . . . . . . . 175oC Storage Temperature Range . . . . . . . . . . . . . . . . . . .-65oC to 150oC Lead Temperature (Soldering, 10s). . . . . . . . . . . . . . . . . . . . . 300oC Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications At 25oC/125oC PARAMETER Switch “ON” Resistance Pinch-Off Voltage SYMBOL rDS(ON) VP TEST CONDITIONS MIN TYP MAX UNITS VDRIVE = 15V, VDRAIN = -10V, ID = 10mA - 35 50 Ω ID = 1nA, VDS = 10V 2 4 5 V Switch “OFF” Current or “OFF” Leakage ID(OFF) VDRIVE = -15V, VSOURCE = -10V, VDRAIN = +10V - 10 ±500 pA Switch “OFF” Leakage at 125oC ID(OFF) VDRIVE = -15V, VSOURCE = -10V, VDRAIN = +10V - 0.25 50 nA Switch “OFF” Current IS(OFF) VDRIVE = -15V, VDRAIN = -10V, VSOURCE = +10V - 10 ±500 pA Switch “OFF” Leakage at 125oC IS(OFF) VDRIVE = -15V, VSOURCE = -10V, VDRAIN = +10V - 0.3 50 nA Switch Leakage When Turned “ON” ID(ON) = IS(ON) VD = VS = -10V, VDRIVE= +15V - 0.02 ±2 nA AC Input Voltage Range without Distortion VANALOG See Figure 2 20 22 - VP-P Charge Injection Amplitude VINJECT See Figure 3 - 3 - mVP-P Diode Reverse Breakdown Voltage. This Correlates to Overvoltage Protection BVDIODE VD = VS = -V, IDRIVE = 1µA, DRIVE = 0V -30 -45 - V Gate to Source or Gate to Drain Reverse Breakdown Voltage BVGSS VDRIVE = -V, VD = VS = 0V, DRIVE = 1µA 30 41 - V Maximum Current Switch can Deliver (Pulsed) IDSS VDRIVE = 15V, VS = 0V, D = +10V 35 55 - mA Switch “ON” Time (Note 1) tON See Figure 1 - 50 - ns Switch “OFF” Time (Note 1) tOFF See Figure 1 - 150 - ns NOTE: 1. Driving waveform must be >100ns rise and fall time. 14-2 IH401A Test Circuits +15V 0V -15V SIGNAL +5V 90% -15V STROBE INPUT 10% +15V +5V 90% -15V STROBE INPUT tON VOUT 1kΩ 90% -5V 10% 0V tOFF 0V +5V SIGNAL -5V SIGNAL 10% tON tOFF FIGURE 1. SWITCHING TIME TEST CIRCUIT AND WAVEFORMS VIN f = 1kH +15V 0V VOUT VOUT -15V 1kΩ C = 0.01µF FIGURE 2. ANALOG INPUT VOLTAGE RANGE TEST CIRCUIT FIGURE 3. CHARGE INJECTION TEST CIRCUIT Applications IH401A Family In general, the IH401A family can be used in any application formally using a JFET/isolation diode combination (2N4391 or similar). Like standard FET circuits, the IH401A requires a translator for normal analog switch function. The translator is used to boost the TTL input signals to the ±15V analog supply levels which allow the IH401A to handle ±10V analog signals. A typical simple PNP translator is shown in Figure 4. -15V • tON time of approx. 200ns break before • tOFF time of approx. 80ns make switch • TTL compatible strobing levels of ANALOG SIGNALS IN 2.4V 0.4V • ID(ON) + IS(ON) typically 20pA up to ±10V analog signals 10kΩ 1/4 OF IH401A • ID(OFF) or IS(OFF) typically 20pA +15V 0V FROM TTL OPEN COLLECTOR LOGIC A translator which overcomes the problems of the simple PNP stage is the Harris IH6201 (See Note). This translator driving an IH401A varafet produces the following typical features: 10kΩ • Quiescent current drain of approx. 100nA in either “ON” or “OFF” case ANALOG OUT RL +15V FIGURE 4. TYPICAL SIMPLE PNP TRANSLATOR Although this simple PNP circuit represents a minimum of components, it requires open collector TTL input and t(OFF) is limited by the collector load resistor (approximately 1.5µs for 10kΩ). Improved switching speed can be obtained by increasing the complexity of the translator stage. NOTE: The IH6201 is a dual translator (two independent translators per package) constructed from monolithic CMOS technology. The schematic of one-half IH6201, driving one-fourth of an IH401A, is shown in Figure 5. A very useful feature of this system is that one-half of an IH6201 and one-half of an IH401A can combine to make a SPDT switch, or an IH6201 plus an IH401A can make a dual SPDT analog switch. (See Figure 8) 14-3 IH401A Typical Application Schematic (1/2 of IH401A, Driving 1/4 of an IH401A) +15V 10kΩ 2.4V V+ D 4kΩ TTL OR CMOS INPUT STROBE 0.4V S VARAFET +15V GND θ -15V θ +15V VL +5V 1kΩ θ +15V -15V V1 θ 20kΩ 2kΩ 1kΩ -15V -15V V- TRANSLATOR (IH6201) NOTE: Each transistor output has a θ and output. θ is just the inverse of θ, i.e., (θ output is 180 degrees out of phase with respect to θ output). FIGURE 5. IH6201 DRIVING AN IH401A Switching Information 1 16 2 θ1 3V 1 16 15 2 15 14 3 13 4 5 12 5 12 +5V 6 11 6 11 +15V 7 10 7 10 8 9 8 9 3 IH401A 4 θ2 T2L1 0V 14 -15V IH6201 13 3V T2L2 0V NOTE: Either switch is turned on when strobe input goes high. FIGURE 6. DUAL SPST ANALOG SWITCH 1 16 2 15 3 14 4 IH401A 13 θ1 θ1 1 16 2 15 3 14 -15V 4 IH6201 13 5 12 5 12 +5V 6 11 6 11 +15V 7 10 7 10 8 9 8 9 FIGURE 7. DPDT ANALOG SWITCH 14-4 3V 0V T2L1 IH401A Switching Information (Continued) 1 16 2 15 14 3 4 θ1 IH401A θ1 13 5 12 6 11 7 10 8 9 θ2 θ2 1 16 2 15 14 -15V 3 4 T2L INPUT 1 IH6201 13 5 12 +5V 6 11 +15V 7 10 8 9 T2L INPUT 2 FIGURE 8. DUAL SPDT ANALOG SWITCH θ1 1 16 1 16 2 15 2 15 14 3 13 4 5 12 5 12 +5V 6 11 6 11 +15V 7 10 7 10 8 9 8 9 3 4 IH401A θ2 14 -15V IH6201 13 FIGURE 9. DUAL DPST ANALOG SWITCH 14-5 T2L INPUT T2L INPUT