NUP4304MR6 Low Capacitance Diode Array for ESD Protection in Four Data Lines NUP4304MR6 is a MicroIntegration™ device designed to provide protection for sensitive components from possible harmful electrical transients; for example, ESD (electrostatic discharge). http://onsemi.com Features • Low Capacitance (1.5 pF Maximum Between I/O Lines) • Single Package Integration Design • Provides ESD Protection for JEDEC Standards JESD22 • • • • PIN CONFIGURATION AND SCHEMATIC Machine Model = Class C Human Body Model = Class 3B Protection for IEC61000−4−2 (Level 4) 8.0 kV (Contact) 15 kV (Air) Ensures Data Line Speed and Integrity Fewer Components and Less Board Space Direct the Transient to Either Positive Side or to the Ground 6 USB 1.1 and 2.0 Data Line Protection T1/E1 Secondary IC Protection T3/E3 Secondary IC Protection HDSL, IDSL Secondary IC Protection Video Line Protection Microcontroller Input Protection Base Stations I2C Bus Protection Pb−Free Package is Available 5 VN 1/O 3 4 I/O 5 4 2 3 LG MG G TSOP−6 CASE 318F PLASTIC LG = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) Symbol Value Unit Reverse Voltage VR 70 Vdc Forward Current IF 200 mAdc IFM(surge) 500 mAdc Repetitive Peak Reverse Voltage VRRM 70 V Average Rectified Forward Current (Note 1) (averaged over any 20 ms period) IF(AV) 715 mA Repetitive Peak Forward Current IFRM 450 mA Non−Repetitive Peak Forward Current t = 1.0 ms t = 1.0 ms t = 1.0 S IFSM Peak Forward Surge Current VP 2 1 MAXIMUM RATINGS (Each Diode) (TJ = 25°C unless otherwise noted) Rating 6 I/O MARKING DIAGRAM Applications • • • • • • • • • I/O 1 ORDERING INFORMATION Device NUP4304MR6T1 NUP4304MR6T1G Package Shipping† TSOP−6 3000/Tape & Reel TSOP−6 3000/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. A 2.0 1.0 0.5 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−5 = 1.0 0.75 0.062 in. © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev. 1 1 Publication Order Number: NUP4304MR6/D NUP4304MR6 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit RqJA 556 °C/W Lead Solder Temperature Maximum 10 Seconds Duration TL 260 °C Junction Temperature TJ −40 to +85 °C Storage Temperature Tstg −55 to +150 °C Thermal Resistance Junction−to−Ambient ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Each Diode) Characteristic Symbol Min Typ Max Unit V(BR) 70 − − Vdc IR − − − − − − 2.5 30 50 mAdc Capacitance (between I/O pins) (VR = 0 V, f = 1.0 MHz) CD − 0.8 1.5 pF Capacitance (between I/O pin and ground) (VR = 0 V, f = 1.0 MHz) CD − 1.6 3 pF VF − − − − − − − − 715 855 1000 1250 mVdc OFF CHARACTERISTICS Reverse Breakdown Voltage (I(BR) = 100 mA) Reverse Voltage Leakage Current (VR = 70 Vdc) (VR = 25 Vdc, TJ = 150°C) (VR = 70 Vdc, TJ = 150°C) Forward Voltage (IF = 1.0 mAdc) (IF = 10 mAdc) (IF = 50 mAdc) (IF = 150 mAdc) 1. FR−5 = 1.0 0.75 0.062 in. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. http://onsemi.com 2 NUP4304MR6 Curves Applicable to Each Cathode 10 IR , REVERSE CURRENT (μA) TA = 85°C 10 TA = −40°C 1.0 0.1 TA = 25°C 0.2 0.4 0.6 0.8 1.0 VF, FORWARD VOLTAGE (VOLTS) TA = 125°C 1.0 TA = 85°C 0.1 TA = 55°C 0.01 0.001 1.2 TA = 150°C TA = 25°C 10 0 Figure 1. Forward Voltage 20 30 40 VR, REVERSE VOLTAGE (VOLTS) Figure 2. Leakage Current 1.75 CD, DIODE CAPACITANCE (pF) IF, FORWARD CURRENT (mA) 100 1.5 1.25 1.0 0.75 0 2 4 6 VR, REVERSE VOLTAGE (VOLTS) Figure 3. Capacitance http://onsemi.com 3 8 50 NUP4304MR6 APPLICATIONS INFORMATION Option 2 Protection of four data lines and the supply rail using VCC as a reference and an external TVS diode. The NUP4304MR6 is a low capacitance diode array designed to protect sensitive electronics such as communications systems, computers, and computer peripherals against damage due to ESD events or transient overvoltage conditions. Because of its low capacitance, it can be used on high speed I/O data lines. The integrated design of the NUP4304MR6 offers surge rated, low capacitance steering diodes integrated in a single package (TSOP−6). If a transient condition occurs, the steering diodes will drive the transient to the positive rail of the power supply or to ground. I/O 1 I/O 2 VCC NUP4304MR6 Configuration Options The NUP4304MR6 is able to protect up to four data lines against transient overvoltage conditions by driving them to a fixed reference point for clamping purposes. The steering diodes will be forward biased whenever the voltage on the protected line exceeds the reference voltage (Vf or Vcc+Vf). The diodes will force the transient current to bypass the sensitive circuit. Data lines are connected at pins 1, 3, 4 and 6. The negative reference is connected at pin 5. This pin must be connected directly to ground by using a ground plane to minimize the PCB’s ground inductance. It is very important to reduce the PCB trace lengths as much as possible to minimize parasitic inductance. 1 6 2 5 3 4 I/O 3 I/O 4 If additional protection of the supply rail is desired, an external TVS diode may be added across VCC and ground. This will prevent overvoltage conditions on the supply rail protecting the supply and other circuits connected to it. Option 3 Protection of four data lines with bias and power supply isolation resistor. I/O 1 I/O 2 VCC Option 1 Protection of four data lines using Vcc as reference. I/O 1 I/O 2 VCC 1 6 2 5 3 4 1 6 2 5 3 4 10 k I/O 3 I/O 4 The NUP4304MR6 can be isolated from the power supply by connecting a series resistor between pin 2 and VCC. A 10 kW resistor is recommended for this application. This will maintain bias on the internal steering diodes, reducing their capacitance. I/O 3 I/O 4 For this configuration, connect pin 2 directly to the positive supply rail (Vcc), the data lines are referenced to the supply voltage. Biasing of the steering diodes reduces their capacitance. http://onsemi.com 4 NUP4304MR6 2 Option 4 Protection of four data lines without biasing of the internal steering diodes. D1 I/O 1 I/O 2 1 3 D2 1 6 2 5 3 4 D3 4 D4 D5 D7 6 D6 D8 5 NUP4304MR6 Equivalent Circuit I/O 3 I/O 4 In applications lacking a positive supply reference an external TVS diode may be used as a reference. For these applications, the TVS is connected between pin 2 and the ground plane. The steering diodes will conduct whenever the voltage on the protected line exceeds their forward voltage plus the working voltage of the TVS diode (Vc=Vf + VTVS). In this case, the effective capacitance of the steering diodes will be higher than if a bias was applied. http://onsemi.com 5 NUP4304MR6 PACKAGE DIMENSIONS TSOP−6 CASE 318F−05 ISSUE L NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318F−01, −02, −03 OBSOLETE. NEW STANDARD 318F−04. D 6 5 4 2 3 E HE 1 DIM A A1 b c D E e L HE q b e C A 0.05 (0.002) q L A1 MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.37 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10° − MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0° INCHES NOM 0.039 0.002 0.015 0.007 0.118 0.059 0.037 0.016 0.108 − MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10° SOLDERING FOOTPRINT* 2.4 0.094 0.95 0.037 1.9 0.074 0.95 0.037 0.7 0.028 1.0 0.039 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MicroIntegration is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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