SG6860 Low-Cost, Green-Mode PWM Controller for Flyback Converters Features Description Green-Mode PWM This highly integrated PWM controller provides several enhancements designed to meet the low standby-power needs of low-power SMPS. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. This green-mode function enables the power supply to meet even strict power conservation requirements. VDD Over-Voltage Protection (Latch off) Supports the “Blue Angel” Eco Standard Low Start-up Current: 9µA Low Operating Current: 3mA Leading-Edge Blanking Constant Output Power Limit Universal Input Built-in Synchronized Slope Compensation Current Mode Operation Cycle-by-cycle Current Limiting Under-Voltage Lockout (UVLO) Programmable PWM Frequency with Frequency Hopping Gate Output Voltage Clamped at 17V Low Cost Few External Components Required Small SOT-26 Package Applications Power Adaptors The BiCMOS fabrication process enables reducing the start-up current to 9µA and the operating current to 3mA. To further improve power conservation, a large start-up resistance can be used. Built-in synchronized slope compensation ensures the stability of peak current mode control. Proprietary internal compensation provides a constant output power limit over a universal AC input range (90VAC to 264VAC). Pulse-by-pulse current limiting ensures safe operation even during short-circuits. To protect the external power MOSFET from being damaged by supply over voltage, the SG6860’s output driver is clamped at 17V. SG6860 controllers can improve the performance and reduce the production cost of power supplies. The SG6860 can replace linear and RCC-mode power adapters. It is available in 8-pin DIP and 6-pin SOT-26 packages. Open-Frame SMPS Ordering Information Part Number Operating Temperature Range Package SG6860TZ -40°C to +85°C Small SOT-26 Package SG6860DZ -40°C to +85°C 8-pin Dual in-line Package (DIP) Packing Method Tape & Reel Rail All packages are lead free per JEDEC: J-STD-020B standard. © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 www.fairchildsemi.com SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters March 2008 CIN 10µ SG6860 Figure 1. Typical Application Block Diagram SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Application Diagram Figure 2. Function Block Diagram © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 www.fairchildsemi.com 2 Figure 3. DIP Pin Configuration (Top View) Figure 4. SOT Pin Configuration (Top View) Pin Definitions Pin # DIP Pin # (SOT) Name Description 1 (6) GATE Driver Output. The totem-pole output driver for driving the power MOSFET. 2 (5) VDD Power Supply. 3 -- NC No Connection. 4 (4) SENSE Current Sense. This pin senses the voltage across a resistor. When the voltage reaches the internal threshold, PWM output is disabled, which activates over-current protection. This pin also provides current amplitude data for current-mode control. 5 (3) RI Reference Setting. A resistor connected from the RI pin to ground generates a constant current source used to charge an internal capacitor and determine the switching frequency. Increasing the resistance reduces the amplitude of the current source and reduces the switching frequency. A 95kΩ resistor, RI, results in a 13µA constant current, II, and a 70kHz switching frequency. 6 -- NC No Connection. 7 (2) FB Feedback. 8 (1) GND © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Pin Configuration Ground. For ATX SMPS, it detects AC line voltage through the main transformer. www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit 30 V VVDD DC Supply Voltage VFB Input Voltage to FB Pin -0.3 7.0 V Input Voltage to Sense Pin -0.3 7.0 V VSENSE PD Power Dissipation 300 mW TJ Operating Junction Temperature +150 °C θJA Thermal Resistance (Junction-to-Air) SOT 208.4 °C/W DIP 82.5 °C/W +150 °C +260 °C Electrostatic Discharge Capability, Human Body Model 3.5 KV Electrostatic Discharge Capability, Machine Model 200 V TSTG TL ESD -55 Storage Temperature Range Lead Temperature (Wave Soldering or IR, 10 seconds) Notes: 1. All voltage values, except differential voltage, are given with respect to GND pin. 2. Stresses beyond those listed under “absolute maximum ratings“ may cause permanent damage to the device. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Min. Operating Ambient Temperature © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 -40 Typ. Max. Unit +85 °C SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Absolute Maximum Ratings www.fairchildsemi.com 4 VDD =15V, TA= 25°C, unless noted operating specs. Symbol Parameter Conditions Min. Typ. Max. Units 22 V VDD Section VDD-OP Continuous Operation Voltage VDD-ON Turn-on Threshold Voltage 15.5 16.5 17.5 V VDD-OFF Turn-off Threshold Voltage 8.5 9.5 10.5 V 9 15 µA 3.0 3.5 mA 25 26 IDD-ST IDD-OP Start-up Current VDD=VDD-ON – 0.1V Operating Supply Current VDD=15V, GATE with 1nF to GND VDD-OVP VDD Over-voltage Protection Level Latch off tD-VDDOVP VDD Over-voltage Protection Debounce Latch off Holding Current after OVP Latch-off VDD=5V IDD-H 24 120 40 50 V µs 60 µA Feedback Input Section ZFB VFB-OPEN Input Impedance FB Output High Voltage 5 KΩ 5 V VFB-OL FB Open-loop Trigger Level 4.7 V tD-OLP Delay Time of FB Pin Open-loop Protection 54 ms VFB-N Green-Mode Entry FB Voltage VFB-G Green-Mode Ending FB Voltage SG 2.60 2.85 3.10 2.2 Green-Mode Modulation Slope RI=95KΩ 40 V V 75 100 55 100 Hz/mV Current-Sense Section ZSENSE Input Impedance 10 tPD Delay to Output 40 KΩ VSTHFL Flat Threshold Voltage for Current Limit VSTHVA Valley Threshold Voltage for Current Limit 0.65 0.70 0.75 V Leading-Edge Blanking Time 250 300 350 ns tLEB DCYSAW 1 ns Duty Cycle of SAW Limit Maximum Duty Cycle V 40 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Electrical Characteristics % Oscillator Section fOSC tHOP fOSC-G Center Frequency RI=95KΩ Hopping Range Hopping Period 65 RI=95KΩ Green-Mode Frequency RI=95KΩ fDV Frequency Variation vs. VDD Deviation VDD=13.5 to 22V fDT Frequency Variation vs. Temperature Deviation TA=-20 to 85°C 70 75 ±4.9 3.7 ms 20 0 0.02 KHz KHz 2.00 % 2 % 80 % 1.5 V Output Section DCYMAX Maximum Duty Cycle VGATE-L Output Voltage Low VGATE-H 70 75 VDD=15V, IO=20mA Output Voltage High VDD=13.5V, IO=20mA tr Rising Time VDD=15V, CL=1nF 135 ns tf Falling Time VDD=15V, CL=1nF 35 ns Output Clamp Voltage VDD=22V VGATECLAMP © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 8 16 V 17 18 V www.fairchildsemi.com 5 9.6 16.9 9.4 V DD-OFF (V) V DD-ON (V) 17.0 16.8 16.7 9.2 9.0 8.8 16.6 16.5 8.6 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 Temperature (℃) 35 50 65 80 95 110 125 Temperature (℃) Figure 5. VDD-ON vs. TA Figure 6. VDD-OFF vs. TA 15.0 3.5 13.0 3.3 I DD-OP (mA) IDD-ST (µA) 20 11.0 9.0 3.1 2.9 2.7 7.0 2.5 5.0 -40 -25 -10 -40 -25 -10 5 20 35 50 65 80 5 35 50 65 80 95 110 125 Temperature (℃) Temperature (℃) Figure 7. IDD-ST vs. TA Figure 8. IDD-OP vs. TA 67.0 75.0 66.8 74.6 DCY MAX (%) fOSC (KHz) 20 95 110 125 66.6 66.4 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Typical Performance Characteristics 74.2 73.8 73.4 66.2 73.0 66.0 -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 95 110 125 Temperature (℃) 20 35 50 65 80 95 110 125 Temperature (℃) Figure 9. fOSC vs. TA © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 5 Figure 10. DCYMAX vs. TA www.fairchildsemi.com 6 2.30 2.96 2.26 V FB-G (V) V FB-N (V) 3.00 2.92 2.88 2.84 2.18 2.14 2.10 2.80 -40 -25 -10 5 20 35 50 65 80 -40 -25 -10 95 110 125 Temperature (℃) 360 320 280 240 200 5 20 35 50 65 80 95 110 125 Temperature (℃) Figure 13. tLEB vs. TA © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 20 35 50 65 Figure 12. VFB-G vs. TA 400 -40 -25 -10 5 Temperature (℃) Figure 11. VFB-N vs. TA tLEB (ns) 2.22 80 95 110 125 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Typical Performance Characteristics (Continued) www.fairchildsemi.com 7 SG6860 integrates many useful designs into one controller for low-power switch-mode power supplies. The following descriptions highlight some of the features of the SG6860 series. Constant Output Power Limit When the SENSE voltage across the sense resistor, RS, reaches the threshold voltage (~1.00V), the output GATE drive is turned off after propagation delay, tPD. This propagation delay introduces an additional current proportional to tPD•VIN/Lp. The propagation delay is nearly constant, regardless of the input line voltage VIN. Higher input line voltages result in larger additional currents. At high input line voltages, the output power limit is higher than at low input line voltages. Start-up Current The start-up current is only 9µA, which allows a startup resistor with high resistance and low-wattage to supply the start-up power for the controller. A 1.5MΩ, 0.25W, start-up resistor and a 10µF/25V VDD hold-up capacitor are sufficient for an AC-to-DC power adapter with a wide input range of 90VAC to 264VAC. To compensate for this output power limit variation across a wide AC input range, the threshold voltage is adjusted by adding a positive ramp. This ramp signal rises from 0.70V to 1.00V, then flattens out at 1.00V. A smaller threshold voltage forces the output GATE drive to terminate earlier. This reduces the total PWM turnon time and makes the output power equal to that of low line input. This proprietary internal compensation ensures a constant output power limit for a wide AC input voltage range (90VAC to 264VAC). Operating Current The operating current has been reduced to 3mA, which results in higher efficiency and reduces the VDD hold-up capacitance requirement. Green-Mode Operation The proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency under light-load conditions. On-time is limited to provide stronger protection against brownouts and abnormal conditions. The feedback current, which is sampled from the voltage feedback loop, is taken as the reference. Once the feedback current exceeds the threshold current, the switching frequency starts to decrease. This green-mode function dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using the SG6860 can meet even strict regulations regarding standby power consumption. Under-Voltage Lockout (UVLO) The turn-on and turn-off thresholds are fixed internally at 16.5V and 9.5V. During start-up, the hold-up capacitor must be charged to 16.5V through the startup resistor to enable SG6860. The hold-up capacitor continues to supply VDD until power can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 9.5V during the start-up process. This UVLO hysteresis window ensures that the hold-up capacitor is adequate to supply VDD during start-up. Gate Output The SG6860 BiCMOS output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 17V Zener diode to protect power MOSFET transistors against undesired over-voltage gate signals. Oscillator Operation A resistor connected from the RI pin to ground generates a constant current source used to charge an internal capacitor. The charge time determines the internal clock speed and the switching frequency. Increasing the resistance reduces the amplitude of the input current and reduces the switching frequency. A 95kΩ resistor, RI, results in a 13µA constant current, II, and a 70kHz switching frequency. The relationship between RI and the switching frequency is: fPWM = 6650 (kHz) R I (kΩ) Built-in Slope Compensation The sensed voltage across the current sense resistor is used for current mode control and pulse-by-pulse current limiting. Built-in slope compensation improves stability and prevents sub-harmonic oscillations due to peak current mode control. The SG6860 has a synchronized, positively-sloped ramp built-in at each switching cycle. The slope of the ramp is: (2) 0.36 × Duty (1) The range of the oscillation frequency is designed to be within 50kHz ~ 100kHz. Duty(max .) Leading-Edge Blanking Noise Immunity Each time the power MOSFET is switched on, a turnon spike occurs at the sense-resistor. To avoid premature termination of the switching pulse, a 300ns leading-edge blanking time is built in. Conventional RC filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and cannot switch off the gate driver. © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.0 Noise from the current sense or the control signal can cause significant pulse-width jitter, particularly in continuous-conduction mode. While slope compensation helps alleviate these problems, further precautions should be taken. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the SG6860, and increasing power MOS gate resistance improve performance. www.fairchildsemi.com 8 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Functional Description D Detail A b 4 1 e 3 E E1 6 c R1 R θ A A2 1 L2 e1 θ L1 1 θ A1 L Detail A Figure 14. 6-SOTIC Dimensions Symbol A A1 A2 b c D E E1 e e1 L L1 L2 R1 R2 θ˚ θ 1˚ Min. 0.76 0.30 0.08 0.30 0.10 0.10 0˚ 5˚ Millimeter Typ. 1.03 2.90 2.80 1.60 0.95 1.90 0.45 0.60 0.25 4˚ 10˚ Max. 1.45 0.15 1.30 0.50 0.22 Min. 0.030 0.011 0.003 0.60 0.020 0.25 8˚ 15˚ 0.004 0.004 0˚ 5˚ Inch Typ. 0.041 0.114 0.110 0.063 0.037 0.075 0.018 0.024 0.010 4˚ 10˚ Max. 0.057 0.006 0.051 0.020 0.009 0.024 0.010 8˚ 15˚ Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.0 www.fairchildsemi.com 9 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Mechanical Dimensions D Θ¢X 5 E1 8 B A A2 4 A1 1 e E L b1 b e Figure 15. 8-DIPIC Dimensions Symbol A A1 A2 b b1 D E E1 e L eB θ˚ Min. 0.381 3.175 9.017 6.223 2.921 8.509 0˚ Millimeter Typ. 3.302 1.524 0.457 9.271 7.620 6.350 2.540 3.302 9.017 7˚ Max. 5.334 Min. 3.429 0.015 0.125 10.160 0.355 6.477 0.245 3.810 9.525 15˚ 0.115 0.335 0˚ Inch Typ. 0.130 0.060 0.018 0.365 0.300 0.250 0.100 0.130 0.355 7˚ Max. 0.210 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters Mechanical Dimensions (Continued) 0.135 0.400 0.255 0.150 0.375 15˚ Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 www.fairchildsemi.com 10 SG6860 — Low-Cost, Green-Mode PWM Controller for Flyback Converters © 2008 Fairchild Semiconductor Corporation SG6860 • Rev. 1.0.1 www.fairchildsemi.com 11