3583 ® High Voltage, High Current OPERATIONAL AMPLIFIER FEATURES APPLICATIONS ● WIDE POWER SUPPLY VOLTAGE: ±70V to ±150V ● OUTPUT CURRENT TO 75mA ● SLEW RATE: 30V/µs ● FET INPUT: IB = 20pA max ● THERMAL SHUT-DOWN PROTECTION ● PROGRAMMABLE POWER SUPPLY ● PIEZO-ELECTRIC TRANSDUCER DRIVER ● HIGH VOLTAGE CURRENT SOURCE ● HERMETIC TO-3 PACKAGE, ISOLATED CASE DESCRIPTION Offset Trim 3 4 V+ 2 The 3583 is a high voltage, high speed hybrid operational amplifier designed for a wide variety of programmable power supply and transducer driver applications. The 3583 operates over a wide power supply range (±50V to ±150V) and provides outputs up to 75mA. Laser-trimmed FET input circuitry provides low offset voltage (3mV max) and low input bias current (20pA max). Thermal shut-down circuitry protects internal circuitry from excessive power dissipation. Commercial and industrial temperature range models are available. The 3583’s hermetic 8-pin TO-3 package is electrically isolated from all internal circuitry. 5 –In 1 Output 6 +In 7 V– International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • © SBOS130 1976 Burr-Brown Corporation • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 PDS-343D Printed in U.S.A October, 1993 SPECIFICATIONS ELECTRICAL TCASE = +25°C, VS = ±150V, unless otherwise noted. 3583AM PARAMETER CONDITIONS OFFSET VOLTAGE Input Offset Voltage vs Temperature vs Power Supply vs Time INPUT BIAS CURRENT(1) Input Bias Current vs Temperature vs Power Supply Input Offset Current vs Temperature vs Power Supply MIN TYP FREQUENCY RESPONSE Unity-Gain Bandwidth Full-Power Bandwidth Slew Rate Settling Time: 0.1% VCM = 0V –20 TEMPERATURE RANGE (CASE) Specification Operating Storage θJC = 4°C/W MAX UNITS * * mV µV/°C µV/V µV/month * pA * pA/V pA * * ±20 VCM = 0V Doubles Every 10°C 0.2 * * pA/V 5 1.7 0.3 * * * µVp-p µVrms pAp-p (V+) + |V–| V– to V+ VS –10 110 * * * * V dB 1011 || 10 1011 * * Ω || pF Ω || pF * * dB dB * * * * MHz kHz V/µs µs Linear Operation No Load, DC Rated Load, DC TYP * • Doubles Every 10°C 0.2 118 105 94 Small-Signal RL = 10kΩ OUTPUT Voltage Output Current Output Short Circuit Current Load Capacitance POWER SUPPLY Operating Voltage Range Quiescent Current MIN 20 50 INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain Open-Loop Voltage Gain MAX ±3 ±23 Specified Temp. Range NOISE Voltage, 0.01Hz to 10Hz 10Hz to 1kHz Current, 0.01Hz to 10Hz INPUT VOLTAGE RANGE Max Safe Differential Input Max Safe Common-Mode Input Common-Mode Input Range Common-Mode Rejection 3583JM * 5 60 30 12 VS –10 ±75 * * ±100 * V mA mA nF * 10 ±50 ±150 ±8.5 * * * V mA –25 –55 –55 +85 +125 +125 0 * * +70 * * °C °C °C IO = 0 * Specification same as 3583AM. NOTE: (1) Inputs may be damaged by input slew rates exceeding 1000V/µs. Inputs can be protected from signals exceeding 1000V/µs by limiting input current to 150mA with external series resistors (pins 5 and 6). The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3583 2 CONNECTION DIAGRAM PACKAGING INFORMATION Top View TO-3 Optional Offset Adjust Offset Trim 100kΩ 3 2 +VCC PACKAGE DRAWING NUMBER(1) 3583AM 3583JM 8-Pin TO 3 8-Pin TO 3 030 030 Output ORDERING INFORMATION 4 Offset Trim 5 –In 8 +In PACKAGE NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. 1 to V+ Supply MODEL 6 NC(1) 7 MODEL PACKAGE TEMPERATURE RANGE 3583AM 3583JM 8-Pin TO-3 8-Pin TO-3 –25°C to +85°C 0°C to +70°C –VCC NOTE: (1) No internal connection. Optional socket available: 804MC TYPICAL PERFORMANCE CURVES TCASE = +25°C, ±VCC = 150VDC, unless otherwise noted. ® 3 3583 TYPICAL PERFORMANCE CURVES (CONT) TCASE = +25°C, ±VCC = 150VDC, unless otherwise noted. ® 3583 4 TYPICAL PERFORMANCE CURVES (CONT) TCASE = +25°C, ±VCC = 150VDC, unless otherwise noted. APPLICATION INFORMATION Figure 1 shows the basic connections required to operate the 3583. Power supply bypass capacitors should be connected close to the device pins. Be sure that these capacitors have an adequate voltage rating. The thermal shut-down circuit will normally protect the amplifier during a short-circuit to ground. It will not protect against short-circuit to one of the power supplies. The typical performance curve “Safe Operating Area” shows that the large stress occurring during this high voltage condition may cause damage if it exceeds 5ms duration. The thermal protection circuitry will not activate fast enough to protect the device from short-circuits to one of the power supplies. Input offset voltage and drift of the 3583 are laser-trimmed. Many applications require no external offset trimming. Figure 1 also shows connection of an optional offset trim potentiometer connected to pins 3 and 4. The package case of the 3583 is electrically isolated from all circuitry. No special insulating hardware is required. Although not absolutely required, it is recommended that the case be connected to ground. FET input circuitry reduces the input bias current of the 3583 to less than 20pA at room temperature. Input bias current remains nearly constant throughout the full common-mode range. Input bias current approximately doubles for each 10°C increase in case temperature above 25°C. Heat sinking can help minimize this effect by reducing the case temperature. Input circuitry of the 3583 is protected with series limiting resistors and input clamp diodes. The inputs can withstand the full rated supply voltage of ±150V (common-mode or differential). V+ +50V to +150V V+ R1 4 3 3583 0.1µF THERMAL PROTECTION The 3583 has internal thermal shut-down circuitry that activates at a case temperature of approximately 150°C or higher. As this circuitry is activated, the output current drive is reduced. As the case temperature returns to less than the activation temperature, operation will return to normal. A heat sink may be required depending on load and signal conditions. Optional offset voltage trim 100kΩ circuit. R2 G=1+ R2 R1 VO 3583 VIN Note that a 75mA output may not be safe for all output voltages—see typical performance curve “Safe Operating Area”. Applications such as current sources where output voltage may be low (or the opposite polarity of the output current) can overstress the output stage. 0.1µF Connect case to ground. V– –50V to –150V FIGURE 1. Basic Circuit Connections. ® 5 3583 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated