FUJITSU SEMICONDUCTOR DATA SHEET DS04-28500-5E ASSP AD/DA CONVERTER MB40166/MB40176 1-CHANNEL 6-BIT AD/DA CONVERTER WITH CLAMP CIRCUIT The Fujitsu MB40166 and MB40176 are low power 6-bit AD/DA converter which is fabricated with Fujitsu Advanced Bipolar Technology. MB40166 and MB40176 have the same basic circuits and functions, with the only difference being that MB40166 has an independent analog input terminal for the A/D section and a clamp voltage output terminal, while MB40176 has an analog input in the A/D section internally connected with the clamp circuit. Since both models contain a single-chip clamp circuit and a reference voltage circuit, they are ideal for video signal processing. • • • • • • • • • Resolution Linearity Error Maximum Conversion Rate Analog Input Voltage Range 0 to 1.0 V (MB40176) Analog Output Voltage Range Digital I/O Level Power Supply Voltage Power Dissipation:300 mW typ. Package 28pin Plastic FLAT Package 28pin Plastic DIP Package :6 bits :±0.8% max. :20 MSPS min. :VREF to VCCA (MB40166) PLASTIC PACKAGE FPT-28P-M01 :VCC to VCC -1 V :TTL Level :+5 V (Suffix : -PF) (Suffix : -P) ABSOLUTE MAXIMUM RATINGS (see NOTE) Rating Symbol Value Unit VCCA, VCCD -0.5 to +7.0 V Digital Input Voltage VIND -0.5 to +7.0 V Analog Input Voltage VINA -0.5 to VCCA +0.5 V Storage Temperature TSTG -55 to +125 °C Power Supply Voltage PLASTIC PACKAGE DIP-28P-M03 NOTE: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. 1 MB40166/MB40176 ■ PIN ASSIGNMENT (TOP VIEW) (TOP VIEW) DACK 1 28 D.GND DD1 2 27 VCCD A.GND DD2 3 26 A.GND 25 VCCA DD3 4 25 VCCA 5 24 VOUT DD4 5 24 VOUT DD5 6 23 COMP DD5 6 23 COMP (LSB) DD6 7 22 VREF (LSB) DD6 7 22 VREF (LSB) DA6 8 21 VINA (LSB) DA6 8 21 C2 DA5 9 20 VCLMP DA5 9 20 C1 DA4 10 19 (N.C.) DA4 10 19 VIN DA3 11 18 VCCA DA3 11 18 VCCA DA2 12 17 A.GND DA2 12 17 A.GND DA1 13 16 VCCD DA1 13 16 VCCD ADCK 14 15 D.GND ADCK 14 15 D.GND (MSB) (MSB) DACK 1 28 D.GND DD1 2 27 VCCD DD2 3 26 DD3 4 DD4 MB40166 (FPT-28P-M01) (DIP-28P-M03) (MSB) (MSB) MB40176 (FPT-28P-M01) (DIP-28P-M03) Note : The functions of the terminals within the dotted lines above are different for MB40166 and MB40176. 2 MB40166/MB40176 ■ BLOCK DIAGRAM • MB40166 REFERENCE VOLTAGE GENERATOR 0.8VCCA VCLMP VINA ADCK CLAMP 20 21 14 VCCA 0.8VCCA R1 0.8VCCA 1 R 63 to 6 ENCODER 2 LATCH & BUFFER R 13 (MSB) DA1 12 DA2 11 DA3 10 DA4 9 DA5 8 DA6 62 R 63 (LSB) R2 VREF 22 DACK 1 DD1 (MSB) to DD6 (LSB) 2 7 6 6 MASTER SLAVE REGISTER 15 28 D.GND 6 17 6 BUFFER 26 A.GND 16 27 VCCD CURRENT SWITCH 18 25 VCCA R-2R RESISTOR NETWORK 6 24 VOUT 23 COMP Note : The circuits within the dotted lines above are different for MB40166 and MB40176. 3 MB40166/MB40176 ■ BLOCK DIAGRAM (Continued) • MB40176 VIN C1 C2 ADCK 19 0.8VCCA REFERENCE VOLTAGE GENERATOR CLAMP 20 21 14 VCCA 0.8VCCA R1 0.8VCCA 1 R 63 to 6 ENCODER 2 LATCH & BUFFER R 13 (MSB) DA1 12 DA2 11 DA3 10 DA4 9 DA5 8 DA6 62 R 63 (LSB) R2 VREF 22 DACK 1 DD1 (MSB) to DD6 (LSB) 2 7 6 6 MASTER SLAVE REGISTER 15 28 D.GND 6 17 6 BUFFER 26 A.GND 16 27 VCCD CURRENT SWITCH 18 25 VCCA R-2R RESISTOR NETWORK 6 23 COMP Note : The circuits within the dotted lines above are different for MB40166 and MB40176. 4 24 VOUT MB40166/MB40176 ■ PIN DESCRIPTIONS Section Pin No. I/O – VINA I 19 VIN I 40176 21 – A/D Function Analog signal input. 22 VREF O Reference voltage output. Reference voltage divided by the resistors, with the output voltage set to 0.8 x VCCA (V). 8 to 13 DA1 to DA6 O Digital signal outputs. (DA1: MSB, DA6: LSB) Clamp voltage output. 20 – VCLMP O – 20 C1 – – 21 C2 – 14 ADCK I A/D conversion clock input. 24 VOUT O Analog signal output. 2 to 7 DD1 to DD6 I Digital signal input. (DD1: MSB, DD6: LSB) 23 COMP – Phase compensation capacitor is connected. Insert a capacitor of 1 µF or more between this pin and A.GND. 1 DACK I D/A conversion clock input. 18, 25 VCCA – Power supply for analog circuit. (+5 V) 16, 27 VCCD – Power supply for digital circuit. (+5 V) 17, 26 A.GND – Ground for analog circuit. (0 V) 15, 28 D.GND – Ground for digital circuit. (0 V) (N.C.) – No connection. D/A Common Other Symbol 40166 19 – Clamp capacitor is connected between these pins. 5 MB40166/MB40176 ■ RECOMMENDED OPERATING CONDITIONS Parameter Value Symbol Unit Remarks Min Typ Max VCCA, VCCD 4.75 5.00 5.25 V VINA VREF – VCCA V MB40166 VIN 0 – 1 V MB40176 Digital High-level Input Voltage VIHD 2.0 – Digital Low-level Input Voltage VILD – – 0.8 V Clock Frequency fCLK – – 20 MHz Clock Pulse Width at High Level W+ t 20 – – ns Clock Pulse Width at Low Level tW- 20 – – ns Set-up Time tS 12.5 – – ns Hold Time tH 7.5 – – ns Phase Compensation Capacitance CCOMP 1.0 – – µF Clamp Capacitance CCLAMP 1.0 – – µF CVREF 1.0 – – µF Ta 0 – 70 °C Power Supply Voltage Analog Input Voltage Reference Voltage Capacitance Operating Temperature ■ V ELECTRICAL CHARACTERISTICS ANALOG CIRCUIT DC CHARACTERISTICS (VCCA=VCCD=5V±5%, Ta=0 to 70°C) Parameter Resolution Condition – Value Unit Min Typ Max – – 6 Bits Remarks Linearity Error LE DC – – ±0.8 % Analog High Level Input Current IIHA VINA = VCCA – 8.5 25 µA MB40166 Analog Low Level Input Current IILA VINA = VREF – 7.5 23 µA MB40166 Equivalent resistance for Analog Input RINA VCCA - VREF IIHA - IILA 400 – – kΩ MB40166 IIN -400 – – µA MB40176 Reference Voltage VREF* 3.9 4.0 4.1 V Clamp Voltage VCLMP – VREF – V Full-Scale Output Voltage VOFS – VCCA – V Zero-Scale Output Voltage VOZS – VREF – V Output Resistance RO – 240 – Ω Power Supply Current ICC – 60* 90 mA Analog Input Current Note : *VCCA=VCCD=5.0V 6 Symbol MB40166/MB40176 ■ ELECTRICAL CHARACTERISTICS (Continued) DIGITAL CIRCUIT DC CHARACTERISTICS (VCCA=VCCD=5V±5%, Ta=0°C to 70°C) Parameter Symbol Condition Digital High-level Output Voltage VOHD Digital Low-level Output Voltage VOLD Digital High-level Input Voltage Value Unit Min Typ Max IOH=-400 µA 2.7 – – V IOL=1.6mA – – 0.4 V VIHD 2.0 – – V Digital Low-level Input Voltage VILD – – 0.8 V Digital High-level Input Current IIHD – – 20 µA Digital Low-level Input Current IILD -100 – – µA SWITCHING CHARACTERISTICS (VCCA=VCCD=5V±5%, Ta=0°C to 70°C) Parameter Symbol Condition Value Unit Min Typ Max FS 20 – – MSPS Digital Output Delay Time tPDD 8 15 30 ns Analog Output Delay Time tPDA – 13 – ns Analog Output Rise Time tr – 15 – ns Analog Output Fall Time tf – 15 – ns Maximum Conversion Rate 7 MB40166/MB40176 ■ TIMING CHART 1. Timing Chart for A/D Conversion tW + tW3V 1.5 V A/D conversion clock input (ADCK) 0V Sample N Analog signal input (VIN) Sample N+1 Sample N+2 tpdD VOHD Digital signal output (DA1 to DA6) DATA N-1 1.5 V DATA N DATA N+1 VOLD 2. Timing Chart for D/A Conversion tS th 3V Digital signal input (DD1 to DD6) 1.5 V 0V tW + tW3V 1.5 V D/A conversion clock input (DACK) 0V tr tf VOFS 90% 50% Analog signal output (VOUT) 10% tPLHA 8 90% 50% 10% tPHLA VOZS MB40166/MB40176 ■ A/D CONVERSION CHARACTERISTICS Ideal conversion characteristics (1LSB=16 mV) Actual conversion characteristics STEP, OUTPUT CODE STEP, OUTPUT CODE 63 111111 63 111111 62 111110 62 111110 61 111101 61 111101 LE61 33 100001 33 100001 32 100000 32 100000 31 011111 31 011111 02 000010 02 000010 01 000001 01 000001 00 000000 00 000000 LE33 LE31 LE32 LE2 4.000 V 4.992 V VINA, VIN LE1 VZT LEn max = FS VFT D/A CONVERSION CHARACTERISTICS Ideal conversion characteristics (1LSB=16 mV) Actual conversion characteristics A.OUT A.OUT 5.000 V VOFS 4.984 V LE62 LE33 4.520 V LE32 4.504 V 4.488 V LE31 LE2 4.024 V LE1 4.008 V 111110 111111 62 63 100001 100000 011111 000010 000001 000000 111110 111111 33 32 31 2 1 0 63 33 31 2 32 Step Input Code 62 100001 100000 011111 000010 000001 Input Code 1 MSB VOZS 000000 3.992 V LSB 0 ■ VINA, VIN Linearity Error Step 9 MB40166/MB40176 ■ FUNCTIONAL DESCRIPTIONS CLAMP CIRCUIT The clamp circuit contained in MB40166/MB40176 is a peak detector type, in which the top of the sync of the composite sync signal is clamped. Clamp voltage is common to the reference voltage (0.8 x VCC) of A/D and D/A circuits. • MB40166 (1) Providing a clamp circuit 20 Clamp 21 A/D VCLMP - + D/A VOUT 24 VINA A 8 13 2 7 (DA6 to DA1) (DD1 to DD6) VCCA VCCA 1V VREF Given voltage VREF Input level at A Input level at VINA pin Output level of Vout (2) Directly feeding the signal at the VINA pin VINA 21 A/D D/A 8 13 2 7 (DA6 to DA1) VCCA (DD1 to DD6) VCCA VREF VREF Input level at VINA pin 10 24 Output level of Vout VOUT MB40166/MB40176 • MB40176 VIN 19 C1 C2 CLAMP 20 - + 21 D/A A/D 8 13 2 (DD1 to DD6) VCCA VCCA A. GND VREF Input level at VIN pin VOUT 7 (DA6 to DA1) 1V 24 VREF Input level of C2 Output level of Vout 11 MB40166/MB40176 ■ ANALOG INPUT EQUIVALENT CIRCUIT • MB40166 VCCA ~100 Ω 0.8 x VCC + VBE ~ ~ 400 kΩ x 63 Circuits A.GND 21 20 VINA VCLMP ADC analog input equivalent circuit Equivalent circuit of clamp circuit block • MB40176 VCCA 100 Ω ~ ~ 4 kΩ 0.8 x VCC + VBE ~ 400 kΩ ~ VIN 19 x 63 Circuits A.GND 20 C1 - + 21 C2 Equivalent circuit of clamp circuit block 12 ADC analog input equivalent circuit MB40166/MB40176 ■ DIGITAL INPUT EQUIVALENT CIRCUITS • MB40166/MB40176 Digital input equivalent circuit of A/D converter block VCCD 50 kΩ 3.2 kΩ 1.6 kΩ 50 kΩ 1.6 kΩ VT~ 1.4 V ADCK D.GND Digital input equivalent circuit of D/A converter block VCCD 50 kΩ DA1 to DA6 DACK 50 kΩ VT~ 1.4 V D.GND 13 MB40166/MB40176 ■ TYPICAL CONNECTION EXAMPLE • MB40166 VCC VCCA VCCD 6 VCLMP DA VINA ADCK VOUT MB40166 CONTROLLER MB87045 MEMORY MB81464 DACK DD 6 COMP D.GND A.GND 10 µH 10 µH + 3.3 µF - 0.33 µF 0.33 µF 18 VCCA Clamp voltage output Video signal ADC input Video signal DAC output 1 µF + - + 1 µF - 25 VCCA VCCD ADCK VCLMP 21 VINA (MSB) DA1 13 19 N.C. (LSB) DA6 8 24 VOUT (LSB) DD6 7 (MSB) DD1 2 22 VREF 23 COMP MB40166 DACK A.GND 17 A.GND 26 D.GND 15 - 3.3 µF VCCD 20 Note : If the clamp circuit is used, connect VINA with VCLMP. If the clamp circuit is not used, do not connect VINA with VCLMP. 14 27 16 + D.GND 28 14 1 ADC clock ADC digital outputs (to controller) DAC digital inputs (from controller) DAC clock MB40166/MB40176 ■ TYPICAL CONNECTION EXAMPLE (continued) (1) Internal clamp circuit is used. +9 V +5 V +5 V VCCA VCCD External component 2.2 kΩ - + 20 VCLMP 1 µF Analog input pin MB40166 2SA933 21 VINA A.GND D.GND (2)Internal clamp circuit is not used. OPEN 20 +5 V +5 V VCCA VCCD VCLMP MB40166 Analog input pin * 21 VINA A.GND D.GND *: Input voltage range for the analog input pin is VREF up to VCCA. 15 MB40166/MB40176 ■ TYPICAL CONNECTION EXAMPLE (continued) • MB40176 VCC VCCD VCCA VIN 6 DA C1 CONTROLLER MB87045 ADCK MB40176 DACK C2 DD VOUT COMP 6 A.GND D.GND 10 µF 10 µF 3.3 µF + 0.33 µF - 0.33 µF 18 VCCA Video signal ADC input - 1 µF + Video signal DAC output 1 µF 16 + - MEMORY MB81464 + 1 µF - 25 VCCA 27 16 VCCD ADCK VIN 20 C1 (MSB) DA1 13 21 C2 (LSB) DA6 8 24 VOUT (LSB) DD6 7 22 VREF (MSB) DD1 2 23 COMP A.GND 17 DACK A.GND 26 D.GND 15 - 3.3 µF VCCD 19 MB40176 + D.GND 28 14 1 ADC clock ADC digital outputs (to controller) DAC digital inputs (from controller) DAC clock MB40166/MB40176 ■ TYPICAL CONNECTION EXAMPLE (continued) 1.ON-CHIP Input PNP Transistor is utilized. Video signal input +5 V +5 V VCCA VCCD 19 VIN 20 C1 21 C2 - MB40176 1 µF + A.GND D.GND Note : Input impedance of VIN input pin (19) is about 20 kΩ, please pay attention to output impedance of signal source. 2. Input PNP Transistor of Clamp Circuit is put externally. +9 V +5 V +5 V VCCA VCCD External circuit 2.2 kΩ 21 + C2 1 µF Video signal input 2SA933 A.GND D.GND Note : Both VIN (19) and C (20) are connected with VCCA. 17 MB40166/MB40176 28-LEAD PLASTIC FLAT PACKAGE (CASE No.: FPT-28P-M01) .110(2.80) MAX +.010 +0.25 .699-.008 (17.75 -0.20 ) (MOUNTING HEIGHT) .002(0.05) MIN (STAND OFF HEIGHT) .402±.016 (10.20±0.40) .299±.012 (7.60±0.30) INDEX .362±.012 (9.20±0.30) .020±.008 (0.50±0.20) .050(1.27) TYP .018±.004 (0.45±0.10) ∅.005(0.13) M +.002 +0.05 .006-.001 (0.15 -0.02 ) Details of “A” part “A” .004(0.10) .008(0.20) .024(0.60) .007(0.18) MAX .027(0.68) MAX .650(16.51) REF 1994 FUJITSU LIMITED F28005S-5C 18 Dimensions in inches (millimeters) MB40166/MB40176 28-LEAD PLASTIC DUAL IN-LINE PACKAGE (CASE No.: DIP-28P-M03) 15°MAX INDEX-1 .358±.010 (9.10±0.25) .400(10.16) TYP INDEX-2 +.008 +0.20 1.024 -.012 (26.00 -0.30 ) .010±.002 (0.25±0.05) .070(1.778)MAX .191(4.85)MAX .118(3.00)MIN .070±.007 (1.778±0.18) .018±.004 (0.45±0.10) +.020 .039 -0 .020(0.51)MIN (1.00 +0.50 ) -0 .910(23.114)REF 1994 FUJITSU LIMITED D28012S-3C Dimensions in inches (millimeters) 19 MB40166/MB40176 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 1015, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211, Japan Tel: (044) 754-3753 Fax: (044) 754-3329 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, U.S.A. Tel: (408) 922-9000 Fax: (408) 432-9044/9045 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LIMITED No. 51 Bras Basah Road, Plaza By The Park, #06-04 to #06-07 Singapore 189554 Tel: 336-1600 Fax: 336-1609 All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete information sufficient for construction purposes is not necessarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu. The information contained in this document are not intended for use with equipments which require extremely high reliability such as aerospace equipments, undersea repeaters, nuclear control systems or medical equipments for life support. F9601 FUJITSU LIMITED Printed in Japan 20