Sept. 1995 Edition 3.0a DATA SHEET MB508 2.3GHz TWO MODULUS PRESCALER 2.3GHz TWO MODULUS PRESCALER The Fujitsu MB508 is a 2.3GHz two modulus prescaler used with a frequency synthesizer to form a Phase Locked Loop (PLL) and divides the input frequency by a modulus of 128/130, 256/258 or 512/514. The output level is 1.6V peak to peak ECL level. The ultra high frequency operation provides wide application, such as Direct Broadcasting Satellite System, CATV system, UHF Transceiver, etc. FEATURES High Frequency Operation: f = 2.3GHz max. (PIN = –4dBm min.) Input Signal Amplitude: VIN = 100mVp–p (fIN = 100MHz to 1.8GHz) Pulse Swallow Function: 128/130, 256/258, 512/514 Power Dissipation: 120mW typ. Wide Operation Temperature: -40°C to +85°C Stable Output Amplitude: VOUT = 1.6Vp–p typ. PLASTIC PACKAGE DIP-08P-M01 PLASTIC PACKAGE FPT-08P-M01 Complete PLL synthesizer circuit with the Fujitsu MB87001A, PLL synthesizer system block IC PIN ASSIGNMENT Standard Plastic 8-pin Dual-In-Line Package or Flat Package ABSOLUTE MAXIMUM RATINGS (See Note) Rating Symbol Value Unit Power Supply Voltage VCC –0.5 to +7.0 V Input Voltage VIN –0.5 to VCC V Output Current IO 10 mA Operating Temperature TA –40 to +85 °C TSTG –55 to +125 °C Storage Temperature Note: Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Copyright 1995 by FUJITSU LIMITED and FUJITSU MICROELECTRONICS IN 1 VCC 2 8 IN 7 SW2 TOP VIEW SW1 3 6 MC OUT 4 5 GND This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. MB508 D Q IN IN D Q D Q D Q C C C M C Q SW2 SW1 D Q SW C Q D Q D Q D Q D Q C Q C Q C Q C Q SW1 SW2 MC Divide Ratio H H H 1/128 H H L 1/130 H L H 1/256 L H H 1/256 H L L 1/258 L H L 1/258 L L H 1/512 L L L 1/514 D Q SW C Q MC Note: SW: H = VCC, L = open MC: H = 2.0V to VCC, L = GND to 0.8V Figure 1. MB508 Block Diagram PIN DESCRIPTION 2 Pin Number Symbol Descriptions 1 IN 2 VCC Power Supply, +5V 3 SW1 Divide Ratio Control Input (See Divide Ratio Table) 4 OUT Output 5 GND Ground 6 MC 7 SW2 8 IN Input Modulus Control Input (See Divide Ratio Table) Divide Ratio Control Input (See Divide Ratio Table) Complementary Input OUT MB508 RECOMMENDED OPERATING CONDITIONS Values Parameter Symbol Power Supply Voltage VCC Output Current IO Operating Temperature TA Load Capacitance CL Unit Min. Typ. Max. 4.5 5.0 5.5 1.2 –40 V mA +85 °C 12 pF ELECTRICAL CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted.) Values Parameter Symbol Condition Unit Min. Typ. Max. Power Supply Current ICC Output Amplitude VO Input Frequency fIN with input coupling capacitor 1000pF 100 2300 PINA fIN = 1800MHz to 2300MHz –4 5.5 PINB fIN = 100MHz to 1800MHz –16 10 1.0 24 mA 1.6 Vp–p Input Signal Amplitude dBm High Level Input Voltage for MC VIHM Low Level Input Voltage for MC VILM High Level Input Voltage for SW VIHS* Low Level Input Voltage for SW VILS High Level Input Current for MC IIHM VIH = 2.0V Low Level Input Current for MC IILM VIL = 0.8V High Level Input Current for SW IIHS VIH = VCC Modulus Set-up Time MC to Output at 2.3GHz Operation tSET Note: MHz 2.0 VCC –0.1 V VCC 0.8 V VCC +0.1 V Open V 0.4 –0.2 mA mA 18 250 µA 28 ns *Design Guarantee 3 MB508 VCC = +5.0V + 10% C3 Sampling scope input point for input waveform VCC SW1 Sampling scope prober point for output waveform SW2 C1 OUT IN P.G. 50Ω IN RL C2 CL MC GND MC Input C1 : 1000pF C2 : 1000pF C3 : 0.1µF CL : 12pF (including scope and jig capacitance) RL : 2KΩ Figure 2. Test Circuit TIMING CHART (2 MODULUS) Example: Divide ratio = 128/130 128 130 IN 64 64 64 66 OUT 64 64 64 64 64 64 66 64 66 64 64 MC tSET tSET Note: When divide of 130 is selected, positive pulse is applied by two to 66. The typical set up time is 18 ns from the MC signal input to the timing of change of prescaler divide ratio. 4 MINIMUM INPUT SIGNAL AMPLITUDE (mVp–p) MB508 VCC = 5.0V TA = 25°C 700 600 500 400 300 200 100 10 20 50 100 200 500 1000 2300 5000 INPUT FREQUENCY (MHz) Figure 3. Input Signal Amplitude vs. Input Frequency C1 VSX (Max. 8V) VCC VCC VCC 10KΩ C2 X1 12KΩ 16 15 14 13 12 11 10 9 VCO MB 87001A 0.047µF 1 2 3 4 5 6 OUTPUT 12KΩ VCC 7 8 100KΩ 10KΩ 33KΩ 47K 47K 47K Data Clock LE 1000pF 1000pF 8 7 6 5 MB 508 VCC 1000pF 1 2 3 4 1000pF 2.2KΩ X1 VCC VSX C1, C2 : : : : 12.8MHz X’tal 5V + 10% 8V max. depends on crystal oscillator Lock Det. 10KΩ Figure 4. Typical Application Example 5 MB508 PACKAGE DIMENSIONS (Suffix: –P) 8-LEAD PLASTIC DUAL IN-LINE PACKAGE (CASE No: DIP-08P-M01) .016 .370 – .012 0.40 9.40 – 0.30 15° MAX INDEX .244+.010 (6.20+0.25) .012 .039 – 0 0.30 0.99 – 0 .012 .060 – 0 .300(7.62) TYP .010+.002 (0.25+0.05) 0.30 1.52 – 0 .014 .035 – .012 0.35 0.89 – 0.30 .172(4.36) MAX .020(0.51) MIN .100(2.54) .018+.003 TYP (0.46+0.08) 1988 FUJITSU LIMITED D08006-2C 6 .118(3.00) MIN DImensions in inches (millimeters) MB508 PACKAGE DIMENSIONS (Continued) (Suffix: –PF) 8-LEAD PLASTIC FLAT PACKAGE (CASE No: FPT-08P-M01) .010 .250 – .008 0.25 6.35 – 0.20 .089(2.25) MAX (SEATED HEIGHT) .002(0.05) MIN (STAND OFF) .307+.016 (7.80+0.40) INDEX .016 .268 – .008 .209+.012 (5.30+0.30) 0.40 6.80 – 0.20 .020+.008 (0.50+0.20) .050(1.27) .018+.004 (0.45+0.10) TYP ∅ .005(0.13) .002 .006 – .001 M 0.05 0.15 – 0.02 .150(3.81) Details of “A” part REF “A” .004(0.10) 1988 FUJITSU LIMITED F08002S-3C .008(0.20) .020(0.50) .007(0.18) MAX .027(0.68) MAX DImensions in inches (millimeters) All Rights Reserved. Circuit diagrams utilizing Fujitsu products are included as a means of illustrating typical semiconductor applications. Complete information sufficient for construction purposes is not necessarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu assumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu. Fujitsu reserves the right to change products or specifications without notice. No part of this publication may be copied or reproduced in any form or by any means, or transferred to any third party without prior written consent of Fujitsu. 7 MB508 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED International Marketing Div. Furukawa Sogo Bldg., 6-1, Marunouchi 2-chome Chiyoda-ku, Tokyo 100, Japan Tel: (03) 3216-3211 Telex: 781-2224361 FAX: (03) 3215-0662 North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: 408-922-9000 FAX: 408-432-9044 Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10, 6072 Dreieich-Buchschlag, Germany Tel: (06103) 690-0 Telex: 411963 FAX: (06103) 690-122 Asia FUJITSU MICROELECTRONICS ASIA PTE LIMITED 51 Bras Basah Road, Plaza By The Park, #06-04 to #06-07 Singapore 0719 Tel: 336-1600 Telex: 55573 FAX: 336-1609 FUJITSU LIMITED 1990 8 Printed in Japan PV0002–904A3