P3/13 ECN30601 Product Specification ECN30601 1.Maximum allowable ratings o No. Items 1 Output Device Breakdown Voltage 2 Supply voltage 3 Input voltage Symbols Terminals VSM VS1,VS2 MU,MV,MW VCC VCC VIN VSP,RS HU,HV,HW MU,MV,MW IP IDC IBMAX CB Tjop - Ratings 500 18 -0.5~VB+0.5 Ta = 25 C Unit Condition V V V Output current Pulse A Note 1 1.5 DC 0.7 VB supply current 50 mA o Operating junction -20~+135 C Note 2 temperature o 8 Storage temperature Tstg -40~+150 C Note Determine the derating degree for absolute maximum ratings. Please refer to “High-Voltage Monolithic ICs “ for other precautions. o Note 1 Output device can cut OFF under this value in Tj = 25 C. Note 2 Thermal resistance o 1) Between junction to IC case : Rj-c = 4 C/W o 2) Between junction to air : Rj-a = 40 C/W 4 5 6 7 PDE-30601-0 Relation No.:IC-SP-02023 R0 P4/13 ECN30601 Product Specification ECN30601 2. Electrical characteristics No. Suffix (T ; Top arm, B ; Bottom arm) Items Symbols Terminals 1 Supply Voltage 2 3 Standby Current 4 VSop VCCop ISH VS1,VS2 VCC VS1,VS2 ICC VCC 5 6 7 8 9 10 11 12 13 14 15 16 VONT VONB TdONT TdONB TdOFFT TdOFFB VFDT VFDB Vref VIH VIL IIL IGBT Forward Voltage Drop Turn ON Output Delay Time Turn OFF Free wheel Diode Forward Voltage Drop Reference voltage Voltage UT,VT, WT UB,VB, Current WB 17 Inputs 18 VB supply Voltage 19 Output Current 20 Detect voltage 21 LVSD Recover Voltage Hysterisis 22 23 RS terminal input current MU,MV,MW RS UT,VT,WT UB,VB,WB IIH VB IB LVSDON LVSDOFF Vrh IILRS CB VCC, MU,MV, MW RS o MIN TYP MAX Unit 20 13.5 - 325 15 0.5 450 16.5 1.5 V V mA - 10 20 mA - 2.2 2.2 3.0 3.0 0.5 1.0 2.5 1.0 2.0 3.0 1.0 2.0 3.0 1.0 2.0 3.0 0.45 3.5 -10 2.2 2.4 0.5 - 2.8 3.0 0.55 1.5 - V V µs µs µs µs V V V V V µA - - 100 µA 6.8 7.5 8.2 V 10.0 10.1 11.5 12.0 25 12.9 13.0 mA V V 0.1 -100 0.5 - 0.9 - V µA Ta = 25 C Conditions UT,VT,WT,UB,VB,WB=0V VS=325V UT,VT,WT,UB,VB,WB=0V VCC=15V,IB=0A I=0.35A,VCC=15V I=0.35A,VCC=15V VS=325V,VCC=15V I=0.35A Resistive Load I=0.35A VCC=15V VCC=15V Pull down Input=0V resistance VCC=15V Note 1 Input=5V VCC=15V VCC=15V,IB=0A VCC=15V Note 2 VCC=15V, RS=0V, UT,VT,WT,UB,VB,WB=0V Note 1 Pull down resistance are typically 200 kΩ. Note 2 LVSD (Low voltage shut down) : Detect and shut down at lower VCC. VB UT VT WT UB VB WB typ 150Ω typ 200kΩ Fig1. Equivalent circuit of UT,VT,WT,UB,VB,WB terminals PDE-30601-0 Relation No.:IC-SP-02023 R0 P5/13 ECN30601 Product Specification ECN30601 3.Functions 3.1 Truth table Terminals UT, VT, WT, UB, VB, WB UT, UB VT, VB WT, WB Input L H UT & UB = H VT & VB = H WT & WB = H Output OFF ON OFF OFF OFF 3.2 Timing chart o Example of inverter controlled 120 commutation mode. UT Top arm VT WT UB Bottom arm VB WB MU output MV output MW output PDE-30601-0 Relation No.:IC-SP-02023 R0 P6/13 ECN30601 Product Specification ECN30601 3.3 Over current limiting operation This IC detects over current using external resistance RS. When RS input voltage exceeds inner reference voltage Vref (0.5V typical), this IC turns off all the bottom output IGBTs. After over current detection, reset operation is done at each inner clock signal period. In case of not using this function, please connect Rs terminal to GL terminal less than 100Ω impedance. VB Typ.200kΩ Typ.20kΩ RS Typ.150Ω Typ. 5pF Vref S Latch R Inner CLOCK TRIGGER <Equivalent circuit of Rs terminal> PDE-30601-0 Relation No.:IC-SP-02023 R0 P7/13 ECN30601 Product Specification ECN30601 4. Standard application 4.1 External components Components Standard value Usage Co 0.22 µF ± 20% For inner power supply(VB) C1,C2 1.0 µF ± 20% For charge pump D1,D2 Hitachi DFG1C6 (Glass For charge pump mold type), DFM1F6 Remarks Stress voltage is VB(=8.2V) Stress voltage is VCC 600V, 1A trr ≤ 100ns (Resin mold type) Rs CTR or considerable parts Note 1 1800 pF ± 5% For current limit For clock frequency RTR 22 kΩ± 5% For clock frequency Stress voltage is VB(=8.2V) Note2 Stress voltage is VB(=8.2V) Note2 Note 1 Over current detection is determined approximately by next equation. IO = Vref / Rs (A) IO should be determined less than IDC of maximum allowable ratings. To determine sense resistance Rs, refer above comment and appendix 1.2 and 1.3 on pp.12-13 of this document. Note 2. Clock frequency is determined by next equation. fclock ≈ 0.494 / ( CTR x RTR ) (Hz) Vcc D1 D2 C+ CB VCC VB supply Vs + C1 C2 + C0 C CL VS1 VS2 VB Charge Pump CLOCK UT VT WT Top Arm Driver Motor MU Microprocessor MV LVSD MW UB VB WB Bottom Arm Driver Pulse Generator Latch VTR CR C TR CLOCK GL + Filter 1µs Vref 0.5V RS GH1 GH2 R TR RS Vref note; Inside of bold line shows ECN30601 PDE-30601-0 Relation No.:IC-SP-02023 R0 ECN30601 Product Specification P8/13 ECN30601 4.2 Input terminals (UB, VB, WB, UT, VT, WT) Input terminals have a possibility to get an influence from some noise because of their high Impedance. In this case, add resistance and/or capacitance. Resistance : Add pull down resistance to GL terminals, 5.6 kΩ ± 5% Capacitance : Add ceramic capacitance near the terminals. 500 pF ± 20% PDE-30601-0 Relation No.:IC-SP-02023 R0 P9/13 ECN30601 Product Specification ECN30601 5. Terminal layout 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 MV VS1 MU GH1 UT VT WT RS UB VB WB VTR CR CB CL C C+ GL VCC GH2 NC MW VS2 (Marking side) 6. Terminal definition Terminal Symbol Definition Remarks No. 1 VS2 Power supply for upper IGBT of U and V phase Note1,Note2 2 MW W phase output Note1 3 NC Non connected terminal Note4 4 GH2 W phase emitter of IGBT and anode of FWD. Connect Rs. Note3 5 VCC Logic power supply 6 GL Logic ground 7 C+ For Charge pump circuit, power supply for top arm drive circuit Note1 8 CFor Charge pump circuit Note1, Note2 9 CL For Charge pump circuit Note1 10 CB Inner VB power supply 11 CR Connect resistance and capacitance for clock frequency 12 VTR Connect resistance for clock frequency 13 WB Input control signal for W phase bottom arm 14 VB Input control signal for V phase bottom arm 15 UB Input control signal for U phase bottom arm 16 RS RS voltage detect for over current limitation 17 WT Input for W phase top arm control signal 18 VT Input for V phase top arm control signal 19 UT Input for U phase top arm control signal 20 GH1 U and V phase emitter of IGBT and anode of FWD. Note3 Connect Rs. 21 MU U phase output Note1 22 VS1 Power supply for upper IGBT of U phase Note1,Note2 23 MV V phase output Note1 Note1 High voltage terminal. Note2 VS1, VS2 and C- terminals are connected in IC, but should be connect in external circuit between VS1 and VS2. Note3 GH1 and GH2 are not connected in IC, so should be connect in external circuit between GH1 and GH2 Note4 not connected to inner chip. PDE-30601-0 Relation No.:IC-SP-02023 R0 P10/13 ECN30601 Product Specification ECN30601 7. Quality Assurance 7.1 Appearance and dimension ANSI Z1.4-1993 General inspection levels ΙΙ AQL 1.0% 7.2 Electrical characteristics ANSI Z1.4-1993 General inspection levels ΙΙ AQL 0.65% 8. Does and Don’ts 8.1 Tightening torque at 0.39 to 0.78 N-m should be applied for device to attach to heat sink. 8.2 Tab should not be soldered. 8.3 How to protect semiconductor from electrical static discharge (ESD). a) Material of container or any device to carry semiconductor devices should be free from ESD which may be caused by vibration while transportation. To use electric-conductive container or aluminum sheet is recommended as an effective countermeasure. b) Those what touch semiconductor devices such as work platform, machine and measuring and test equipment should be grounded. c) Workers should be grounded connecting with high impedance around 100kΩ to 1MΩ while dealing with semiconductor to avoid electric static discharge which destroying IC. d) Friction with other materials such as a high polymer should not be caused. e) Attention is needed so that electric potential will be kept on the same level by short circuit terminals when IC is mounted and carried on PC board in addition to that vibration or friction might not occur. f) Air conditioning is needed so that humidity should not drop. g) To prevent IC broken by ESD, it should be taken the precautions. 8.4 Applying molding or resin coating is recommended for below mentioned pin-to-pin insulation; 1-2, 2-4, 6-7, 8-9, 9-10, 20-21, 21-22, 22-23 8.5 Protective function against short circuit (ex. load short, line-to-ground short or top/bottom arm short) is not built in this IC. External protection needs to prevent IC breakdown. 8.6 Hitachi high voltage IC is not under screening or process where extremely high reliability is assured. In cases where extremely high reliability is required (such as nuclear power control, aerospace and aviation, traffic equipment, life-support-related medical equipment, fuel control equipment and various kinds of safety equipment) safety should be ensured by customers’ own responsibility. See to it that IC’s breakdown should not damage one’s property or human life. Users should follow the following ; a)Enough deratings degree should be taken in order to minimize failure ratio against maximum ratings considering temperature and operating stress. b)Redundancy design should be applied depending on IC’s importance in a system so that application’s performance will achieve even in a case of IC’s breakdown. c)Reliability design should be implemented on the system, that is fail-safe design to protect property and human life, and foolproof design for users are not very familiar with the system operation. Refer to “Precautions for Use of High-Voltage Monolithic ICs” for more details. PDE-30601-0 Relation No.:IC-SP-02023 R0 P11/13 ECN30601 Product Specification ECN30601 9. Notices 9.1 Contents of this specification are subject to change without prior notice to improve product characteristics. Purchasers are advised to contact Hitachi sales for the latest version of specifications. 9.2 In no event shall Hitachi be liable for any damages or problems that may result from information, any operation on circuits or products in accordance with this specification or violation of intellectual property or any other rights. 9.3 In no event shall Hitachi be liable for any semiconductor device failure or any subsequent damages caused by operation at a value exceeding absolute maximum ratings. 9.4 No license is granted by this specification to implement patents or any other rights belonging to Hitachi, Ltd. 9.5 This Data Book may not be reproduced or duplicated, in any form, in whole or in part, without expressed written permission of Hitachi, Ltd. 9.6 The products and technologies described in this Data Book are not to be provided to any party whose purpose in their application will hinder maintenance of international peace and safety nor are they to be applied to such purpose by their direct purchasers or any third party. When exporting these products and technologies, necessary procedures should be taken in accordance with related laws and regulations. PDE-30601-0 Relation No.:IC-SP-02023 R0 P12/13 ECN30601 Product Specification ECN30601 Supplementary and Reference Data Refer to the below data before handling Hitachi semiconductor device. They are for reference purpose only and not for assurance of products. 1. Area of Safety Operation (ASO) and derating 1.1 ASO Use under ASO region of figure2 of voltage and current at output terminals of IC, while switching. VCC=15V Tj=25oC Output terminal current (A) 1.5 1.0 ASO region 0 400 450 0 Output terminal voltage (V) Fig2. ASO 1.2 Derating design about temperature ASO has dependence on temperature. Determine RS value according derating curve of figure3, including maximum value of reference voltage(Vref) and resistance’s tolerance. Current Limitting Figure IRS (A) 2.0 1.8 VS=400V 1.6 1.4 1.2 VS=450V 1.0 0.8 0.6 0.4 0.2 0.0 -50 0 50 100 150 Junction Temperature Tj(oC) < Fig.3 Derating Curve > PDE-30601-0 Relation No.:IC-SP-02023 R0 P13/13 ECN30601 Product Specification ECN30601 Current Limmiting Figure IRS(A) 1.3 Power supply sequence and derating for VCC Power supply sequence of power on should be VCC on, VS on and control signals (UB,VB,WB,UT,VT,WT) on. For power off, it should be controlled signal off, VS off and VCC off. If the control signals UB, VB and WB are all low, the power supply sequence is free. In case of above sequence can not control such as suddenly stopped the power supply, It should be taken the following. When IGBTs operated with lower gate voltage, it will be occurred the thermal failure because IGBT saturation voltage increases rapidly, especially VCC voltage period is VCCop minimum value to LVSDON minimum value, that is 13.5V to 10V. To avoid this mode, refer derating curve of VCC in figure 4. 2.0 Tj=25oC 1.8 1.6 1.4 (LVSDON min) 1.2 1.0 0.8 (VCCop min) 0.6 (VCCop) 0.4 0.2 0.0 5 10 15 Vcc (V) 20 (VCC maximam allowable rating) < Fig4. Derating Curve of terminal current to Vcc > 1.4 Derating for maximum allowable ratings Derating design standards is below. o a) Temperature ; Junction temperature must be keep under 110 C. b) Voltage ; VS power supply voltage must be keep under 450V. PDE-30601-0 Relation No.:IC-SP-02023 R0 HITACHI POWER SEMICONDUCTORS Notices 1. The information given herein, including the specifications and dimensions, is subject to change without prior notice to improve product characteristics. Before ordering, purchasers are advised to contact Hitachi sales department for the latest version of this data sheets. 2. Please be sure to read "Precautions for Safe Use and Notices" in the individual brochure before use. 3. In cases where extremely high reliability is required (such as use in nuclear power control, aerospace and aviation, traffic equipment, life-support-related medical equipment, fuel control equipment and various kinds of safety equipment), safety should be ensured by using semiconductor devices that feature assured safety or by means of users’ fail-safe precautions or other arrangement. Or consult Hitachi’s sales department staff. 4. In no event shall Hitachi be liable for any damages that may result from an accident or any other cause during operation of the user’s units according to this data sheets. Hitachi assumes no responsibility for any intellectual property claims or any other problems that may result from applications of information, products or circuits described in this data sheets. 5. In no event shall Hitachi be liable for any failure in a semiconductor device or any secondary damage resulting from use at a value exceeding the absolute maximum rating. 6. No license is granted by this data sheets under any patents or other rights of any third party or Hitachi, Ltd. 7. This data sheets may not be reproduced or duplicated, in any form, in whole or in part , without the expressed written permission of Hitachi, Ltd. 8. The products (technologies) described in this data sheets are not to be provided to any party whose purpose in their application will hinder maintenance of international peace and safety not are they to be applied to that purpose by their direct purchasers or any third party. When exporting these products (technologies), the necessary procedures are to be taken in accordance with related laws and regulations. For inquiries relating to the products, please contact nearest overseas representatives which is located “Inquiry” portion on the top page of a home page. Hitachi power semiconductor home page address http://www.hitachi.co.jp/pse