INFINEON TLE6711

Multifunctional Voltage Regulator and Watchdog
TLE 6711
Data Sheet
1
Overview
1.1
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
Step up converter (Boost Voltage)
Boost Over- and Under-Voltage-Lockout
Step down converter (Logic Voltage)
2% output voltage tolerance
Logic Over- and Under-Voltage-Lockout
Overtemperature Shutdown
Power ON/OFF reset generator
Digital window watchdog
System Enable Output
Ambient operation temperature range – 40 °C to 125 °C
Wide Supply voltage operation range
Very low current consumption
Very small P-DSO-14-3 SMD package
Type
Ordering Code
Package
TLE 6711 G
Q67006-A9455-A201-A7
P-DSO-14-3
1.2
Functional Description
The TLE 6711 G is a multifunctional power supply circuit especially designed for
automotive applications.
It delivers a programmable step up voltage (Boost) and a precise 5 V fully short circuit
protected output voltage (Buck).
The TLE 6711 G contains a power on reset feature to start up the system, an integrated
digital window watchdog to monitor the connected microcontroller and a system enable
output to indicate the microcontroller window watchdog faults.
The device is based on Infineon’s power technology SPT® which allows bipolar and
CMOS control circuitry to be integrated with DMOS power devices on the same
monolithic circuitry.
The very small P-DSO-14-3 SMD packages meet the application requirements.
Furthermore, the build-in features like under- and overvoltage lockout for boost- and
Data Sheet V 2.22
1
2001-04-23
TLE 6711
Overview
buck-voltage and the overtemperature shutdown feature increase the reliability of the
TLE 6711 G supply system.
1.3
Pin Definitions and Functions
Pin No.
SO-14
Symbol Function
1
R
Reference Input; an external resistor from this pin to GND
determines the reference current and the oscillator frequency
2
RO
Reset Output; open drain output from reset comparator with an
internal pull up resistor
3
WDI
Watchdog Input; input for the watchdog control signal from the
controller
4
GND
Ground; analog signal ground
5
SEN
System Enable Output; open drain output from Watchdog
fail-circuit with an internal pull up resistor
6
BUC
Buck-Converter Compensation Input; output of internal error
amplifier; for loop-compensation connect an external R-C-series
combination to GND
7
VCC
Supply Voltage Output; buck converter output; external blocking
capacitor necessary
8
BUO
Buck Converter Output; source of the integrated power-DMOS
9
VBOOST
Boost Converter Input; input supply voltage of the IC; coming
from the boost converter output voltage; buck converter input
voltage
10
BDS
Buck Driver Supply Input; voltage to drive the buck converter
powerstage
11
OVL
Boost Status Output; open drain output from boost PWM
comparator
12
BOFB
Boost Converter Feedback Input; connect boost voltage divider
to this pin; internal reference is the boost feedback threshold
VBOFBTH
13
BOGND Boost-Ground; power signal ground; source of boost converter
power-DMOS
14
BOI
Data Sheet V 2.22
Boost Converter Input; drain of the integrated buck converter
power-DMOS
2
2001-04-23
TLE 6711
Overview
1.4
Pin Configuration
R
RO
WDI
GND
SEN
BUC
VCC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
BOI
BOGND
BOFB
OVL
BDS
VBoost
BUO
AEP02960
Figure 1
Pin Configuration (top view)
Data Sheet V 2.22
3
2001-04-23
TLE 6711
Overview
1.5
Block Diagram
BOFB
12
TLE 6711 G
14
Boost
Converter
Biasing
13
VBoost
10
VREF
9
BUC
6
Buck
Converter
8
7
VInternal
5
R
1
Reset,
Window
Watchdog
and
System
Enable
Reference
Current
Generator
and
Oscillator
3
2
11
BOI
BOGND
BDS
VBOOST
BUO
VCC
SEN
WDI
RO
OVL
4
GND
Figure 2
AEB02949
Block Diagram
Data Sheet V 2.22
4
2001-04-23
TLE 6711
Overview
1.6
Absolute Maximum Ratings
Parameter
Symbol
Limit Values
Unit
Remarks
min.
max.
VBOI
VBOOST
VBOFB
VBUO
VBDS
VBUC
– 0.3
46
V
–
– 0.3
46
V
–
– 0.3
46
V
–
–1
46
V
–
– 0.3
48
V
–
– 0.3
6.8
V
–
VCC
VRO
VSEN
– 0.3
6.8
V
–
– 0.3
6.8
V
–
– 0.3
6.8
V
–
VR
VWDI
VOVL
– 0.3
6.8
V
–
– 0.3
6.8
V
–
– 0.3
6.8
V
–
Voltages
Boost input voltage
Boost output voltage
Boost feedback voltage
Buck output voltage
Buck driver supply voltage
Buck compensation input
voltage
Logic supply voltage
Reset output voltage
System Enable output
voltage
Current reference voltage
Watchdog input voltage
OVL output voltage
ESD-Protection (Human Body Model; R = 1.5 kΩ; C = 100 pF)
All pins to GND
VHBM
–2
2
kV
–
Tj
Tstg
– 40
150
°C
–
– 50
150
°C
–
Temperatures
Junction temperature
Storage temperature
Note: Stresses above those listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Data Sheet V 2.22
5
2001-04-23
TLE 6711
Overview
1.7
Operating Range
Parameter
Symbol
Limit Values
Unit
Remarks
min.
max.
VBOI
VBOOST
– 0.3
40
V
–
5
35
V
VBOOST increasing
Boost input voltage;
(normal operation)
VBOOST
4.5
36
V
VBOOST decreasing
Boost input voltage
VBOOST
– 0.3
4.5
V
Boost- and
Buck-Converter
OFF
0
3.0
V
–
– 0.6
40
V
–
– 0.3
48
V
–
0
3.0
V
–
VCC
VRO
VSEN
4.00
6.25
V
–
– 0.3
–
– 0.3
VCC + 0.3 V
VCC + 0.3 V
VWDI
VR
Tj
0
VCC + 0.3 V
–
0
3.0
V
–
– 40
150
°C
–
Rthj-a
–
120
K/W
–
Boost input voltage
Boost input voltage;
(normal operation)
VBOFB
Buck output voltage
VBUO
Buck driver supply voltage VBDS
Buck compensation input
VBUC
Boost feedback voltage
voltage
Logic supply voltage
Reset output voltage
System Enable output
voltage
Watchdog input voltage
Current reference voltage
Junction temperature
–
Thermal Resistance
Junction ambient
Note: In the operating range, the functions given in the circuit description are fulfilled.
Data Sheet V 2.22
6
2001-04-23
TLE 6711
Overview
1.8
Electrical Characteristics
8 V < VBoost < 35 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; RR = 47 kΩ; all voltages
with respect to ground; positive current defined flowing into pin; unless otherwise
specified.
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Conditions
Current Consumption
Current consumption;
see application circuit
IBoost
–
1.5
4
Current consumption;
see application circuit
IBoost
–
5
10
ICC = 0 mA;
IBoLoad = 0 mA
mA ICC = 200 mA;
IBoLoad = 50 mA
mA
Under- and Over-Voltage Lockout at VBoost
UV ON voltage;
boost and buck conv. ON
VBOUVON 4.0
4.5
5.0
V
VBOOST increasing;
UV OFF voltage;
boost and buck conv. OFF
VBOUVOFF 3.5
4.0
4.5
V
VBOOST decreasing
UV Hysteresis voltage
VBOUVHY 0.2
VBOOVOFF 34
0.5
1.0
V
HY = ON - OFF
37
40
V
VBOOST increasing
OV ON voltage;
boost conv. ON
VBOOVON 30
33
36
V
VBOOST decreasing
OV Hysteresis voltage
VBOUVHY
4
10
V
HY = OFF - ON
OV OFF voltage;
boost conv. OFF
1.5
Over-Voltage Lockout at VCC
OV OFF voltage;
buck conv. OFF
VBUOVOFF 5.5
6.0
6.5
V
VCC increasing
OV ON voltage;
buck conv. ON
VBUOVON 5.25
5.75
6.25
V
VCC decreasing
OV Hysteresis voltage
VBUOVHY
0.25
0.50
V
HY = OFF - ON
Data Sheet V 2.22
0.10
7
2001-04-23
TLE 6711
Overview
1.8
Electrical Characteristics (cont’d)
8 V < VBoost < 35 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; RR = 47 kΩ; all voltages
with respect to ground; positive current defined flowing into pin; unless otherwise
specified.
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Conditions
Boost-Converter; BOI, BOFB and VBOOST
Boost voltage;
see application circuit
VBOOST
24.0
27.5
31.0
V
5 mA < IBoost <
100 mA; Tj = 25 °C
8 V < VBatt < 16 V
Boost Voltage;
see application circuit
VBOOST
23
–
32
V
5 mA < IBoost <
100 mA;
8 V < VBatt < 16 V
–
80
–
%
Efficiency; see. appl. circuit η
Power-Stage ON
resistance
RBOON
–
0.6
0.75
Ω
Power-Stage ON
resistance
RBOON
–
–
1.4
Ω
IBoost = 100 mA
Tj = 25 °C;
IBOI = 1 A
IBOI = 1 A
Boost overcurrent threshold IBOOC
1.0
1.3
1.8
A
–
Feedback threshold voltage VBOFBTH
2.55
2.7
2.85
V
–2
– 0.4 0
µA
VBOI = 12 V
IBoost = 25 mA
2 V < VBOFB< 4 V
4.9
–
5.1
V
1 mA < ICC <
250 mA; see. appl.
circuit
–
85
–
%
Feedback input current
IFB
Buck-Converter; BUO, BDS, BUC and VCC
Logic supply voltage
VCC
Efficiency; see. appl. circuit η
Power-Stage ON
resistance
RBUON
–
0.38
0.5
Ω
Power-Stage ON
resistance
RBUON
–
–
1.0
Ω
ICC = 250 mA;
VBoost = 25 V
Tj = 25 °C;
IBUO = 1 A
IBUO = 1 A
0.7
0.95
1.2
A
–
Buck overcurrent threshold IBUOC
Data Sheet V 2.22
8
2001-04-23
TLE 6711
Overview
1.8
Electrical Characteristics (cont’d)
8 V < VBoost < 35 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; RR = 47 kΩ; all voltages
with respect to ground; positive current defined flowing into pin; unless otherwise
specified.
Parameter
Input current on pin VCC
Buck Gate supply voltage;
VBGS = VBDS – VBOOST
Symbol
ICC
VBGS
Limit Values
Unit Test Conditions
min.
typ.
max.
–
0.2
0.5
mA
VCC = 5 V
5
–
10
V
–
Reference Input; R
(Oscillator; Timebase for Boost- and Buck-Converter, Reset and Watchdog)
VR
fOSC
fOSC
tCYL
1.3
1.4
1.5
V
85
95
105
kHz Tj = 25 °C
75
–
115
kHz –
–
1.05
–
ms
tCYL = 100/fOSC
Reset threshold;
VCC decreasing/increasing
VRT
4.50
4.65
4.75
V
VRO H to L or L to H
Reset low voltage
VROL
–
0.2
0.4
V
Reset low voltage
VROL
–
0.2
0.4
V
Reset high voltage
VROH
VCC – –
VCC + V
0.1
0.1
Voltage on pin R
Oscillator frequency
Oscillator frequency
Cycle time for watchdog
and reset timing
–
Reset Generator; RO
Reset pull up current
Reset Reaction time
Power-up reset delay time
Data Sheet V 2.22
transition;
VRO remains low
down to VCC > 1 V
IRO
tRR
tRD
IROL = 2 mA;
2.5 V < VCC < VRT
IROL = 0.2 mA;
1 V < VCC < VRT
IROH = 0 mA
–
240
–
µA
0 V < VRO < 4 V
50
100
150
µs
–
64
–
tCYL
VCC < VRT
VCC ≥ 4.8 V
9
2001-04-23
TLE 6711
Overview
1.8
Electrical Characteristics (cont’d)
8 V < VBoost < 35 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; RR = 47 kΩ; all voltages
with respect to ground; positive current defined flowing into pin; unless otherwise
specified.
Parameter
Symbol
Limit Values
Unit Test Conditions
min.
typ.
max.
–
–
0.7 × V
Watchdog Generator; WDI
H-input voltage threshold
VWDIH
–
VCC
L-input voltage threshold
VWDIL
0.3 × –
–
V
–
VCC
TWD
tSR
–
128
–
–
64
–
tCYL VCC ≥ 4.8 V
tCYL VCC ≥ 4.8 V
Reset duration;
after watchdog time-out
tWDR
–
64
–
tCYL VCC ≥ 4.8 V
Open window time
tOW
tCW
tWD
–
32
–
–
32
–
–
46.4
–
tCYL VCC ≥ 4.8 V
tCYL VCC ≥ 4.8 V
tCYL VCC ≥ 4.8 V
Watchdog period
Start of reset;
after watchdog time-out
Closed window time
Window watchdog trigger
time
System Enable Output; SEN
Enable low voltage
VSENL
–
0.2
0.4
V
Enable low voltage
VSENL
–
0.2
0.4
V
Enable high voltage
VSENH
VCC – –
VCC + V
0.1
0.1
Enable pull up current
Data Sheet V 2.22
ISEN
–
240
10
–
µA
ISENL = 2 mA;
2.5 V < VCC < VRT
ISENL = 0.2 mA;
1 V < VCC < VRT
ISENH = 0 mA
0 V < VSEN < 4 V
2001-04-23
TLE 6711
Overview
1.8
Electrical Characteristics (cont’d)
8 V < VBoost < 35 V; 4.75 V < VCC < 5.25 V; – 40 °C < Tj < 150 °C; RR = 47 kΩ; all voltages
with respect to ground; positive current defined flowing into pin; unless otherwise
specified.
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Conditions
Boost Status Output; OVL
Enable low voltage
VOVLL
–
0.2
0.4
V
IOVLL = 1 mA;
2.5 V < VCC < VRT
Boost feedback threshold
voltage;
VOVLTH
2.3
2.45
2.6
V
See application
circuit
Thermal Shutdown (Boost and Buck-Converter OFF)
Thermal shutdown junction TjSD
temperature
150
175
200
°C
–
Thermal switch-on junction TjSO
temperature
120
–
170
°C
–
–
30
–
K
–
Temperature hysteresis
∆T
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.
Data Sheet V 2.22
11
2001-04-23
TLE 6711
Circuit Description
2
Circuit Description
Below some important sections of the TLE 6711 are described in more detail.
2.1
Power On Reset
In order to avoid any system failure, a sequence of several conditions has to be passed.
In case of VCC power down (VCC < VRT for t > tRR) a logic LOW signal is generated at the
pin RO to reset an external microcontroller. When the level of VCC reaches the reset
threshold VRT, the signal at RO remains LOW for the Power-up reset delay time tRD
before switching to HIGH. If VCC drops below the reset threshold VRT for a time extending
the reset reaction time tRR, the reset circuit is activated and a power down sequence of
period tRD is initiated. The reset reaction time tRR avoids wrong triggering caused by short
“glitches” on the VCC-line.
< t RR
VCC
VRT
< t RD
typ. 4.65 V
1V
Start-Up
RO
H
L
ON Delay
Invalid
t RD
Power
Start-Up
ON Delay
Started
ON Delay
Stopped
Invalid
Invalid
t RR
Normal
t
t
t RD
Failed
N
Failed
Normal
AET02950
Figure 3
2.2
Reset Function
Watchdog Operation
The watchdog uses one hundred of the oscillator’s clock signal period as a timebase,
defined as the watchdog cycle time tCYL.
After power-on, the reset output signal at the RO pin (microcontroller reset) is kept LOW
for the reset delay time tRD, i.e. 64 cycles. With the LOW to HIGH transition of the signal
at RO the device starts the closed window time tCW = 32 cycles. A trigger signal within
this window is interpreted as a pretrigger failure according to the figures shown below.
After the closed window the open window with the duration tOW is started. The open
Data Sheet V 2.22
12
2001-04-23
TLE 6711
Circuit Description
window lasts at minimum until the trigger process has occurred, at maximum tOW is
32 cycles.
A HIGH to LOW transition of the watchdog trigger signal on pin WDI is taken by a trigger.
To avoid wrong triggering due to parasitic glitches two HIGH samples followed by two
LOW samples (sample period tCYL) are decoded as a valid trigger. If a trigger signal
appears at the watchdog input pin WDI during the open window or a power up/down
occurs, the watchdog window signal is reset and a new closed window follows.
A reset is generated (RO goes LOW) if there is no trigger pulse during the open window
or if a pretrigger occurs during the closed window. This reset happens after 64 cycles
after the latest valid closed window start time and lasts for further 64 cycles.
The triggering is correct also, if the first three samples (two HIGH one LOW) of the trigger
pulse at pin WDI are inside the closed window and only the fourth sample (the second
LOW sample) is taken in the open window.
In addition to the microcontroller reset signal RO the device generates a system enable
signal at pin SEN. If RO is HIGH the system enable goes active HIGH with the first valid
watchdog trigger pulse at pin WDI. The SEN output goes LOW immediately if a
pretrigger, a missing trigger or a power down reset occurs.
Data Sheet V 2.22
13
2001-04-23
TLE 6711
Circuit Description
TWD = 256*tCYL
tSR = 64*tCYL
tWDR = 64*tCYL
tCW=32*tCYL
tOW=32*tCYL
definition
closed window
open window
definition
reset start delay time after window
watchdog timeout
t EOW = end of open window
tECW
worst case
reset duration time after window
watchdog time-out
Example with:
t (CW+OW)min= ( tCW+ tOW ) (1 - ∆)
∆
fOSC=fOSCmax
tCYL=1ms
∆=10% (oscillator deviation)
t CWmax= tCW (1+∆
∆)
fOSC=fOSCmin
t(CW+OW)min=(tCW+tOW)*(1-∆
∆)=
=(32+32)x0,9= 57,6ms
t OWmin
∆)=32*1,1=35,2ms
tCWmax= tCW(1+∆
t WD
Closed window
Open window
Watchdog
trigger signal
WDI
Valid
WDI
Indifferent
WDI
Not valid
t ECW
Closed window
t EOW
= Watchdog decoder sample point
Figure 4
Open window
AET02952
Window Watchdog Definitions
Data Sheet V 2.22
14
2001-04-23
TLE 6711
Circuit Description
a) Perfect Triggering after Power on Reset
VCC
VRT
t
tRD = 64 Cycles
RO
t
32 Cycles
WDWI
CW
OW CW OW CW
CW
t
32 Cycles
WDI
xx
xx
xx
xx
t1
SEN
t2
System Failed
xx
xx
t3
t
System Enable
System Failed
t
b) Incorrect Triggering
tWDR = 64 Cycles
tSR = 64 Cycles
tSR = 64 Cycles
RO
t
TWD = 128 Cycles
WDWI
CW OW
CW
OW
CW OW CW OW
t
32 Cycles
WDI
xx
x
xx x
xx x xx
1)
2)
xx
x
xx
3)
4)
SEN
t
1)
Pretrigger
2)
Incorrect trigger duration within watchdog
open window OW: tHIGH < 2 Cycles
3)
Incorrect trigger duration within watchdog
open window OW: tLOW < 2 Cycles
4)
Missing trigger
Figure 5
t
Legend: WDWI = Internal Watchdog Window
OW = Open Window (trigger signal at WDI)
CW = Closed Window (trigger signal at WDI)
x = Sample Point
AED02945
Window Watchdog Function
Data Sheet V 2.22
15
2001-04-23
TLE 6711
Circuit Description
2.3
Boost Converter
The TLE 6711 contains a fully integrated boost converter (except the boost-diode),
which provides a supply voltage for an energy reserve e.g. an airbag firing system. The
regulated boost output voltage VBOOST is programmable by a divider network (external
resistors) providing the feedback voltage for the boost feedback pin BOFB. The energy
which is stored in the external electrolytic capacitor at VBOOST guarantees accurate
airbag firing, even if the battery is disconnected by a car crash.
The boost inductance LBO (typ. 100 µH) is PWM-switched by an integrated current
limited power DMOS transistor with a programmable (external resistor RR) frequency.
An internal bandgap reference provides a temperature independent, on chip trimmed
reference voltage for the regulation loop. An error amplifier compares the reference
voltage with the boost feedback signal VBOFB from the external divider network
(determination of the output boost voltage VBOOST).
Application note for programming the output voltage at pin VBOOST:
( R BO1 + R BO2 )
V BOOST = V BOF BTH × -----------------------------------R BO2
With a PWM (Pulse Width Modulation) comparator the output of the error amplifier is
compared to a periodic linear ramp, provided by a sawtooth signal of the oscillator
connected to pin R. A logic signal with variable pulse width is generated. It passes
through the logic circuits (sets the output latch PWM-FF) and driver circuits to the power
switching DMOS. The Schmitt-trigger output resets the output flip-flop PWM-FF by
NOR 2. The PWM signal is gated by the NAND 2 to guarantee a dominant reset.
Data Sheet V 2.22
16
2001-04-23
TLE 6711
Circuit Description
OV
COMP L when
NAND 3
OV at VBoost
&
+
-
= VthOV
38 V
H when
Tj > 175 ˚C
or OV at VBoost
L when
Tj > 175 ˚C
GND
UV
COMP
VBoost
+
-
VthUV
H when
VBoost < 4 V
1
Error
Gate
BOI
Pin 14
Error-FF
L when
H when NOR 2
R & Q
Error
Error
1
R
H when
Overcurrent
=
4V
NOR 1
PWM-FF
INV
H=
& Q OFF 1
&
Q
=
S
PWM
COMP
Error-Ramp
=
+
-
Error-Signal
+
-
H when
Error-Signal
<
Error-Ramp
GND
Oscillator
R
Pin 1
Vmax
Vmin
Schmitt-trigger 1
Unlock
Detector
Ramp Vhigh
tr tf tr
Vlow
t
tr tf tr
t
OC
COMP
+
-
BOFB
Pin 12
&
&
Error
AMP
10 µA
VREF
NAND 2
Q
S
I Pullup
2.8 V
&
Power
D-MOS
Gate
Driver
NAND1
GND
H=
ON
VthOC
18 mV
R Sense
14.5 m Ω
BOGND
Pin 13
OVL
Boost Status Pin 11
Low if Battery
Disconnected
Clock
GND
H when Outputcurrent > 1.2 A
AEB02946
Figure 6
Boost Converter Block Diagram
Figure 7 shows the most important waveforms during operation; for low, medium and
high loads up to overload condition. The output transistor is switched off immediately if
the overcurrent comparator detects an overcurrent level at the power DMOS or if the
sense output switches to low induced by a VBOOST undervoltage command.
The TLE 6711 is also protected against several boost loop errors:
In case of a feedback interruption a pull up current source (IFB typ. 0.4 µA), integrated at
pin BOFB pulls the voltage at the feedback pin BOFB above the reference voltage. The
boost output is switched off by the high error voltage which controls the
PWM-Comparator at a zero duty cycle.
In the case of a resistive loop error caused by leakage currents to ground, the boost
output voltage would increase to very high values. In order to protect the VBOOST input as
well as the external load against catastrophic failures, an overvoltage protection is
provided which switches the output transistor off as soon as the voltage at pin VBOOST
exceeds the internal fixed overvoltage threshold VBOOVOFF = typ. 37 V.
Data Sheet V 2.22
17
2001-04-23
TLE 6711
Circuit Description
Application Note:
A short circuit from VBOOST to ground will not destroy the IC, however, it may damage the
external boost diode or the boost inductance if there is no overcurrent limitation in that
path.
VC
Error Voltage
and
VError
VCP
VCV
t
OCLK
H
L
PWM
H
L
t
I BOI
I BOLI
t
I DBO
t
VBOI
t
VBOOST
VS
t
Overcurrent Threshold Exceeded
Load-Current Increasing with Time;
Controlled by the Error Amp
Controlled by the
Overcurrent Comp
AED02672
Figure 7
Most Important Waveforms of the Boost Converter Circuit
Data Sheet V 2.22
18
2001-04-23
TLE 6711
Circuit Description
2.3.1
Boost Status Output OVL
For supervision of the Boost output voltage an open drain DMOS output is used. The
output is high impedance in normal operation and low during the warning.
The OVL goes LOW if the PWM comparator output (see Boost Converter Block
Diagram) remains HIGH for clock time period. This occurs when the Error-Signal falls
below the minimum value of the Error-Ramp, this mean that Boost voltage falls below a
certain threshold voltage.
The OVL output used as a warning for insufficient Boost voltage.
2.4
Buck Converter
A stabilized logic supply voltage (typ. 5 V) for general purpose is realized in the system
by a buck converter. An external buck-inductance LBU is PWM switched by a high side
DMOS power transistor with the programmed frequency (pin R).
The buck regulator supply is given by the boost converter output VBOOST, in case of a
battery power-down the stored energy of the boost converter capacitor is used.
Like the boost converter, the buck converter uses the temperature compensated
bandgap reference voltage (typ. 2.8 V) for its regulation loop.
This reference voltage is connected to the non-inverting input of the error amplifier and
an internal voltage divider supplies the inverting input. Therefore the output voltage VCC
is fixed due to the internal resistor ratio to typ. 5.0 V.
The output of the error amplifier goes to the inverting input of the PWM comparator as
well as to the buck compensation output BUC.
When the error amplifier output voltage exceeds the sawtooth voltage the output power
MOS-transistor is switched on. So the duration of the output transistor conduction phase
depends on the VCC level. A logic signal PWM with variable pulse width is generated.
Data Sheet V 2.22
19
2001-04-23
TLE 6711
Circuit Description
VCC
UV
COMP
H when
UV at VBoost
OV
COMP H when
OV at VCC
+
+
-
200 Ω
4V
L when
Overcurrent
OC
COMP
VthOC
18 mV
L when
Overcurrent
Boost
Driver
Supply
VCC
+
-
R VCC2
28kΩ
PWM H when
Error- COMP Error-Signal
<
Signal
Error-Ramp
ErrorRamp
= VREF
2.8 V
R
Error-FF
R
&
Vmax
Vmin
Figure 8
tr tf tr
Schmitt-trigger 1
t
Ramp
Vhigh
Vlow
Pin 9
R Sense
18 mΩ
BDS
Pin 10
H=
Q OFF
Q
INV
1
H=
ON
Power
D-MOS
Gate
Driver
&
&
S
Q
BUO
Pin 8
&
S
tr tf tr
&
NAND 2
OFF when H
Oscillator
PWM-FF
1
Output Stage
OFF when H
L when
Tj > 175 ˚C
GND GND
VBoost
NOR 1
+
-
Error
AMP
R VCC1
22kΩ
R
Pin 1
VthUV
GND
VCC
Pin 7
=
GND GND
R Prot1
BUC
Pin 6
= VthOV
1.2 V
=
-
R VCC4
10.3kΩ
+
-
R VCC3
39.7kΩ
t
Q
Clock
AEB02947
Buck Converter Block Diagram
External loop compensation is required for converter stability, and is formed by
connecting a compensation resistor-capacitor series-network (RBUC, CBUC) between pin
BUC and GND.
In the case of overload or short-circuit at VCC (the output current exceeds the buck
overcurrent threshold IBUOC) the DMOS output transistor is switched off by the
overcurrent comparator immediately. The pulse width is then controlled by the
overcurrent comparator as seen before in the boost description.
In order to protect the VCC input as well as the external load against catastrophic failures,
an overvoltage protection is provided which switches the output transistor off as soon as
the voltage at pin VCC exceeds the internal fixed overvoltage threshold VBUOVOFF = typ.
6.0 V.
Data Sheet V 2.22
20
2001-04-23
TLE 6711
Circuit Description
VC
Error Voltage
and
VError
VCP
VCV
t
OCLK
H
L
PWM
H
L
t
I BUO
I BULI
t
I DBU
t
VBUO
t
VBOOST
VCC5
t
Overcurrent Threshold Exceeded
Load-Current Increasing with Time;
Controlled by the Error Amp
Controlled by the
Overcurrent Comp
AED02673
Figure 9
Most Important Waveforms of the Buck Converter Circuit
Data Sheet V 2.22
21
2001-04-23
TLE 6711
Application Circuit
3
Application Circuit
Figure 10 shows the application circuit of the TLE 6711 with the suggested external
parts.
D1
L BO
D2
CL
VBatt
ZD1
36 V
10 µF
DBO
100 µH
I BOLoad
CS
220 nF
R BO1
CBO1
100 k Ω CBO1
CBO2
4700 µF 220 nF
10 nF
BOFB
12
TLE 6711 G
R BO2
Boost
Converter
Biasing
10 k Ω
14 BOI
VBOOST
13 BOGND
CBOT
VBoost
10 BDS 10 nF
VREF
9 VBOOST
BUC 6
L BU
Buck
Converter
8 BUO
R BUC
47 k Ω
7 VCC
CBUC
220 µH
DBU
CBU1
CBU2
100 µF
220 nF
VInternal
470
nF
System
Enable
Output
Watchdog
Trigger
Input
5 SEN
R 1
RR
47 k Ω
Reference
Current
Generator
and
Oscillator
Reset
Window
Watchdog
and
System
Enable
3 WDI
10 k Ω
2 RO
Reset
Output
Boost
Status
Output
11 OVL
4 GND
Figure 10
VCC
Device Type
Supplier Remarks
D1
BAW78C
Infineon 200 V; 1 A; SOT-89
D2
BAW78C
Infineon 200 V; 1 A; SOT-89
D BO
BAW78B
Infineon 100 V; 1 A; SOT-89
D BO
SS14
multiple Schottky; 40 V; 1 A
D BU
-
-
L BO
B82442-A1104 EPCOS 100 µH; 0.25 A; 1.28 Ω
L BO
L BU
Do3316P-104 Coilcraft 100 µH; 1.2 A; 0.28 Ω
L BU
Do3316P-224 Coilcraft 220 µH; 0.8 A; 0.61 Ω
Schottky; 100 V; 1 A
B82442-H2204 EPCOS 220 µH; 0.24 A; 2.72 Ω
AEB02948
Application Circuit
Data Sheet V 2.22
22
2001-04-23
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
4
Diagrams: Oscillator
Performance
and
Boost/Buck-Converter
In the following the behaviour of the Boost/Buck-converter and the oscillator is shown.
Oscillator Frequency Deviation
vs. Junction Temperature
AED02938
10
kHz
Boost Feedback Current vs.
Junction Temperature
∆f OSC
5
-200
nA
Referred to f OSC
at Tj = 25 ˚C
AED02939
I FB
-300
0
-400
-5
-500
-10
-600
-15
-50 -25 0
25 50 75 100 ˚C 150
Tj
-700
-50 -25 0
25 50 75 100 ˚C 150
Tj
Data Sheet V 2.22
23
2001-04-23
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
Current Consumption vs.
Junction Temperature
Efficiency Buck vs.
Boost Voltage
AED02940
3
mA
AED02941
95
η %
I Boost
90
2.5
Boost ON
Buck ON
I BO boost = 0 mA
I CC = 0 mA
2
VCC = 5 V
85
I Load = 120 mA
80
1.5
80 mA
75
1
70
0.5
-50 -25 0
65
25 50 75 100 ˚C 150
40 mA
5
15
25
V 30
VBoost
Tj
Efficiency Buck vs.
Load
η
AED02942
90
%
85
RT, HT
CT
80
75
70
65
50
150
mA
250
I LOAD
Data Sheet V 2.22
24
2001-04-23
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
Efficiency Boost vs.
Input Voltage
AED02943
95
%
η
Boost Output Voltage vs.
Load
AED02944
31
V
I Boost = 60 mA
VBoost
30
90
HT
85
CT
RT
80
28
75
27
70
10
8
12
14
RT
HT
CT
29
26
V 16
20
40
60
80 mA 100
VBatt
I LOAD
Oscillator Frequency vs. Resistor
from R to GND
Boost and Logic Output Voltage vs.
Junction Temperature
AED02982
1000
kHz
fOSC
VBoost
500
AED02983
30
V
29
28
I Boost = 50 mA
27
200
26
@ Tj = 25 ˚C
100
VCC
50
V
5.025
5.000
20
I CC = 250 mA
4.975
10
5
10
20
50 100 200
4.950
-50 -25 0
kΩ 1000
˚C 150
Tj
RR
Data Sheet V 2.22
25 50 75 100
25
2001-04-23
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
Boost and Buck ON Resistance vs.
Junction Temperature
Boost and Buck Overcurrent Threshold
vs. Junction Temperature
AED02984
1000
mΩ
I OC
R ON
AED02985
1.4
A
1.3
800
R BOON @ I BOI = 1 A
I BOOC (Boost-Converter)
700
1.2
600
1.1
500
400
R BUON @ I BUO = 1 A
1
300
200
I BUOC (Buck-Converter)
0.9
100
0
-50 -25 0
25 50 75 100
0.8
-50 -25 0
˚C 150
˚C 150
Tj
Tj
Data Sheet V 2.22
25 50 75 100
26
2001-04-23
TLE 6711
Package Outlines
5
Package Outlines
GPS05474
P-DSO-14-3
(Plastic Dual Small Outline Package)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”
SMD = Surface Mounted Device
Data Sheet V 2.22
27
Dimensions in mm
2001-04-23
TLE 6711
Edition 2001-04-23
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
© Infineon Technologies AG 2001.
All Rights Reserved.
Attention please!
The information herein is given to describe
certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical
change reserved.
We hereby disclaim any and all warranties,
including but not limited to warranties of
non-infringement, regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC
manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please
contact your nearest Infineon Technologies
Office in Germany or our Infineon Technologies Representatives worldwide (see address list).
Warnings
Due to technical requirements components
may contain dangerous substances. For information on the types in question please
contact your nearest Infineon Technologies
Office.
Infineon Technologies Components may only
be used in life-support devices or systems
with the express written approval of Infineon
Technologies, if a failure of such components
can reasonably be expected to cause the failure of that life-support device or system, or to
affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and
sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the
user or other persons may be endangered.
Data Sheet V 2.22
28
2001-04-23