INFINEON TLE6711GL

Data Sheet, Rev. 3.4, August 2007
TLE 6711 G/GL
Multifunctional Voltage Regulator and Watchdog
Automotive Power
Multifunctional Voltage Regulator and Watchdog
TLE 6711 G
TLE 6711 GL
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Step up converter (Boost Voltage)
Boost Over- and Under-Voltage-Lockout
Step down converter (Logic Voltage)
2% output voltage tolerance
Logic Over- and Under-Voltage-Lockout
Overtemperature Shutdown
Power ON/OFF reset generator
Digital window watchdog
System Enable Output
Ambient operation temperature range
-40 °C to 125 °C
Wide Supply voltage operation range
Very low current consumption
Very small PG-DSO-14-1 SMD package
Green Product (RoHS Compliant)
AEC Qualified
P/PG-DSO-14-3, -8, -9, -11, 14
Description
P/PG-DSO-20 -1, -6, -7, -9, -14, -15, -17, -18
The TLE 6711 G/GL is a multifunctional power supply circuit especially
designed for automotive applications.
It delivers a programmable step up voltage (Boost) and a precise 5 V
fully short circuit protected output voltage (Buck).
The TLE 6711 G/GL contains a power on reset feature to start up
the system, an integrated digital window watchdog to monitor the
connected microcontroller and a system enable output to indicate the microcontroller window watchdog faults.
The device is based on Infineon’s power technology SPT® which allows bipolar and CMOS control circuitry to be
integrated with DMOS power devices on the same monolithic circuitry.
The very small PG-DSO-14-1 SMD packages meet the application requirements.
Furthermore, the build-in features like under- and overvoltage lockout for boost- and buck-voltage and the
overtemperature shutdown feature increase the reliability of the TLE 6711 G/GL supply system.
Type
Package
TLE 6711 G
PG-DSO-14-1
TLE 6711 GL
PG-DSO-20-36
Data Sheet
2
Rev. 3.4, 2007-08-16
TLE 6711
Block Diagram
1
Block Diagram
BOFB
12
TLE 6711 G
14
Boost
Converter
Biasing
13
VBoost
10
VREF
9
BUC
6
Buck
Converter
8
7
VInternal
5
R
1
Reset,
Window
Watchdog
and
System
Enable
Reference
Current
Generator
and
Oscillator
3
2
11
BOI
BOGND
BDS
VBOOST
BUO
VCC
SEN
WDI
RO
OVL
4
GND
Figure 1
Data Sheet
AEB02949
Block Diagram (pinning valid for PG-DSO-14-1)
3
Rev. 3.4, 2007-08-16
TLE 6711
Pin Configuration
2
Pin Configuration
2.1
Pin Assignment
R
RO
WDI
GND
SEN
BUC
VCC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
BOI
BOGND
BOFB
OVL
BDS
VBoost
BUO
AEP02960
Figure 2
Pin Configuration PG-DSO-14-1 (top view)
R
1
20 BOI
RO
2
19 BOFB
WDI
3
18 OVL
GND
4
17 GND
GND
5
16 GND
GND
6
15 GND
GND
7
14 GND
SEN
8
13 BDS
BUC
9
12 VBOOST
VCC 10
Figure 3
Data Sheet
11 BUO
Pin Configuration PG-DSO-20-36 (top view)
4
Rev. 3.4, 2007-08-16
TLE 6711
Pin Configuration
2.2
Pin Definitions and Functions
Pin
SO-14
Pin
SO-20
Symbol
Function
1
1
R
Reference Input; an external resistor from this pin to GND determines the
reference current and the oscillator frequency
2
2
RO
Reset Output; open drain output from reset comparator with an internal pull-up
resistor
3
3
WDI
Watchdog Input; input for the watchdog control signal from the controller
4
4, 5, 6, 7, GND
14, 15,
16, 17
Ground; analog signal ground
5
8
SEN
System Enable Output; open drain output from Watchdog fail-circuit with an
internal pull-up resistor
6
9
BUC
Buck-Converter Compensation Input; output of internal error amplifier; for
loop-compensation connect an external R-C-series combination to GND
7
10
VCC
Supply Voltage Output; buck converter output; external blocking capacitor
necessary
8
11
BUO
Buck Converter Output; source of the integrated power-DMOS
9
12
VBOOST
Boost Converter Input; input supply voltage of the IC; coming from the boost
converter output voltage; buck converter input voltage
10
13
BDS
Buck Driver Supply Input; voltage to drive the buck converter powerstage
11
18
OVL
Boost Status Output; open drain output from boost PWM comparator
12
19
BOFB
Boost Converter Feedback Input; connect boost voltage divider to this pin;
internal reference is the boost feedback threshold VBOFBTH
13
–
BOGND
Boost-Ground; power signal ground; source of boost converter power-DMOS
14
20
BOI
Boost Converter Input; drain of the integrated buck converter power-DMOS
Data Sheet
5
Rev. 3.4, 2007-08-16
TLE 6711
General Product Characteristics
3
General Product Characteristics
3.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
-0.3
46
V
–
-0.3
46
V
–
-0.3
46
V
–
-1
46
V
–
-0.3
48
V
0 °C < Tj ≤ 150 °C
47
V
-40 °C ≤ Tj ≤ 0 °C
Voltages
3.1.1
Boost input voltage
3.1.2
Boost output voltage
3.1.3
Boost feedback voltage
3.1.4
Buck output voltage
3.1.5
Buck driver supply voltage
VBOI
VBOOST
VBOFB
VBUO
VBDS
3.1.6
3.1.7
Buck compensation input voltage
3.1.8
Logic supply voltage
3.1.9
Reset output voltage
3.1.10
System Enable output voltage
3.1.11
Current reference voltage
3.1.12
Watchdog input voltage
3.1.13
OVL output voltage
VBUC
VCC
VRO
VSEN
VR
VWDI
VOVL
-0.3
6.8
V
–
-0.3
6.8
V
–
-0.3
6.8
V
–
-0.3
6.8
V
–
-0.3
6.8
V
–
-0.3
6.8
V
–
-0.3
6.8
V
–
Tj
Tstg
-40
150
°C
–
-50
150
°C
–
VHBM
-2
2
kV
Human Body
Model; R = 1.5 kΩ;
C = 100 pF
Temperatures
3.1.14
Junction Temperature
3.1.15
Storage Temperature
ESD Susceptibility
3.1.16
All pins to GND
1) Not subject to production test, specified by design.
Attention: Stresses above the ones listed here may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Attention: Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as “outside” normal operating
range. Protection functions are not designed for continuous repetitive operation.
Data Sheet
6
Rev. 3.4, 2007-08-16
TLE 6711
General Product Characteristics
3.2
Pos.
Operating Range
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
VBOI
VBOOST
-0.3
40
V
–
5
35
V
VBOOST increasing
3.2.1
Boost input voltage
3.2.2
Boost input voltage;
(normal operation)
3.2.3
Boost input voltage;
(normal operation)
VBOOST
4.5
36
V
VBOOST decreasing
3.2.4
Boost input voltage
VBOOST
-0.3
4.5
V
Boost- and BuckConverter OFF
3.2.5
Boost feedback voltage
0
3.0
V
–
3.2.6
Buck output voltage
-0.6
40
V
–
3.2.7
Buck driver supply voltage
VBOFB
VBUO
VBDS
-0.3
48
V
0 °C < Tj ≤ 150 °C
47
V
-40 °C ≤ Tj ≤ 0 °C
3.2.8
3.2.9
Buck compensation input voltage
3.2.10
Logic supply voltage
3.2.11
Reset output voltage
3.2.12
System Enable output voltage
3.2.13
Watchdog input voltage
3.2.14
Current reference voltage
3.2.15
Junction temperature
VBUC
VCC
VRO
VSEN
VWDI
VR
Tj
0
3.0
V
–
4.00
6.25
V
–
-0.3
V
–
V
–
0
VCC + 0.3
VCC + 0.3
VCC + 0.3
V
–
0
3.0
V
–
-40
150
°C
–
-0.3
Thermal Resistance
3.2.16
Junction ambient
PG-DSO-14-1
Rthj-a
–
120
K/W
–
3.2.17
Junction ambient
PG-DSO-20-36
Rthj-a
–
65
K/W
–
Note: In the operating range, the functions given in the circuit description are fulfilled.
Data Sheet
7
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
4
Circuit Description
Below some important sections of the TLE 6711 G/GL are described in more detail.
4.1
Power On Reset
In order to avoid any system failure, a sequence of several conditions has to be passed. In case of VCC power
down (VCC < VRT for t > tRR) a logic LOW signal is generated at the pin RO to reset an external microcontroller.
When the level of VCC reaches the reset threshold VRT, the signal at RO remains LOW for the Power-up reset delay
time tRD before switching to HIGH. If VCC drops below the reset threshold VRT for a time extending the reset
reaction time tRR, the reset circuit is activated and a power down sequence of period tRD is initiated. The reset
reaction time tRR avoids wrong triggering caused by short “glitches” on the VCC-line.
< t RR
VCC
VRT
< t RD
typ. 4.65 V
1V
Start-Up
RO
H
L
ON Delay
Invalid
t RD
Power
Start-Up
ON Delay
Started
ON Delay
Stopped
Invalid
Invalid
t RR
Normal
t
t
t RD
Failed
N
Failed
Normal
AET02950
Figure 4
Reset Function
4.2
Watchdog Operation
The watchdog uses one hundred of the oscillator’s clock signal period as a timebase, defined as the watchdog
cycle time tCYL.
After power-on, the reset output signal at the RO pin (microcontroller reset) is kept LOW for the reset delay time
tRD, i.e. 64 cycles. With the LOW to HIGH transition of the signal at RO the device starts the closed window time
tCW = 32 cycles. A trigger signal within this window is interpreted as a pretrigger failure according to the figures
shown below. After the closed window the open window with the duration tOW is started. The open window lasts
at minimum until the trigger process has occurred, at maximum tOW is 32 cycles.
A HIGH to LOW transition of the watchdog trigger signal on pin WDI is taken by a trigger. To avoid wrong triggering
due to parasitic glitches two HIGH samples followed by two LOW samples (sample period tCYL) are decoded as a
valid trigger. If a trigger signal appears at the watchdog input pin WDI during the open window or a power up/down
occurs, the watchdog window signal is reset and a new closed window follows.
A reset is generated (RO goes LOW) if there is no trigger pulse during the open window or if a pretrigger occurs
during the closed window. This reset happens after 64 cycles after the latest valid closed window start time and
lasts for further 64 cycles.
The triggering is correct also, if the first three samples (two HIGH one LOW) of the trigger pulse at pin WDI are
inside the closed window and only the fourth sample (the second LOW sample) is taken in the open window.
In addition to the microcontroller reset signal RO the device generates a system enable signal at pin SEN. If RO
Data Sheet
8
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
is HIGH the system enable goes active HIGH with the first valid watchdog trigger pulse at pin WDI. The SEN output
goes LOW immediately if a pretrigger, a missing trigger or a power down reset occurs.
TWD = 128*tCYL
tSR = 64*tCYL
tWDR = 64*tCYL
tCW=32*tCYL
tOW=32*tCYL
definition
closed window
open window
definition
reset start delay time after window
watchdog timeout
fOSC=fOSCmax
t EOW = end of open window
tECW
worst case
reset duration time after window
watchdog time-out
Example with:
t (CW+OW)min = ( tCW + tOW ) (1 - ∆)
tCYL=1ms
∆=10% (oscillator deviation)
fOSC=fOSCmin
t CWmax = tCW (1+∆ )
t(CW+OW)min =(tCW+tOW)*(1-∆)=
=(32+32)x0,9= 57,6ms
t OWmin
t WD
Figure 5
tCWmax = tCW(1+∆)=32*1,1=35,2ms
Window Watchdog Definitions 1
Closed window
Open window
Watchdog
trigger signal
WDI
Valid
WDI
Indifferent
WDI
Not valid
t ECW
Data Sheet
Closed window
t EOW
= Watchdog decoder sample point
Figure 6
Open window
AET02952
Window Watchdog Definitions 2
9
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
a) Perfect Triggering after Power on Reset
VCC
VRT
t
tRD = 64 Cycles
RO
t
32 Cycles
WDWI
CW
OW CW OW CW
CW
t
32 Cycles
WDI
xx
xx
xx
xx
t1
SEN
t2
System Failed
xx
xx
t3
t
System Enable
System Failed
t
b) Incorrect Triggering
tWDR = 64 Cycles
tSR = 64 Cycles
tSR = 64 Cycles
RO
t
TWD = 128 Cycles
WDWI
CW OW
CW
CW OW CW OW
OW
t
WDI
32 Cycles
xx
x
xx x
xx x xx
1)
2)
xx
x
xx
3)
4)
SEN
t
1)
Pretrigger
2)
Incorrect trigger duration within watchdog
open window OW: tHIGH < 2 Cycles
3)
Incorrect trigger duration within watchdog
open window OW: tLOW < 2 Cycles
4)
Missing trigger
Figure 7
Data Sheet
t
Legend: WDWI = Internal Watchdog Window
OW = Open Window (trigger signal at WDI)
CW = Closed Window (trigger signal at WDI)
x = Sample Point
AED02945
Window Watchdog Function
10
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
4.3
Boost Converter
The TLE 6711 G/GL contains a fully integrated boost converter (except the boost-diode), which provides a supply
voltage for an energy reserve e.g. an airbag firing system. The regulated boost output voltage VBOOST is
programmable by a divider network (external resistors) providing the feedback voltage for the boost feedback pin
BOFB. The energy which is stored in the external electrolytic capacitor at VBOOST guarantees accurate airbag firing,
even if the battery is disconnected by a car crash.
The boost inductance LBO (typ. 100 µH) is PWM-switched by an integrated current limited power DMOS transistor
with a programmable (external resistor RR) frequency.
An internal bandgap reference provides a temperature independent, on chip trimmed reference voltage for the
regulation loop. An error amplifier compares the reference voltage with the boost feedback signal VBOFB from the
external divider network (determination of the output boost voltage VBOOST).
Application note for programming the output voltage at pin VBOOST:
( R BO1 + R BO2 )
V BOOST = V BOFBTH × ------------------------------------R BO2
(1)
With a PWM (Pulse Width Modulation) comparator the output of the error amplifier is compared to a periodic linear
ramp, provided by a sawtooth signal of the oscillator connected to pin R. A logic signal with variable pulse width
is generated. It passes through the logic circuits (sets the output latch PWM-FF) and driver circuits to the power
switching DMOS. The Schmitt-trigger output resets the output flip-flop PWM-FF by NOR 2. The PWM signal is
gated by the NAND 2 to guarantee a dominant reset.
OV
COMP L when
NAND 3
OV at VBoost
&
+
-
= VthOV
38 V
H when
Tj > 175 ˚C
or OV at VBoost
L when
Tj > 175 ˚C
GND
UV
COMP
VBoost
+
-
VthUV
1
BOI
Pin 14
Error-FF
L when
H when NOR 2
R & Q
Error
Error
1
R
H when
Overcurrent
=
4V
NOR 1
H when
VBoost < 4 V
Error
Gate
PWM-FF
INV
H=
& Q OFF 1
Q
=
S
PWM
COMP
Error-Ramp
=
+
-
Error-Signal
+
-
H when
Error-Signal
<
Error-Ramp
GND
Oscillator
R
Pin 1
Vmax
Vmin
Schmitt-trigger 1
Unlock
Detector
Ramp Vhigh
tr tf tr
Vlow
t
tr tf tr
t
OC
COMP
+
-
BOFB
Pin 12
&
&
Error
AMP
10 µA
VREF
NAND 2
Q
S
I Pullup
2.8 V
&
&
Power
D-MOS
Gate
Driver
NAND1
GND
H=
ON
VthOC
18 mV
R Sense
14.5 m Ω
BOGND
Pin 13
OVL
Boost Status Pin 11
Low if Battery
Disconnected
Clock
GND
H when Outputcurrent > 1.2 A
AEB02946
Figure 8
Boost Converter Block Diagram
Figure 8 shows the most important waveforms during operation; for low, medium and high loads up to overload
condition. The output transistor is switched off immediately if the overcurrent comparator detects an overcurrent
level at the power DMOS or if the sense output switches to low induced by a VBOOST undervoltage command.
Data Sheet
11
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
The TLE 6711 G/GL is also protected against several boost loop errors:
In case of a feedback interruption a pull-up current source (IFB typ. 0.4 µA), integrated at pin BOFB pulls the
voltage at the feedback pin BOFB above the reference voltage. The boost output is switched off by the high error
voltage which controls the PWM-Comparator at a zero duty cycle.
In the case of a resistive loop error caused by leakage currents to ground, the boost output voltage would increase
to very high values. In order to protect the VBOOST input as well as the external load against catastrophic failures,
an overvoltage protection is provided which switches the output transistor off as soon as the voltage at pin VBOOST
exceeds the internal fixed overvoltage threshold VBOOVOFF = typ. 37 V.
Application Note
A short circuit from VBOOST to ground will not destroy the IC, however, it may damage the external boost diode or
the boost inductance if there is no overcurrent limitation in that path.
VC
and
Error Voltage
VError
VCP
VCV
t
OCLK
H
L
PWM
H
L
t
I BOI
I BOLI
t
I DBO
t
VBOI
t
VBOOST
VS
t
Overcurrent Threshold Exceeded
Load-Current Increasing with Time;
Controlled by the Error Amp
Controlled by the
Overcurrent Comp
AED02672
Figure 9
Data Sheet
Most Important Waveforms of the Boost Converter Circuit
12
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
4.3.1
Boost Status Output OVL
For supervision of the Boost output voltage an open drain DMOS output is used. The output is high impedance in
normal operation and low during the warning.
The OVL goes LOW if the PWM comparator output (see Figure 8) remains HIGH for clock time period. This occurs
when the Error-Signal falls below the minimum value of the Error-Ramp, this mean that Boost voltage falls below
a certain threshold voltage.
The OVL output used as a warning for insufficient Boost voltage.
4.4
Buck Converter
A stabilized logic supply voltage (typ. 5 V) for general purpose is realized in the system by a buck converter. An
external buck-inductance LBU is PWM switched by a high side DMOS power transistor with the programmed
frequency (pin R).
The buck regulator supply is given by the boost converter output VBOOST, in case of a battery power-down the
stored energy of the boost converter capacitor is used.
Like the boost converter, the buck converter uses the temperature compensated bandgap reference voltage
(typ. 2.8 V) for its regulation loop.
This reference voltage is connected to the non-inverting input of the error amplifier and an internal voltage divider
supplies the inverting input. Therefore the output voltage VCC is fixed due to the internal resistor ratio to typ. 5.0 V.
The output of the error amplifier goes to the inverting input of the PWM comparator as well as to the buck
compensation output BUC.
When the error amplifier output voltage exceeds the sawtooth voltage the output power MOS-transistor is switched
on. So the duration of the output transistor conduction phase depends on the VCC level. A logic signal PWM with
variable pulse width is generated.
VCC
OV
COMP H when
OV at VCC
+
UV
COMP
H when
UV at VBoost
+
-
VthUV
4V
L when
Overcurrent
GND
200 Ω
OC
COMP
VthOC
18 mV
L when
Overcurrent
VCC
Pin 7
=
GND GND
R Prot1
BUC
Pin 6
= VthOV
1.2 V
=
-
R VCC4
10.3kΩ
+
-
R VCC3
39.7kΩ
Boost
Driver
Supply
VCC
+
-
R VCC2
28kΩ
PWM H when
Error- COMP Error-Signal
<
Signal
Error-Ramp
ErrorRamp
= VREF
2.8 V
L when
Tj > 175 ˚C
GND GND
R
Error-FF
R
&
R
Pin 1
Figure 10
Data Sheet
Vmax
Vmin
tr tf tr
Schmitt-trigger 1
t
Ramp
Vhigh
Vlow
BDS
Pin 10
&
H=
Q OFF
1
H=
ON
Power
D-MOS
Gate
Driver
NAND 2
Q
INV
&
&
S
Q
BUO
Pin 8
&
S
tr tf tr
PWM-FF
1
OFF when H
Oscillator
R Sense
18 mΩ
NOR 1
Output Stage
OFF when H
+
-
Error
AMP
R VCC1
22kΩ
VBoost
Pin 9
t
Q
Clock
AEB02947
Buck Converter Block Diagram
13
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
External loop compensation is required for converter stability, and is formed by connecting a compensation
resistor-capacitor series-network (RBUC, CBUC) between pin BUC and GND.
In the case of overload or short-circuit at VCC (the output current exceeds the buck overcurrent threshold IBUOC)
the DMOS output transistor is switched off by the overcurrent comparator immediately. The pulse width is then
controlled by the overcurrent comparator as seen before in the boost description.
In order to protect the VCC input as well as the external load against catastrophic failures, an overvoltage protection
is provided which switches the output transistor off as soon as the voltage at pin VCC exceeds the internal fixed
overvoltage threshold VBUOVOFF = typ. 6.0 V.
VC
and
Error Voltage
VError
VCP
VCV
t
OCLK
H
L
PWM
H
L
t
I BUO
I BULI
t
I DBU
t
VBUO
t
VBOOST
VCC5
t
Overcurrent Threshold Exceeded
Load-Current Increasing with Time;
Controlled by the Error Amp
Controlled by the
Overcurrent Comp
AED02673
Figure 11
Data Sheet
Most Important Waveforms of the Buck Converter Circuit
14
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
4.5
Electrical Characteristics
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical
characteristics specify mean values expected over the production spread. If not otherwise specified, typical
characteristics apply at TA = 25 °C and the given supply voltage.
Electrical Characteristics: Current Consumption
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
ICC = 0 mA;
IBoLoad = 0 mA
ICC = 200 mA;
IBoLoad = 50 mA
4.5.1
Current consumption;
see application circuit
IBoost
–
1.5
4
mA
4.5.2
Current consumption;
see application circuit
IBoost
–
5
10
mA
Electrical Characteristics: Under- and Over-Voltage Lockout at VBOOST
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
4.5.3
UV ON voltage;
boost and buck conv. ON
VBOUVON
4.0
4.5
5.0
V
VBOOST increasing
4.5.4
UV OFF voltage;
boost and buck conv. OFF
VBOUVOFF 3.5
4.0
4.5
V
VBOOST decreasing
4.5.5
UV Hysteresis voltage
0.2
0.5
1.0
V
HY = ON - OFF
34
37
40
V
30
33
36
V
VBOOST increasing
VBOOST decreasing
1.5
4
10
V
HY = OFF - ON
4.5.6
4.5.7
4.5.8
VBOUVHY
OV OFF voltage; boost conv. OFF VBOOVOFF
OV ON voltage; boost conv. ON
VBOOVON
OV Hysteresis voltage
VBOUVHY
Electrical Characteristics: Over-Voltage Lockout at VCC
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
4.5.9
OV OFF voltage; buck conv. OFF
4.5.10
OV ON voltage; buck conv. ON
4.5.11
OV Hysteresis voltage
Data Sheet
VBUOVOFF 5.5
VBUOVON 5.25
VBUOVHY 0.10
15
Unit
Conditions
Typ.
Max.
6.0
6.5
V
5.75
6.25
V
VCC increasing
VCC decreasing
0.25
0.50
V
HY = OFF - ON
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
Electrical Characteristics: Boost-Converter; BOI, BOFB and VBOOST
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
4.5.12
Boost voltage;
see application circuit
VBOOST
24.0
27.5
31.0
V
5 mA < IBOOST <
100 mA; Tj = 25 °C;
8 V < VBatt < 16 V
4.5.13
Boost Voltage;
see application circuit
VBOOST
23
–
32
V
5 mA < IBOOST <
100 mA;
8 V < VBatt < 16 V
4.5.14
Efficiency; see. appl. circuit
η
–
80
–
%
RBOON
–
0.6
0.75
Ω
–
–
1.4
Ω
1.0
1.3
1.8
A
–
Feedback threshold voltage
RBOON
IBOOC
VBOFBTH
IBOOST = 100 mA
Tj = 25 °C;
IBOI = 1 A
IBOI = 1 A
4.5.15
Power-Stage ON resistance
4.5.16
Power-Stage ON resistance
4.5.17
Boost overcurrent threshold
4.5.18
2.55
2.7
2.85
V
Feedback input current
IFB
-2
-0.4
0
µA
VBOI = 12 V;
IBOOST = 25 mA
2 V < VBOFB < 4 V
4.5.19
Electrical Characteristics: Buck-Converter; BUO, BDS, BUC and VCC
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Min.
Typ.
Max.
4.5.20
Logic supply voltage
VCC
4.9
–
4.5.21
Efficiency; see. appl. circuit
η
–
4.5.22
Power-Stage ON resistance
RBUON
4.5.23
Power-Stage ON resistance
4.5.24
Buck overcurrent threshold
4.5.25
Input current on pin VCC
4.5.26
Buck Gate supply voltage;
VBGS = VBDS - VBOOST
RBUON
IBUOC
ICC
VBGS
Data Sheet
Limit Values
Unit
Conditions
5.1
V
1 mA < ICC <
250 mA; see. appl.
circuit
85
–
%
–
0.38
0.5
Ω
–
–
1.0
Ω
ICC = 250 mA;
VBoost = 25 V
Tj = 25 °C;
IBUO = 1 A
IBUO = 1 A
0.7
0.95
1.2
A
–
–
0.2
0.5
mA
VCC = 5 V
5
–
10
V
–
16
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
Electrical Characteristics: Reference Input; R
(Oscillator; Timebase for Boost- and Buck-Converter, Reset and Watchdog)
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
4.5.27
4.5.28
4.5.29
4.5.30
Parameter
Symbol
Limit Values
VR
Oscillator frequency
fOSC
Oscillator frequency
fOSC
Cycle time for watchdog and reset tCYL
Voltage on pin R
Unit
Conditions
Min.
Typ.
Max.
1.3
1.4
1.5
V
–
85
95
105
kHz
Tj = 25 °C
75
–
115
kHz
–
–
1.05
–
ms
tCYL = 100/fOSC
timing
Electrical Characteristics: Reset Generator; RO
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
4.5.31
Reset threshold;
VCC decreasing/increasing
VRT
4.50
4.65
4.75
V
VRO H to L or L to H
transition;
VRO remains low
down to VCC > 1 V
4.5.32
Reset low voltage
VROL
–
0.2
0.4
V
4.5.33
Reset low voltage
VROL
–
0.2
0.4
V
4.5.34
Reset high voltage
VROH
VCC -
–
VCC +
V
IROL = 2 mA;
2.5 V < VCC < VRT
IROL = 0.2 mA;
1 V < VCC < VRT
IROH = 0 mA
0.1
4.5.35
Reset pull-up current
4.5.36
Reset Reaction time
4.5.37
Power-up reset delay time
IRO
tRR
tRD
0.1
–
240
–
µA
0 V < VRO < 4 V
50
100
150
µs
–
64
–
tCYL
VCC < VRT
VCC ≥ 4.8 V
Electrical Characteristics: Watchdog Generator; WDI
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
4.5.38
4.5.39
Parameter
H-input voltage threshold
L-input voltage threshold
4.5.40
Watchdog period
4.5.41
Start of reset;
after watchdog time-out
Data Sheet
Symbol
Limit Values
Min.
Typ.
Max.
VWDIH
–
–
0.7 ×
VWDIL
0.3 ×
TWD
tSR
Unit
Conditions
V
–
VCC
–
–
V
–
–
128
–
–
64
–
tCYL
tCYL
VCC ≥ 4.8 V
VCC ≥ 4.8 V
VCC
17
Rev. 3.4, 2007-08-16
TLE 6711
Circuit Description
Electrical Characteristics: Watchdog Generator; WDI (cont’d)
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
4.5.42
Reset duration;
after watchdog time-out
tWDR
–
64
–
tCYL
VCC ≥ 4.8 V
4.5.43
Open window time
–
32
–
4.5.44
Closed window time
–
32
–
4.5.45
Window watchdog trigger time
tOW
tCW
tWD
–
46.4
–
tCYL
tCYL
tCYL
VCC ≥ 4.8 V
VCC ≥ 4.8 V
VCC ≥ 4.8 V
Electrical Characteristics: System Enable Output; SEN
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
4.5.46
Enable low voltage
VSENL
–
0.2
0.4
V
4.5.47
Enable low voltage
VSENL
–
0.2
0.4
V
4.5.48
Enable high voltage
VSENH
VCC -
–
VCC +
V
ISENL = 2 mA;
2.5 V < VCC < VRT
ISENL = 0.2 mA;
1 V < VCC < VRT
ISENH = 0 mA
µA
0 V < VSEN < 4 V
0.1
4.5.49
Enable pull-up current
ISEN
–
0.1
240
–
Electrical Characteristics: Boost Status Output; OVL
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
4.5.50
Enable low voltage
VOVLL
–
0.2
0.4
V
IOVLL = 1 mA;
2.5 V < VCC < VRT
4.5.51
Boost feedback threshold voltage
VOVLTH
2.3
2.45
2.6
V
See application
circuit
Electrical Characteristics: Thermal Shutdown (Boost and Buck-Converter OFF)
VCC = 4.75 V to 5.25 V; VBoost = 8 V to 35 V, Tj = -40 °C to +150 °C, RR = 47 kΩ; all voltages with respect to ground,
positive current flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
4.5.52
Thermal shutdown junction
temperature
TjSD
150
175
200
°C
–
4.5.53
Thermal switch-on junction
temperature
TjSO
120
–
170
°C
–
4.5.54
Temperature hysteresis
∆T
–
30
–
K
–
Data Sheet
18
Rev. 3.4, 2007-08-16
TLE 6711
Application Information
5
Application Information
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
Figure 12 shows the application circuit of the TLE 6711 G/GL with the suggested external parts.
D1
L BO
D2
CL
VBatt
ZD1
36 V
10 µF
DBO
100 µH
I BOLoad
CS
220 nF
R BO1
CBO1
100 k Ω CBO1
CBO2
4700 µF 220 nF
10 nF
BOFB
12
TLE 6711 G
R BO2
Boost
Converter
Biasing
10 k Ω
14 BOI
VBOOST
13 BOGND
CBOT
VBoost
10 BDS 10 nF
VREF
9 VBOOST
BUC 6
R BUC
47 k Ω
CBUC
470
nF
8 BUO
7 VCC
220 µH
DBU
CBU1
CBU2
100 µF
220 nF
47 k Ω
System
Enable
Output
Watchdog
Trigger
Input
Reference
Current
Generator
and
Oscillator
Reset
Window
Watchdog
and
System
Enable
3 WDI
10 k Ω
2 RO
Reset
Output
Boost
Status
Output
11 OVL
4 GND
Figure 12
Data Sheet
VCC
VInternal
5 SEN
R 1
RR
L BU
Buck
Converter
Device Type
Supplier Remarks
D1
BAW78C
Infineon 200 V; 1 A; SOT-89
D2
BAW78C
Infineon 200 V; 1 A; SOT-89
D BO
BAW78B
Infineon 100 V; 1 A; SOT-89
D BO
SS14
multiple Schottky; 40 V; 1 A
D BU
-
-
L BO
B82442-A1104 EPCOS 100 µH; 0.25 A; 1.28 Ω
L BO
L BU
Do3316P-104 Coilcraft 100 µH; 1.2 A; 0.28 Ω
L BU
Do3316P-224 Coilcraft 220 µH; 0.8 A; 0.61 Ω
Schottky; 100 V; 1 A
B82442-H1224 EPCOS 220 µH; 0.24 A; 2.72 Ω
AEB02948
Application Circuit (pinning valid for PG-DSO-14-1)
19
Rev. 3.4, 2007-08-16
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
6
Diagrams: Oscillator and Boost/Buck-Converter Performance
In the following the behaviour of the Boost/Buck-converter and the oscillator is shown.
Oscillator Frequency Deviation vs.
Junction Temperature
Boost Feedback Current vs.
Junction Temperature
AED02938
10
kHz
∆f OSC
5
I FB
Referred to f OSC
at Tj = 25 ˚C
-300
0
-400
-5
-500
-10
-600
-15
-50 -25 0
AED02939
-200
nA
-700
-50 -25 0
25 50 75 100 ˚C 150
25 50 75 100 ˚C 150
Tj
Tj
Current Consumption vs.
Junction Temperature
Efficiency Buck vs.
Load
AED02940
3
mA
η
I Boost
2.5
2
85
RT, HT
Boost ON
Buck ON
I BO boost = 0 mA
I CC = 0 mA
75
1
70
65
25 50 75 100 ˚C 150
Tj
Data Sheet
CT
80
1.5
0.5
-50 -25 0
AED02942
90
%
50
150
mA
250
I LOAD
20
Rev. 3.4, 2007-08-16
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
Efficiency Buck vs.
Boost Voltage
Oscillator Frequency vs.
Resistor from R to GND
AED02941
95
AED02982
1000
kHz
η %
fOSC
90
500
VCC = 5 V
85
200
@ Tj = 25 ˚C
I Load = 120 mA
80
80 mA
75
50
70
65
100
20
40 mA
5
15
25
10
V 30
5
10
20
50 100 200
VBoost
Efficiency Boost vs.
Input Voltage
η
Boost Output Voltage vs.
Load
AED02943
95
%
kΩ 1000
RR
AED02944
31
V
I Boost = 60 mA
VBoost
30
90
HT
85
CT
RT
80
28
75
27
70
8
10
12
14
26
V 16
VBatt
Data Sheet
RT
HT
CT
29
20
40
60
80 mA 100
I LOAD
21
Rev. 3.4, 2007-08-16
TLE 6711
Diagrams: Oscillator and Boost/Buck-Converter Performance
Boost and Logic Output Voltage vs.
Junction Temperature
AED02983
30
V
29
VBoost
28
Boost and Buck Overcurrent Threshold vs.
Junction Temperature
I OC
AED02985
1.4
A
1.3
I Boost = 50 mA
I BOOC (Boost-Converter)
27
1.2
26
1.1
V
VCC
1
5.025
5.000
I BUOC (Buck-Converter)
I CC = 250 mA
0.9
4.975
4.950
-50 -25 0
25 50 75 100
0.8
-50 -25 0
˚C 150
Tj
25 50 75 100
˚C 150
Tj
Boost and Buck ON Resistance vs.
Junction Temperature
AED02984
1000
mΩ
R ON
800
R BOON @ I BOI = 1 A
700
600
500
400
R BUON @ I BUO = 1 A
300
200
100
0
-50 -25 0
25 50 75 100
˚C 150
Tj
Data Sheet
22
Rev. 3.4, 2007-08-16
TLE 6711
Package Outlines
7
Package Outlines
1.75 MAX.
C
1)
4 -0.2
B
1.27
0.64 ±0.25
0.1
2)
0.41+0.10
-0.06
6±0.2
0.2 M A B 14x
14
8˚MAX.
0.19 +0.06
0.175 ±0.07
(1.47)
0.35 x 45˚
0.2 M C
8
1
7
1)
8.75 -0.2
A
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
GPS01230
2.65 MAX.
0.35 x 45˚
1.27
0.35 +0.15
0.1 20x
2)
0.2 20x
20
1
0.4 +0.8
0.23 +0.09
7.6 -0.2 1)
8˚ MAX.
2.45 -0.2
PG-DSO-14-1 (Plastic Dual Small Outline Package)
0.2 -0.1
Figure 13
Dimensions in mm
10.3 ±0.3
11
10
12.8 -0.2 1)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
Figure 14
GPS05094
Dimensions in mm
PG-DSO-20-36 (Plastic Dual Small Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Data Sheet
23
Rev. 3.4, 2007-08-16
TLE 6711
Revision History
8
Revision History
Revision Date
Changes
3.4
2007-08-16 Initial version of RoHS-compliant derivate of TLE 6711.
Page 2: AEC certified statement added.
Page 2 and Page 23: RoHS compliance statement and Green product feature added.
Page 2 and Page 23: Packages changed to RoHS compliant version.
Disclaimer updated.
3.3
2006-03-16 Page 9: Figure 5 corrected, TWD = 128 tCYL.
Page 19: Figure 12 corrected, Inductor type EPCOS B82442-H1224.
Data Sheet
24
Rev. 3.4, 2007-08-16
Edition 2007-08-16
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.