RMPA2265 Dual Band WCDMA Power Amplifier Module 1850 to 1910 MHz and 1920 to 1980 MHz General Description Features The RMPA2265 power amplifier module (PAM) is designed for WCDMA applications in both the 1850–1910 and 1920– 1980 MHz bands. The 2 stage PAM is internally matched to 50Ω to minimize the use of external components and features a low-power mode to reduce standby current and DC power consumption during peak phone usage. High power-added efficiency and excellent linearity are achieved using Fairchild’s InGaP/GaAs Heterojunction Bipolar Transistor (HBT) process. • Single positive-supply operation and low power and shutdown modes • 42% WCDMA efficiency at +28 dBm average output power 1920–1980 MHz • 39% WCDMA efficiency at 27.5 dBm average output power 1850–1910 MHz • Meets UMTS/WCDMA performance requirements in both UMTS bands • Compact, low-profile package–(3.0 x 3.0 x 1.0 mm nominal) • Internally matched to 50Ω and DC blocked RF input/ output Device (3 x 3 x 1mm) PY 226 WW5 Functional Block Diagram (Top View) PA MODULE Vcc1 1 RF IN 2 Vmode 3 Vref 4 MMIC Input Match DC Bias Control Output Match 8 Vcc2 7 RF OUT 6 GND 5 GND (paddle ground on package bottom) ©2004 Fairchild Semiconductor Corporation RMPA2265 Rev. E RMPA2265 December 2004 Symbol VCC1, VCC2 VREF VMODE PIN TSTG Parameter Supply Voltages Reference Voltage Power Control Voltage RF Input Power Storage Temperature Ratings 5.0 2.6 to 3.5 3.5 +10 -55 to +150 Units V V V dBm °C Note: 1: No permanent damage with only one parameter set at extreme limit. Other parameters set to typical values. Electrical Characteristics (1920 to 1980 MHz)1 Symbol Parameter f Operating Frequency WCDMA Operation Gp Power Gain Po PAEd Itot ACLR1 ACLR2 Linear Output Power PAEd (digital) @ +28dBm PAEd (digital) @ +16dBm PAEd (digital) @ +16dBm High Power Total Current Low Power Total Current Adjacent Channel Leakage Ratio ±5.00MHz Offset 1920–1980 MHz ±10.00MHz Offset 1920–1980 MHz General Characteristics VSWR Input Impedance NF Noise Figure Rx No Receive Band Noise Power 2fo – 5fo Harmonic Suppression S Spurious Outputs2, 3 Ruggedness with Load Mismatch3 Tc Case Operating Temperature DC Characteristics Iccq Quiescent Current Iref Reference Current Icc(off) Shutdown Leakage Current Comments Po = +28dBm, Vmode = 0V Po = +16dBm, Vmode ≥ 2.0V Vmode = 0V Vmode ≥ 2.0V Vmode = 0V Vmode ≥ 2.0V Vmode ≥ 2.0V, Vcc = 1.4V Po = +28dBm, Vmode = 0V Po = +16dBm, Vmode = 2.0V Min 1920 Typ 26 28 26 42 9 25 440 120 -40 -42 -54 -66 dBc dBc dBc dBc 2.0:1 4 -139 Po ≤ +28dBm, 2110 to 2170 MHz Po ≤ +28dBm Units MHz dB dB dBm dBm % % % mA mA 28 16 Po = +28dBm, Vmode = 0V Po = +16dBm, Vmode ≥ 2.0V Po = +28dBm, Vmode = 0V Po = +16dBm, Vmode ≥ 2.0V -50 Load VSWR ≤ 5.0:1 No permanent damage -30 Vmode ≥ 2.0V Po ≤ +28dBm No applied RF signal Max 1980 50 5 1 dB dBm/Hz dBc -60 10:1 dBc 85 °C 5 mA mA µA Notes: 1: All parameters met at TC = +25°C, VCC = +3.4V, VREF = 2.85V and load VSWR ≤ 1.2:1, unless otherwise noted. 2: All phase angles 3: Guaranteed by design ©2004 Fairchild Semiconductor Corporation RMPA2265 Rev. E RMPA2265 Absolute Ratings 1 Symbol Parameter f Operating Frequency WCDMA Operation Gp Power Gain Po PAEd Itot ACLR1 ACLR2 Linear Output Power PAEd (digital) @ +27.5dBm PAEd (digital) @ +16dBm PAEd (digital) @ +16dBm High Power Total Current Low Power Total Current Adjacent Channel Leakage Ratio ±5.00MHz Offset 1850–1910 MHz ±10.00MHz Offset 1850–1910 MHz General Characteristics VSWR Input Impedance NF Noise Figure Rx No Receive Band Noise Power 2fo – 5fo Harmonic Suppression S Spurious Outputs2, 3 Ruggedness with Load Mismatch3 Tc Case Operating Temperature DC Characteristics Iccq Quiescent Current Iref Reference Current Icc(off) Shutdown Leakage Current Comments Po = +27.5dBm, Vmode = 0V Po = +16dBm, Vmode ≥ 2.0V Vmode = 0V Vmode ≥ 2.0V Vmode = 0V Vmode ≥ 2.0V Vmode ≥ 2.0V, Vcc = 1.4V Po = +27.5dBm, Vmode = 0V Po = +16dBm, Vmode = 2.0V Min 1850 Typ 26 28 26 39 9 25 420 120 -40 -42 -54 -66 dBc dBc dBc dBc 2.0:1 4 -139 Po ≤ +27.5dBm, 2110 to 2170 MHz Po ≤ +27.5dBm Load VSWR ≤ 5.0:1 No permanent damage Units MHz dB dB dBm dBm % % % mA mA 27.5 16 Po = +27.5dBm, Vmode = 0V Po = +16dBm, Vmode ≥ 2.0V Po = +27.5dBm, Vmode = 0V Po = +16dBm, Vmode ≥ 2.0V -50 -60 10:1 -30 Vmode ≥ 2.0V Po ≤ +27.5dBm No applied RF signal Max 1910 50 5 1 dB dBm/Hz dBc dBc 85 °C 5 mA mA µA Notes: 1: All parameters met at TC = +25°C, VCC = +3.4V, VREF = 2.85V and load VSWR ≤ 1.2:1, unless otherwise noted. 2: All phase angles 3: Guaranteed by design ©2004 Fairchild Semiconductor Corporation RMPA2265 Rev. E RMPA2265 Electrical Characteristics (1850 to 1910 MHz)1 Symbol f VCC1, VCC2 VREF VMODE POUT TC Parameter Operating Frequency Supply Voltage Reference Voltage Operating Shutdown Bias Control Voltage Low-Power High-Power Linear Output Power (low-power) 1920–1980 MHz (high power) 1850–1910 MHz (high power) Case Operating Temperature Min 1850 3.0 Typ Max 1980 4.2 Units MHz V 2.7 0 2.85 3.1 0.5 V V 1.8 0 2.0 3.0 0.5 +16 +28 +27.5 +85 V V dBm dBm dBm °C 3.4 -30 Package Outline I/O 1 INDICATOR TOP VIEW 1 3.00 ±0.10mm SQUARE 2 3 8 2265 PYWW 4 7 6 5 0.60mm MOLD HEAD HEIGHT 1.00±0.10mm 0.44 FRONT VIEW Signal Description Pin # 1 2 3 4 5 6 7 8 9 ©2004 Fairchild Semiconductor Corporation Signal Name VCC1 RF In VMODE VREF GND GND RF Out VCC2 GND Description Supply Voltage to Input Stage RF Input Signal High Power/Low Power Switch Reference Voltage Ground Ground RF Output Signal Supply Voltage to Output Stage Ground RMPA2265 Rev. E RMPA2265 Recommended Operating Conditions RMPA2265 3x3 WCDMA PA Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=28dBm 33.0 32.0 31.0 30.0 29.0 28.0 27.0 26.0 25.0 24.0 23.0 1920 1950 1980 PAE (%) Gain (dB) RMPA2265 3x3 WCDMA PA Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=28dBm 45.0 44.0 43.0 42.0 41.0 40.0 39.0 38.0 37.0 36.0 35.0 1920 1950 1980 Frequency (MHz) RMPA2265 3x3 WCDMA PA RMPA2265 3x3 WCDMA PA Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=28dBm -30.0 -32.0 -34.0 -36.0 -38.0 -40.0 -42.0 -44.0 -46.0 -48.0 -50.0 1920 1950 1980 Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=28dBm -45.0 -47.0 -49.0 -51.0 -53.0 -55.0 -57.0 -59.0 -61.0 -63.0 -65.0 1920 1950 1980 ACLR2 (dBc) ACLR1 (dBc) Frequency (MHz) Frequency (MHz) Frequency (MHz) RMPA2265 3x3 WCDMA PA , Freq=1.95GHz RMPA2265 3x3 WCDMA PA , Freq=1.95GHz Vcc=3.4V, Vref=2.85V, Vmode=0V 33.0 32.0 31.0 30.0 29.0 28.0 27.0 26.0 25.0 24.0 23.0 27.0 PAE (%) Gain (dB) Vcc=3.4V, Vref=2.85V, Vmode=0V 27.2 27.4 27.6 27.8 28.0 45.0 44.0 43.0 42.0 41.0 40.0 39.0 38.0 37.0 36.0 35.0 27.0 27.4 27.6 27.8 28.0 Pout (dBm) Pout (dBm) RMPA2265 3x3 WCDMA PA , Freq=1.95GHz RMPA2265 3x3 WCDMA PA , Freq=1.95GHz Vcc=3.4V, Vref=2.85V, Vmode=0V -37.0 -38.0 -39.0 -40.0 -41.0 -42.0 -43.0 -44.0 -45.0 -46.0 -47.0 27.0 ACLR2 (dBc) Vcc=3.4V, Vref=2.85V, Vmode=0V ACLR1 (dBc) 27.2 27.2 27.4 27.6 Pout (dBm) ©2004 Fairchild Semiconductor Corporation 27.8 28.0 -50.0 -51.0 -52.0 -53.0 -54.0 -55.0 -56.0 -57.0 -58.0 -59.0 -60.0 27.0 27.2 27.4 27.6 27.8 28.0 Pout (dBm) RMPA2265 Rev. E RMPA2265 Performance Data: 1920 to 1980 MHz RMPA2265 3x3 WCDMA PA at US-PCS Freq RMPA2265 3x3 WCDMA PA at US-PCS Freq 33.0 32.0 31.0 30.0 29.0 28.0 27.0 26.0 25.0 24.0 23.0 1850 PAE (%) Gain (dB) Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=27.5dBm 1880 1910 Frequency (MHz) Frequency (MHz) RMPA2265 3x3 WCDMA PA at US-PCS Freq RMPA2265 3x3 WCDMA PA at US-PCS Freq Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=27.5dBm -30.0 -32.0 -34.0 -36.0 -38.0 -40.0 -42.0 -44.0 -46.0 -48.0 -50.0 1850 ACLR2 (dBc) Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=27.5dBm ACLR1 (dBc) Vcc=3.4V, Vref=2.85V, Vmode=0V, Pout=27.5dBm 45.0 44.0 43.0 42.0 41.0 40.0 39.0 38.0 37.0 36.0 35.0 1850 1880 1910 1880 1910 Frequency (MHz) -45.0 -47.0 -49.0 -51.0 -53.0 -55.0 -57.0 -59.0 -61.0 -63.0 -65.0 1850 1880 1910 Frequency (MHz) Efficiency Improvement Applications In addition to high-power/low-power bias modes, the efficiency of the PA module can be significantly increased at backed-off RF power levels by dynamically varying the supply voltage (Vcc) applied to the amplifier. Since mobile handsets and power amplifiers frequently operate at 10–20 dB back-off, or more, from maximum rated linear power, battery life is highly dependent on the DC power consumed at antenna power levels in the range of 0 to +16dBm. The reduced demand on transmitted RF power allows the PA supply voltage to be reduced for improved efficiency, while still meeting linearity requirements for WCDMA modulation with excellent margin. High-efficiency DC-DC converters are now available to implement switched-voltage operation. ©2004 Fairchild Semiconductor Corporation With the PA module in low-power mode (Vmode = 2.0V) at +16dBm output power and supply voltages reduced from 3.4V nominal down to 1.2V, power-added efficiency is more than doubled from 9 percent to 25 percent (Vcc = 1.2V) while maintaining a typical ACLR1 of -40dBc and ACLR2 of less than -54 dBc. Operation at even lower levels of Vcc supply voltage are possible with a further restriction on the maximum RF output power. RMPA2265 Rev. E RMPA2265 Performance Data: 1850 to 1910 MHz RMPA2265 Evaluation Board Layout Materials List Qty 1 2 7 Ref 3 3 2 1 1 A/R A/R Item No. 1 2 3 4 5 5 (Alt) 6 7 7 (Alt) 8 9 Part Number G657691-1 V1 #142-0701-841 #2340-5211TN GRM39X7R102K50V ECJ-1VB1H102K C3216X5R1A335M GRM39Y5V104Z16V ECJ-1VB1C104K SN63 SN96 Description PC Board SMA Connector Terminals Assembly, RMPA2265 1000pF Capacitor (0603) 1000pF Capacitor (0603) 3.3µF Capacitor (1206) 0.1µF Capacitor (0603) 0.1µF Capacitor (0603) Solder Paste Solder Paste Vendor Fairchild Johnson 3M Fairchild Murata Panasonic TDK Murata Panasonic Indium Corp. Indium Corp. DC Turn On Sequence: 1. VCC1 = VCC2 = 3.4V (typical) 2. VREF = 2.85V (typical) 3. High-Power: VMODE = 0V (Pout > 16dBm) Low-Power: VMODE = 2.0V (Pout < 16dBm) ©2004 Fairchild Semiconductor Corporation RMPA2265 Rev. E RMPA2265 Evaluation Board Schematic 3.3 µF 1000 pF 1 VCC1 7 50 Ohm TRL 3 VMODE VREF VCC2 8 2 2265 PYWW 4 50 Ohm TRL 5, 6 9 1000 pF 0.1 µF ©2004 Fairchild Semiconductor Corporation 3.3 µF 1000 pF (PACKAGE BASE) RMPA2265 Rev. E CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Precautions to Avoid Permanent Device Damage: • Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC and ground contact areas. • Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. • Static Sensitivity: Follow ESD precautions to protect against ESD damage: – A properly grounded static-dissipative surface on which to place devices. – Static-dissipative floor or mat. – A properly grounded conductive wrist strap for each person to wear while handling devices. • General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, and ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. • Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. Device Usage: Fairchild recommends the following procedures prior to assembly. • Dry-bake devices at 125°C for 24 hours minimum. Note: The shipping trays cannot withstand 125°C baking temperature. • Assemble the dry-baked devices within 7 days of removal from the oven. • During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C Solder Materials & Temperature Profile: Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. Reflow Profile • Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A typical heating rate is 1-2°C/sec. • Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 120–150 seconds at 150°C. • Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 10 seconds. Maximum soldering temperatures should be in the range 215–220°C, with a maximum limit of 225°C. • Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crackresistant solder joint. The illustration below indicates the recommended soldering profile. Solder Joint Characteristics: Proper operation of this device depends on a reliable voidfree attachment of the heat sink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should not be subjected to more than 225°C and reflow solder in the molten state for more than 5 seconds. No more than 2 rework operations should be performed. • If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure must be repeated. ©2004 Fairchild Semiconductor Corporation RMPA2265 Rev. E RMPA2265 Applications Information RMPA2265 Recommended Solder Reflow Profile 240 10 SEC 220 200 183°C 180 160 140 DEG (°C) 120 100 1°C/SEC SOAK AT 150°C FOR 60 SEC 80 45 SEC (MAX) ABOVE 183°C 1°C/SEC 60 40 20 0 0 60 120 180 240 300 TIME (SEC) ©2004 Fairchild Semiconductor Corporation RMPA2265 Rev. E TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ Across the board. Around the world.™ OPTOLOGIC OPTOPLANAR™ The Power Franchise PACMAN™ Programmable Active Droop™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET UniFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I15