SEMICONDUCTOR TECHNICAL DATA # # #& " !$ LVX %" "" #"#"! &!"! The 74LVXC3245 is a 24–pin dual–supply, octal configurable voltage interface transceiver especially well suited for PCMCIA and other real time configurable I/O applications. The VCCA pin accepts a 3V supply level; the A port is a dedicated 3V port. The VCCB pin accepts a 3V–to–5V supply level. The B port is configured to track the VCCB supply level. A 5V level on the VCCB pin will configure the I/O pins at a 5V level and a 3V VCCB will configure the I/O pins at a 3V level. The A port interfaces with a 3V host system and the B port to the card slots. This device will allow the VCCB voltage source pin and I/O pins on the B port to float when OE is High. This feature is necessary to buffer data to and from a PCMCIA socket that permits PCMCIA cards to be inserted and removed during normal operation. The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active–High) enables data from the A port to B port. Receive (active–Low) enables data from the B port to the A port. • • • • LOW–VOLTAGE CMOS DW SUFFIX 24–LEAD PLASTIC WIDE SOIC PACKAGE CASE 751E–04 Bidirectional Interface Between 3V and 3V/5V Buses Control Inputs Compatible with TTL Level Outputs Source/Sink Up to 24mA Guaranteed Simultaneous Switching Noise Level and Dynamic Threshold Performance • Available in SOIC and TSSOP Packages DT SUFFIX 24–LEAD PLASTIC TSSOP PACKAGE CASE 948H–01 • Flexible VCCB Operating Range • Allows B Port and VCCB to Float Simultaneously When OE Is High • Functionally Compatible with the 74 Series 245 VCCB NC 24 23 OE B0 B1 B2 B3 B4 B5 B6 B7 GND 22 21 20 19 18 17 16 15 14 13 PIN NAMES 1 2 VCCA T/R 3 4 5 6 7 8 9 10 A0 A1 A2 A3 A4 A5 A6 A7 11 12 GND GND Pins Function OE T/R A0–A7 Output Enable Input Transmit/Receive Input Side A 3–State Inputs or 3–State Outputs Side B 3–State Inputs or 3–State Outputs B0–B7 Figure 1. 24–Lead Pinout (Top View) This document contains information on a new product. Specifications and information herein are subject to change without notice. 7/97 Motorola, Inc. 1997 1 REV 1 MC74LVXC3245 OE 22 T/R 2 A0 3 21 A1 4 20 A2 B5 9 15 A7 B4 8 16 A6 B3 7 17 A5 B2 6 18 A4 B1 5 19 A3 B0 B6 10 14 B7 Figure 2. Logic Diagram INPUTS OE T/R OPERATING MODE Non–Inverting L L B Data to A Bus L H A Data to B Bus H X Z H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions are Acceptable; For ICC reasons, Do Not Float Inputs MOTOROLA 2 LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 MC74LVXC3245 ABSOLUTE MAXIMUM RATINGS* Symbol Parameter VCCA, VCCB DC Supply Voltage VI DC Input Voltage VI/O DC Input/Output Voltage Value Condition Unit –0.5 to +7.0 V OE, T/R –0.5 to VCCA +0.5 V An –0.5 to VCCA +0.5 V Bn –0.5 to VCCB +0.5 V ±20 VI < GND mA DC Output Diode Current ±50 VO < GND; VO > VCC mA IO DC Output Source/Sink Current ±50 mA ICC, IGND DC Supply Current ±50 ±200 mA TSTG Storage Temperature Range –65 to +150 °C ±300 mA IIK DC Input Diode Current IOK OE, T/R Per Output Pin Maximum Current DC Latchup Source/Sink Current * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Parameter VCCA, VCCB Supply Voltage (VCCA ≤ VCCB) VI Input Voltage VI/O Input/Output Voltage TA Operating Free–Air Temperature ∆t/∆V Minimum Input Edge Rate VIN from 30% to 70% of VCC; VCC at 3.0V, 4.5V, 5.5V Min Max Unit 2.7 3.0 3.6 5.5 V OE, T/R 0 VCCA V An Bn 0 0 VCCA VCCB V –40 +85 °C 0 8 ns/V VCCA VCCB DC ELECTRICAL CHARACTERISTICS TA = 25°C Symbol VIHA Parameter Minimum HIGH Level Input Voltage Condition An OE T/R VIHB Bn VILA Maximum LOW Level Input Voltage An OE T/R VILB Bn VOHA Minimum HIGH Level Output Voltage VOHB LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 VCCB 2.7 3.0 3.6 3.0 3.6 5.5 2.0 2.0 2.0 2.0 2.0 2.0 V 2.7 3.0 3.6 3.0 3.6 5.5 2.00 2.00 3.85 2.00 2.00 3.85 V 2.7 3.0 3.6 3.0 3.6 5.5 0.8 0.8 0.8 0.8 0.8 0.8 V 2.7 3.0 3.6 3.0 3.6 5.5 0.80 0.80 1.65 0.80 0.80 1.65 V IOUT = –100µA IOH = –12mA IOH = –24mA IOH = –12mA IOH = –24mA 3.0 3.0 3.0 2.7 2.7 3.0 3.0 3.0 3.0 4.5 2.99 2.85 2.65 2.50 2.30 2.90 2.56 2.35 2.30 2.10 2.90 2.46 2.25 2.20 2.00 V IOUT = –100µA IOH = –12mA IOH = –24mA IOH = –24mA 3.0 3.0 3.0 3.0 3.0 3.0 3.0 4.5 2.99 2.85 2.65 4.25 2.90 2.56 2.35 3.86 2.90 2.46 2.25 3.76 V VOUT ≤ 0.1V or ≥ VCC – 0.1V VOUT ≤ 0.1V or ≥ VCC – 0.1V 3 Typ TA = –40 to +85°C VCCA Guaranteed Limits Unit MOTOROLA MC74LVXC3245 DC ELECTRICAL CHARACTERISTICS TA = 25°C Symbol VOLA Parameter Maximum LOW Level Output Voltage VOLB TA = –40 to +85°C Condition VCCA VCCB Typ Guaranteed Limits IOUT = 100µA IOL = 24mA IOL = 12mA IOL = 24mA 3.0 3.0 2.7 2.7 3.0 3.0 3.0 4.5 0.002 0.21 0.11 0.22 0.10 0.36 0.36 0.42 0.10 0.44 0.44 0.50 V IOUT = 100µA IOL = 24mA IOL = 24mA 3.0 3.0 3.0 3.0 3.0 4.5 0.002 0.21 0.18 0.10 0.36 0.36 0.10 0.44 0.44 V µA IIN Max Input Leakage Current OE, T/R VI = VCCA, GND 3.6 3.6 3.6 5.5 ±0.1 ±0.1 ±1.0 ±1.0 IOZA Max 3–State Output Leakage An VI = VIH, VIL OE = VCCA VO = VCCA, GND 3.6 3.6 3.6 5.5 ±0.5 ±0.5 ±5.0 ±5.0 Max 3–State Output Leakage Bn VI = VIH, VIL OE = VCCA VO = VCCB, GND 3.6 3.6 3.6 5.5 ±0.5 ±0.5 ±5.0 ±5.0 Maximum ICC/Input Bn VI=VCCB–2.1V 3.6 5.5 1.35 1.5 VI=VCC–0.6V 3.6 3.6 0.35 0.5 IOZB ∆ICC All Inputs ICCA1 ICCA2 ICCB VOLPA mA mA µA 3.6 Open 5 50 Quiescent VCCA Supply Current An=VCCA or GND Bn=VCCB or GND, OE=GND, T/R=GND 3.6 3.6 3.6 5.5 5 5 50 50 Quiescent VCCB Supply Current An=VCCA or GND Bn=VCCB or GND, OE=GND, T/R=VCCA 3.6 3.6 3.6 5.5 5 8 50 80 Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 0.8 0.8 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 0.8 1.5 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 –0.8 –0.8 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 –0.8 –1.2 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 2.0 2.0 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 2.0 3.5 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 0.8 0.8 V Notes NO TAG, NO TAG 3.3 3.3 3.3 5.0 0.8 1.5 V Quiet Output Max Dynamic VOL Quiet Output Min Dynamic VOL Min HIGH Level Dynamic Input Voltage VIHDB VILDA µA An=VCCA or GND Bn=Open, OE=VCCA, T/R=VCCA, VCCB=Open VOLVB VIHDA µA Quiescent VCCA Supply Current as B Port Floats VOLPB VOLVA 1.0 Unit Max LOW Level Dynamic Input Voltage VILDB µA µA 1. Worst case package. 2. Max number of outputs defined as (n). Data inputs are driven 0V to VCC level; one output at GND. 3. Max number of data inputs (n) switching. (n–1) inputs switching 0V to VCC level. Input under test switching: VCC level to threshold (VIHD), 0V to threshold (VILD), f = 1MHz. MOTOROLA 4 LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 MC74LVXC3245 AC ELECTRICAL CHARACTERISTICS TA = –40 to +85°C; CL = 50pF VCCA = 2.7–3.6V VCCB = 4.5–5.5V Symbol Parameter VCCA = 2.7–3.6V VCCB = 3.0–3.6V Min Typ (Note 4.) Max Min Typ (Note 5.) Max Unit tPHL tPLH Propagation Delay A to B 1.0 1.0 4.8 3.9 8.5 7.0 1.0 1.0 5.5 5.2 9.0 8.5 ns tPHL tPLH Propagation Delay B to A 1.0 1.0 3.8 4.3 7.0 8.0 1.0 1.0 4.4 5.1 7.5 8.0 ns tPZL tPZH Output Enable Time OE to B 1.0 1.0 4.7 4.8 8.5 9.0 1.0 1.0 6.0 6.1 9.5 10.0 ns tPZL tPZH Output Enable Time OE to A 1.0 1.0 5.9 5.4 10.0 9.5 1.0 1.0 6.4 5.8 10.5 9.5 ns tPHZ tPLZ Output Disable Time OE to B 1.0 1.0 4.0 3.8 8.5 8.0 1.0 1.0 6.3 4.5 10.0 8.5 ns tPHZ tPLZ Output Disable Time OE to A 1.0 1.0 4.6 3.1 10.0 7.0 1.0 1.0 5.2 3.4 10.0 7.0 ns tOSHL Output to Output Skew, Data to Output ns 1.0 1.5 1.0 1.5 tOSLH (Note NO TAG) 4. Typical values at VCCA = 3.3V, VCCB = 5.0V at 25°C. 5. Typical values at VCCA = 3.3V, VCCB = 3.3V at 25°C. 6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter guaranteed by design. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Unit CIN Input Capacitance VCCA = 3.3V; VCCB = 5.0V 4.5 pF CI/O Input/Output Capacitance VCCA = 3.3V; VCCB = 5.0V 10 pF CPD Power Dissipation Capacitance (Measured at 10MHz) VCCB = 5.0V VCCA = 3.3V 50 40 pF LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 A→B B→A 5 MOTOROLA MC74LVXC3245 VCCA VCCB LVXC3245 SD(0:15) SLOT 0 ISA BUS (IEEE P996) LVXC3245 PCMCIA 2.0 JEIDA 4.1 COMPATIBLE CONTROLLER POWER SWITCHES SLOT 0 SLOT 1 5V VCC 3V VCC LVXC3245 SLOT 1 SD(0:15) LVXC3245 OPTIONAL Figure 3. Block Diagram voltage supply, the PCMCIA card will always have rail–to–rail output swings, maximizing the reliability of the interface. The VCCA pin must always be tied to a 3.3V power supply. This voltage connection provides internal references needed to account for variations in VCCB. When connected as in the figure above, the LVXC3245 meets all the voltage and current requirements of the ISA bus standard (IEEE P996). Configurable I/O Application for PCMCIA Cards The 74LVXC3245 is a dual–supply device well suited for PCMCIA configurable I/O applications. The LVXC3245 consumes less than 1mW of quiescent power in all modes of operation, making it ideal for low power notebook designs. The LVXC3245 meets all PCMCIA I/O voltage requirements at 5V and 3.3V operation. By tying the VCCB pin to the card MOTOROLA 6 LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 MC74LVXC3245 VCC An, Bn 50% VCC 50% VCC 0V tPLH tPHL VOH 50% VCC Bn, An 50% VCC VOL WAVEFORM 1 – PROPAGATION DELAYS tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns VCC 50% VCC OE, T/R 50% VCC 0V tPZH tPHZ VCC VOH – 0.3V 50% VCC An, Bn ≈ 0V tPZL tPLZ ≈ VCC 50% VCC An, Bn VOL + 0.3V GND WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns Figure 4. AC Waveforms VCC PULSE GENERATOR R1 DUT CL RT TEST 2xVCC OPEN RL SWITCH tPLH, tPHL, tPZH, tPHZ Open tPZL, tPLZ 2xVCC CL = 50pF or equivalent (Includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 5. Test Circuit LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 7 MOTOROLA MC74LVXC3245 OUTLINE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948H–01 ISSUE O 24X K REF 0.10 (0.004) 0.15 (0.006) T U T U M V S S S 2X 24 L/2 13 B –U– L PIN 1 IDENT. 12 1 0.15 (0.006) T U NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5 DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–. S A –V– DIM A B C D F G H J J1 K K1 L M C 0.10 (0.004) –T– SEATING PLANE G D H –W– MILLIMETERS MIN MAX 7.70 7.90 4.30 4.50 ––– 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.303 0.311 0.169 0.177 ––– 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ DETAIL E N 0.25 (0.010) K ÉÉ ÇÇÇ ÇÇÇ ÉÉ K1 J1 M N F SECTION N–N DETAIL E J MOTOROLA 8 LVX Data — Low–Voltage CMOS Logic BR1492 — Rev 0 MC74LVXC3245 OUTLINE DIMENSIONS DW SUFFIX PLASTIC SOIC PACKAGE CASE 751E–04 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. –A – 24 13 –B – 1 P 12 PL 0.010 (0.25) M B M 12 J D 24 PL 0.010 (0.25) M T A S B S F R X 45° C –T – SEATING PLANE K G 22 PL M DIM A B C D F G J K M P R MILLIMETERS MIN MAX 15.25 15.54 7.60 7.40 2.65 2.35 0.49 0.35 0.90 0.41 1.27 BSC 0.32 0.23 0.29 0.13 8° 0° 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.601 0.612 0.292 0.299 0.093 0.104 0.014 0.019 0.016 0.035 0.050 BSC 0.009 0.013 0.005 0.011 0° 8° 0.395 0.415 0.010 0.029 Motorola reserves the right to make changes without further notice to any products herein. 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