Order this document by MTB29N15E/D SEMICONDUCTOR TECHNICAL DATA N–Channel Enhancement–Mode Silicon Gate TMOS POWER FET 29 AMPERES 150 VOLTS RDS(on) = 0.07 OHM This advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for low voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. • Avalanche Energy Specified • Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode • Diode is Characterized for Use in Bridge Circuits • IDSS and VDS(on) Specified at Elevated Temperature N–Channel D G CASE 418B–03, Style 2 D2PAK S MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit VDSS VDGR VGS VGSM 150 Vdc 150 Vdc ± 20 ± 40 Vdc Vpk Drain Current — Continuous Drain Current — Continuous @ 100°C Drain Current — Single Pulse (tp ≤ 10 µs) ID ID IDM 29 19 102 Adc Total Power Dissipation Derate above 25°C Total Power Dissipation @ TA = 25°C (1) PD 125 1.0 2.5 Watts W/°C Watts TJ, Tstg EAS – 55 to 150 Drain–to–Source Voltage Drain–to–Gate Voltage (RGS = 1.0 MΩ) Gate–to–Source Voltage — Continuous Gate–to–Source Voltage — Non–Repetitive (tp ≤ 10 ms) Operating and Storage Temperature Range Single Pulse Drain–to–Source Avalanche Energy — STARTING TJ = 25°C (VDD = 25 Vdc, VGS = 10 Vdc, PEAK IL = 29 Apk, L = 1.0 mH, RG = 25 Ω) Thermal Resistance — Junction to Case Thermal Resistance — Junction to Ambient Thermal Resistance — Junction to Ambient (1) Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds Apk °C mJ 421 RθJC RθJA RθJA 1.0 62.5 50 °C/W TL 260 °C (1) When surface mounted to an FR4 board using the minimum recommended pad size. This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. TMOS Motorola Motorola, Inc. 1997 Power MOSFET Transistor Device Data 1 MTB29N15E ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 150 — — TBD — — — — — — 10 100 — — 100 2.0 — 2.7 TBD 4.0 — — 0.055 0.07 — — — — 2.4 2.1 gFS 10 18 — mhos Ciss — 2250 3150 pF Coss — 455 910 Crss — 133 190 td(on) — 17.5 40 tr — 108 220 td(off) — 90 180 tf — 85 170 QT — 78 110 Q1 — 12 — Q2 — 37 — Q3 — 23 — — — 0.92 TBD 1.3 — trr — 174 — ta — 140 — tb — 34 — QRR — 1.4 — — — 3.5 4.5 — — — 7.5 — OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 150 Vdc, VGS = 0 Vdc) (VDS = 150 Vdc, VGS = 0 Vdc, TJ = 125°C) IDSS Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C µAdc nAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 250 µAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 14.5 Adc) RDS(on) Drain–to–Source On–Voltage (VGS = 10 Vdc) (ID = 29 Adc) (ID = 14.5 Adc, TJ = 125°C) VDS(on) Forward Transconductance (VDS = 8.6 Vdc, ID = 14.5 Adc) Vdc mV/°C Ohms Vdc DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = 25 Vdc, Vdc VGS = 0 Vdc, Vdc f = 1.0 MHz) Transfer Capacitance SWITCHING CHARACTERISTICS (2) Turn–On Delay Time Rise Time Turn–Off Delay Time (VDD = 75 Vdc, Vd ID = 29 Adc, Ad VGS = 10 Vdc Vdc, RG = 9.1 Ω)) Fall Time Gate Charge ((VDS = 120 Vdc, Vd , ID = 29 Adc, Ad , VGS = 10 Vdc) ns nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage VSD (IS = 29 Adc, VGS = 0 Vdc) (IS = 29 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time ((IS = 29 Adc, Ad , VGS = 0 Vdc, Vd , dIS/dt = 100 A/µs) Reverse Recovery Stored Charge Vdc ns µC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the contact screw on tab to center of die) (Measured from the drain lead 0.25″ from package to center of die) LD Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) LS nH (1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. (2) Switching characteristics are independent of operating junction temperature. 2 Motorola TMOS Power MOSFET Transistor Device Data MTB29N15E PACKAGE DIMENSIONS C E V –B– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 A 1 2 3 S –T– SEATING PLANE STYLE 2: PIN 1. 2. 3. 4. K J G D 3 PL 0.13 (0.005) H M T B GATE DRAIN SOURCE DRAIN DIM A B C D E G H J K S V INCHES MIN MAX 0.340 0.380 0.380 0.405 0.160 0.190 0.020 0.035 0.045 0.055 0.100 BSC 0.080 0.110 0.018 0.025 0.090 0.110 0.575 0.625 0.045 0.055 MILLIMETERS MIN MAX 8.64 9.65 9.65 10.29 4.06 4.83 0.51 0.89 1.14 1.40 2.54 BSC 2.03 2.79 0.46 0.64 2.29 2.79 14.60 15.88 1.14 1.40 M CASE 418B–03 ISSUE C Motorola TMOS Power MOSFET Transistor Device Data 3 MTB29N15E Motorola reserves the right to make changes without further notice to any products herein. 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