Order this document by MMFT3055V/D SEMICONDUCTOR TECHNICAL DATA N–Channel Enhancement–Mode Silicon Gate TMOS V is a new technology designed to achieve an on–resistance area product about one–half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS E–FET designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. TMOS POWER FET 1.7 AMPERES 60 VOLTS RDS(on) = 0.130 OHM TM D 4 G New Features of TMOS V • On–resistance Area Product about One–half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology • Faster Switching than E–FET Predecessors 1 2 3 S CASE 318E–04, Style 3 TO–261AA Features Common to TMOS V and TMOS E–FETS • Avalanche Energy Specified • IDSS and VDS(on) Specified at Elevated Temperature • Static Parameters are the Same for both TMOS V and TMOS E–FET • Available in 12 mm Tape & Reel Use MMFT3055VT1 to order the 7 inch/1000 unit reel Use MMFT3055VT3 to order the 13 inch/4000 unit reel MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Symbol Value Unit VDSS VDGR VGS VGSM 60 Vdc 60 Vdc ± 20 ± 25 Vdc Vpk Drain Current – Continuous Drain Current – Continuous @ 100°C Drain Current – Single Pulse (tp ≤ 10 µs) ID ID IDM 1.7 1.4 6.0 Adc Total PD @ TA = 25°C mounted on 1” sq. Drain pad on FR–4 bd material Total PD @ TA = 25°C mounted on 0.70” sq. Drain pad on FR–4 bd material Total PD @ TA = 25°C mounted on min. Drain pad on FR–4 bd material Derate above 25°C PD 2.0 1.7 0.9 6.3 Watts mW/°C TJ, Tstg EAS – 55 to 175 °C Rating Drain–to–Source Voltage Drain–to–Gate Voltage (RGS = 1.0 MΩ) Gate–to–Source Voltage – Continuous Gate–to–Source Voltage – Non–repetitive (tp ≤ 10 ms) Operating and Storage Temperature Range Single Pulse Drain–to–Source Avalanche Energy – Starting TJ = 25°C (VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 3.4 Apk, L = 10 mH, RG = 25 Ω ) Thermal Resistance – Junction to Ambient on 1” sq. Drain pad on FR–4 bd material – Junction to Ambient on 0.70” sq. Drain pad on FR–4 bd material – Junction to Ambient on min. Drain pad on FR–4 bd material Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds Apk mJ 58 °C/W RθJA RθJA RθJA TL 70 88 159 260 °C This document contains information on a new product. Specifications and information herein are subject to change without notice. E–FET and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. TMOS Motorola Motorola, Inc. 1996 Power MOSFET Transistor Device Data 1 MMFT3055V ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 60 — — 63 — — Vdc mV/°C — — — — 10 100 — — 100 nAdc 2.0 — 2.8 5.6 4.0 — Vdc mV/°C — 0.115 0.13 Ohm — — — — 0.27 0.25 gFS 1.0 2.7 — mhos Ciss — 360 500 pF Coss — 110 150 Crss — 25 50 td(on) — 8.0 20 tr — 9.0 20 td(off) — 32 60 tf — 18 40 QT — 13 20 Q1 — 2.0 — Q2 — 5.0 — Q3 — 4.0 — — — 0.85 0.7 1.6 — trr — 40 — ta — 34 — tb — 6.0 — QRR — 0.089 — — 4.5 — — 7.5 — OFF CHARACTERISTICS Drain–to–Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc) IGSS µAdc ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 250 µAdc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 0.85 Adc) RDS(on) Drain–to–Source On–Voltage (VGS = 10 Vdc, ID = 1.7 Adc) (VGS = 10 Vdc, ID = 0.85 Adc, TJ = 150°C) VDS(on) Forward Transconductance (VDS = 8.0 Vdc, ID = 1.7 Adc) Vdc DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (2) Turn–On Delay Time (VDD = 30 Vdc, ID = 1.7 Adc, VGS = 10 Vdc, RG = 9.1 Ω) Rise Time Turn–Off Delay Time Fall Time Gate Charge (VDS = 48 Vdc, ID = 1.7 Adc, VGS = 10 Vdc) ns nC SOURCE–DRAIN DIODE CHARACTERISTICS Forward On–Voltage (1) (IS = 1.7 Adc, VGS = 0 Vdc) (IS = 1.7 Adc, VGS = 0 Vdc, TJ = 150°C) Reverse Recovery Time (IS = 1.7 Adc, VGS = 0 Vdc, dIS/dt = 100 A/µs) Reverse Recovery Stored Charge VSD Vdc ns µC INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance (Measured from the drain lead 0.25″ from package to center of die) LD Internal Source Inductance (Measured from the source lead 0.25″ from package to source bond pad) LS nH nH (1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%. (2) Switching characteristics are independent of operating junction temperature. 2 Motorola TMOS Power MOSFET Transistor Device Data MMFT3055V PACKAGE DIMENSIONS A F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 4 S B 1 2 3 D L G J C 0.08 (0003) M H INCHES DIM MIN MAX A 0.249 0.263 B 0.130 0.145 C 0.060 0.068 D 0.024 0.035 F 0.115 0.126 G 0.087 0.094 H 0.0008 0.0040 J 0.009 0.014 K 0.060 0.078 L 0.033 0.041 M 0_ 10 _ S 0.264 0.287 MILLIMETERS MIN MAX 6.30 6.70 3.30 3.70 1.50 1.75 0.60 0.89 2.90 3.20 2.20 2.40 0.020 0.100 0.24 0.35 1.50 2.00 0.85 1.05 0_ 10 _ 6.70 7.30 K STYLE 3: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN CASE 318E–04 ISSUE H Motorola TMOS Power MOSFET Transistor Device Data 3 MMFT3055V Motorola reserves the right to make changes without further notice to any products herein. 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