SAMSUNG S5C7212X01

TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
INTRODUCTION
48-QFP-0707
The S5C7212X01 is a CMOS integrated circuit designed for making various
timing pulses for B/W CCD camera.
FEATURES
•
ORDERING INFORMATION
Compatible with both EIA and CCIR mode
( EIA : S5F325NW02 / S5F325NU02
CCIR : S5F329PW02 / S5F329PU02 )
•
Built in auto iris function (Electronic Exposure)
•
Mirror mode timing generation
•
Field interlace mode only
•
Timing and sync one chip IC
•
Oscillation frequency
EIA : 19.06992MHz, CCIR : 18.93750MHz
Device
Package
Operating
S5C7212X01-E0R0
48-QFP-0707
-20 °C − 75 °C
APPLICATION
•
B/W CCD Camera
ϕH1
ϕH2
RG
XSUB
XV2
XV1
XSG1
XV3
37
36
35
33
30
29
28
27
26
25
XV4
ϕH3
38
XSG3
ϕH4
BLOCK DIAGRAM
24
CL 43
1/2
X2 41
X1 40
GATE1
1/606
Horizontal
ROM
F/F
TS2 45
GATE2
TS1 46
TS0 47
PWR 48
1/525
or
1/625
Vertical
ROM
F/F
High/Low
Control
Shutter
Speed
Count
Shutter
Speed
Control
22
SHP
21
SHD
18
CLP1
17
CLP2
16
CLP3
15
DFDO
14
CLEN
13
WIN
1
2
3
4
7
8
9
10
11
12
MD2
MD1
EE1
EE2
FLD
PBLK
CSYNC
CBLK
VD
HD
Shutter
Speed
ROM
1
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
PIN DESCRIPTION
2
No
Symbol
I/O
Description
Remark
1
MD2
I
CCIR/EIA mode selection
* Information (1)
2
MD1
I
NORMAL/MIRROR mode selection
* Information (1)
3
EE1
I
EE mode control input 1
* Information (2)
4
EE2
I
EE mode control input 2
* Information (2)
5
VSS1
-
Ground
6
VDD1
-
+5V
7
FLD
O
Field separation pulse
8
PBLK
O
Pre - blanking pulse
9
CSYNC
O
Composite Sync.pulse
10
CBLK
O
Composite Blanking pulse
11
VD
O
Vertical driving pulse
12
HD
O
Horizontal driving pulse
13
WIN
O
Window pulse
14
CLEN
O
1/2 HD frequency pulse
15
DFDO
O
1/2 VD frequency pulse
16
CLP3
O
Clamp pulse 3 (Dummy black level)
17
CLP2
O
Clamp pulse 2 (Optical black level)
18
CLP1
O
Clamp pulse 1 (Optical black level)
19
VSS2
-
Ground
20
VDD2
-
+5V
21
SHD
O
Data Sample & Hold pulse
22
SHP
O
Pre - Charge Sample & Hold pulse
23
VSS3
-
Ground
24
XV4
O
Vertical transfer clock 4
25
XSG3
O
Read out Pulse 3
26
V3
O
Vertical transfer clock 3
27
XSG1
O
Read out Pulse 1
28
XV1
O
Vertical transfer clock 1
29
XV2
O
Vertical transfer clock 2
30
XSUB
O
Shutter speed control for auto iris
31
VDD3
-
+5V
32
VSS4
-
Ground
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
No
Symbol
I/O
Description
33
ϕRG
O
Reset gate pulse
34
VDD4
-
+5V
35
ϕH2
O
Horizontal transfer pulse 2 ( Mirror mode)
36
ϕH1
O
Horizontal transfer pulse 1 ( Normal mode’H1’)
37
ϕH3
O
Horizontal transfer pulse 3 ( Normal mode’H2’)
38
ϕH4
O
Horizontal transfer pulse 4 ( Mirror mode )
39
VSS5
-
Ground
40
X1
I
Oscillation clock Input
EIA : 19,069928MHz CCIR : 18.93750MHz
41
X2
O
Oscillation clock Output
42
VDD5
O
+5V
43
CL
O
1/2 Oscillation clock
EIA : 9.53496MHz
44
VSS6
-
Ground
45
TS2
I
Test Input 2
46
TS1
I
Test Input 1
47
TS0
I
Test Input 0
48
PWR
-
Power On Reset
Remark
CCIR : 9.46875MHz
Information 1) MD2 and MD1 mode selection ( Pull - down )
MD2
L
H
MD1
MODE
L
EIA NORMAL
H
EIA MIRROR
L
CCIR NORMAL
H
CCIR MIRROR
Information 2 ) EE2 and EE1 shutter speed mode selection ( Pull - up )
EE2
L
H
EE1
MODE
L
SHUTTER SPEED STOP
H
SHUTTER SPEED UP
L
SHUTTER SPEED DOWN
H
SHUTTER SPEED STOP
3
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
ABSOLUTE MAXIMUM RATINGS
Characteristics
Symbol
Value
Unit
VCC
7
V
Input Voltage
VI
VSS-0.5 − VDD+0.5
V
Output Voltage
VO
VSS-0.5 − VDD+0.5
V
Operating Temperature
TOPR
-20 − +75
°C
Storage Temperature
TSTG
-55 − +150
°C
Supply Voltage
ELECTRICAL CHARACTERISTICS
(VDD=5V, Ta=25°C, unless otherwise specified)
Characteristics
Symbol
Test Condition
Min
Typ
Max
Unit
Supply Voltage
VDD
-
4.75
5.0
5.25
V
Input Voltage 2
VIH
-
0.7VDD
-
-
V
VIL
-
-
-
0.3VDD
V
Output Voltage 1
4
VOH1
IOH1 = -2mA
VDD-0.5
-
-
V
VOL1
IOL1 = 4mA
-
-
0.6
V
Output Voltage 2
VOH2
IOH2 = -4mA
VDD-0.5
-
-
V
(CL, RG, SHP, SHD)
VOL2
IOL2 = 8mA
-
-
0.6
V
Output Voltage 3
VOH3
IOH3 = -8mA
VDD-0.5
-
-
V
(H1, H2, H3, H4)
VOL3
IOL3 = 8mA
-
-
0.6
V
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
AC CHARACTERISTICS
tr
tf
twh
90%
0.9VDD
twl
10%
twh
PULSES
XSG1, XSG3
Min.
2.3
0.1VDD
twl
Typ. Max. Min.
tr
Typ. Max. Min.
2.5
XV1, XV2, XV3, XV4
H1, H2, H3, H4
26
32
RG
11
13
XSUB
1.5
2.0
SHP, SHD, CLP1,
CLP2, CLP3, DFD0,
CLEN, WIN, HD, VD,
CBLK, CSYNC, FLD
26
Typ.
tf
Max. Min.
Typ. Max.
0.5
0.5
us
0.015
0.24
us
32
11
51
5
12
11
14
12
5
0.5
13
Unit
16
13
14
ns
ns
0.5
us
16
ns
5
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
OPERATING PRINCIPLES & METHODS
POWER ON RESET
S5C7212X01 has two reset methods. The one is power on reset and the other is normal reset.
When user wants to use power on reset, which generates an automatic reset signal that is needed to initialize the
S5C7212X01 internal system when power is on, user should connect the 1000pF capacitor to the PWR ( pin 48 )
terminal.
Power on reset system has an internal 100Kohm pull up resister. So, user can control reset signal timing when
user changes the value of the capacitor, which is connected to the PWR terminal.
When user wants to use normal reset, user should remove the capacitor from the PWR terminal, and supply the
reset signal to the PWR terminal.
48
S5C7212X01
KS7212
RESET
SIGNAL
48
KS7212
S5C7212X01
1000pF
2.4 ~
2.6 V
840ns
Fig. 1 POWER ON RESET
Fig. 2 NORMAL RESET
When using the u-Com system, the reset signal can be supplied three times, and times of 1 signal should be
larger than four times of CL clock.
6
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
APPLICATION CIRCUIT ( EIA , NORMAL MODE )
TO VERTICAL
DRIVER
TO CCD
VDD
36 35 34 33 32 31 30 29 28 27 26 25
37
24
38
23
39
22
40
19.0699MHz
X-tal
21
S5C7212X01
KS7212
41
42
19
TIMING&& SYNC
SYNC GEN.
TIMING
GEN
43
18
44
17
45
16
46
15
47
14
48
13
1
2
VDD
*
20
3
4
5
6
7
8
9 10 11 12
TO SIGNAL
PROCESSOR
Application circuit for normal mode
EIA : 19.06992MHz
CCIR: 18.93750MHz
7
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
HIGH SPEED TIMING RELATIONSHIP
X1
H1
PG
CCD OUT
SHP
SHD
8
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
XSG2
XSG1
V4
V3
EVEN
V2
V1
V4
V3
ODD
V2
V1
HD
39.5uS
43.5uS
2.5uS
1.1uS
2.5uS
2.0uS
CCD VERTICAL DRIVING PULSE TIMING DIAGRAM
9
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
10
EVEN VD
ODD VD
VSYNC
EQSYNC
HSYNC
HD
1.47
2.45
4.89
6.36
10.76
26.89
4.86
Unit : us
HORIZONTAL TIMING CHART FOR EIA
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
EVEN VD
ODD VD
VSYNC
EQSYNC
HSYNC
HD
1.48
2.47
4.93
6.41
11.70
27.07
Unit : us
HORIZONTAL TIMING CHART FOR CCIR MODE
11
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
12
CLP3
CLP2
CLP1
EVEN VD
ODD VD
VSYNC
2.45
HSYNC
HD
10.76
1/2H
4.86
Unit : us
HORIZONTAL TIMING CHART FOR MIRROR EIA MODE
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
CLP3
CLP2
CLP1
ODD VD
VSYNC
EQSYNC
HD
2.745
6.41
11.70
4.93
Unit : us
HORIZONTAL TIMING CHART FOR MIRROR CCIR MODE
13
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
14
SHD
SHP
PG
H4
H3
H2
H1
OSC1
H1, H2, H3, H4, PG, SHP, SHD TIMING CHART AT MIRROR MODE OF CCIR
H1, H2, H3, H4, PG, SHP, SHD TIMING CHART AT MIRROR MODE OF CCIR
WIN
FLD
CBLK
CSYNC
VD
HD
WIN
FLD
CBLK
CSYNC
VD
HD
FIELD O
FIELD E
9H
9H
FIELD E
FIELD O
20H
20H
80.5H
80H
EIA VERTICAL TIMING CHART
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
EIA VERTICAL TIMING CHART
15
16
WIN
FLD
CBLK
CSYNC
VD
HD
WIN
FLD
CBLK
CSYNC
VD
HD
FIELD O
FIELD E
7.5H
FIELD E
7.5H
FIELD O
25H
25H
96.5H
97H
CCIR VERTICAL TIMING CHART
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
CCIR VERTICAL TIMING CHART
PBLK
CLP3
CLP2
24 6
10
1 35
135
246
15
CLP1
5
4
3
2
1
525
491
492
492
493
13 5
2 4 6
13 57
2 468
280
CCD
OUT
V4
V3
V2
V1
XSG2
XSG1
HD
BLK
VD
FLD
VERTICAL TIMING CHART FOR EIA
TIMING & SYNC. GENERATOR FOR B/W CCD
S5C7212X01
VERTICAL TIMING CHART FOR EIA
290
285
275
270
265
260
25
20
520
17
18
PBLK
CLP3
CLP2
24 6
10
1 35
2 46
13 5
15
CLP1
5
4
3
2
1
625
582
581
582
583
135
2 46
13 5 7
2 4 68
330
CCD
OUT
V4
V3
V2
V1
XSG2
XSG1
HD
BLK
VD
FLD
VERTICAL TIMING CHART FOR CCIR
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
VERTICAL TIMING CHART FOR CCIR
340
335
325
320
315
310
25
20
620
S5C7212X01
TIMING & SYNC. GENERATOR FOR B/W CCD
PACKAGE DIMENSION
48-QFP-0707
unit : mm
9.00 +
− 0.30
0~
7.00 +
− 0.20
0.1
8
3 +0
- 0 .10
.
7.00 −
+ 0.20
0.10 MAX
0.50 +
− 0.20
9.00 +
− 0.30
05
# 48
#1
( 0.75 )
0.18 +
− 0.10
0.50
0.10 MAX
0.00 MIN
1.40 +
− 0.10
1.60 MAX
19