SONY CXD3142R

CXD3142R
Signal Processor LSI for Single-Chip CCD Color Camera
Description
The CXD3142R is a signal processor LSI for Ye,
Cy, Mg and G single-chip CCD color cameras. In
addition to basic camera signal processing functions,
it includes an AE/AWB detection circuit, a sync signal
generation circuit and an external sync circuit, etc.
This chip also has a built-in microcontroller to realize
basic camera functions such as AE/AWB without an
external microcomputer.
Features
• Generates timing pulses to drive the 510H CCD
image sensor
Sync signal generation function
Luminance/chroma signal processing
Luminance/chroma signal integral detector
Automatically control camera function
• Supports NTSC/PAL modes
• Supports 510H system CCD image sensor
• Built-in 9-bit A/D converter
• Analog composite output
— Built-in digital encoder
— 10-bit D/A converter output
• Digital output
— YUV 8-bit multiplex output
• Supports external sync functions
• AE/AWB detector
• Block control functions with a built-in microcontroller
— AE/AWB/YC/CLAMP/SG control functions
• Peripheral IC communication control functions
— EVR, EEPROM communication control
• Serial communication function
— Microcomputer (3 wires)
Absolute Maximum Ratings
• Supply voltage VDD
VSS – 0.5 to +4.6
AVDD
VSS – 0.5 to +4.6
• Input voltage
VI
VSS – 0.5 to VDD + 0.5
• Output voltage
VO
VSS – 0.5 to VDD + 0.5
• Operating temperature
Topr
–20 to + 75
• Storage temperature
Tstg
–55 to +150
V
V
V
V
80 pin LQFP (Plastic)
Recommended Operating Conditions
• Supply voltage VDD
3.0 to 3.6 V
AVDD (AVD1, 2, 5, 6) 3.0 to 3.6 V
AVDD (AVD4)
3.0 to 5.5 V
• Operating temperature
Topr
–20 to +75 °C
Applications
• Industrial CCD cameras
(surveillance/FA/image input cameras)
• Multimedia CCD cameras
(teleconferencing/personal computer cameras)
Applicable CCD Image Sensors∗
510H color CCDs (Type 1/3, 1/4, 1/6 NTSC/PAL)
Supported Relates LSIs
V-Driver: CXD1267AN
AGC:
CXA2096N
EVR:
MB88347 (Fujitsu Limited.)
EEPROM: CAT64LC40JI
(Catalyst Semiconductor Inc.)
AK6420
(Asahi Kasei Microsystems Co.,Ltd.)
∗ Applicable CCD Image Sensors are applicable products as of
preparing this data sheet.
They may be changed according to the version up and production
stop of CCD image sensor.
°C
°C
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E02523-PS
V-DRV
CXD1267AN
CCD
Block Diagram
CDS
AGC
CXA2096N
–2–
1HDL
1HDL
VD
SYNC
GEN
V
PHASE
COMP
V cycle sig
TIMING
GEN
STG
RGB-CNT
RGB-INTG
REF
GATE
Y-INTG
OB
DET
A/D
PRE
CXD3142R
PLL
LPF
PLL
OSC
WIND
GEN
WEIGHT
GEN
OPD
Y-AE
OSC
C-WB
LPF
CLMP
C-Process
HV
APC
GAM
H
APC
SG
SYS
CON
CPU
RGB
MTX
VSPRS/
HSPRS
V
APC
LPF
CLMP
Y-Process
GAM
YC
CTRL
INIT
AE
CLAMP
Software
WB
AWB
PORT
DRV
LN
MTX
YCmix
GAIN
D/A
YCMPX
PORT
EVR
EEP
ROM
CAM-SIF
• EVR
• EEPROM
EXT-SIF
• µCOM
DADJ
D-ENC
YCMIX
BLK
DADJ
External µcom
DIP_SW
Analog
Composite
Digital
YUV
CXD3142R
CXD3142R
OSCI
OSCO
VDD3
CK
P0 (AEME)
P1 (MIRIS)
P2 (BLCOFF)
P3 (AGCMAX)
P4 (SHTFIX)
P5 (AWB1)
P6 (AWB2)
P7 (AWB3)
VSS3
VB
AVS5
IREF
VREF
VG
AVD5
IO
Pin Configuration
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
D7 61
40 PCOMP
D6 62
39 SCK
D5 63
38 SO
D4 64
37 SI
D3 65
36 XCS
D2 66
35 VDD2
D1 67
34 CASCK
D0 68
33 CASO
AVD6 69
32 CASI
S0 (FLD) 70
31 CSROM
S1 (VD) 71
30 CSEVR
S2 (HD) 72
29 VSS2
XRST 73
28 PCK
VDD4 74
27 PSCO
NTPAL 75
26 PSCI
TEST 76
25 XSG2
VSS4 77
24 XV4
PBLK 78
23 XV3
22 XSG1
CLPDM 79
21 XV2
XV1
VDD1
VSS1
XSUB
H1
AVS3
H2
VRB
9 10 11 12 13 14 15 16 17 18 19 20
AVD4
AVS1
8
RG
VIN
7
REFC3
AVD1
6
AVS2
5
XRS
4
AVD2
3
XSHP
2
XSHD
1
VRT
CLP0 80
Note) Symbols in parentheses are the signal names when the LSI is switched by the serial communication
settings.
All pin symbols (pin names) for the CXD3142R are the names next to the pin No. (outside the
parentheses).
–3–
CXD3142R
Pin Description
I/O
1
VRT
I (A)
2
AVD1
—
3
VIN
4
AVS1
—
5
VRB
I (A)
A/D converter reference voltage (bottom) input.
6
XSHP
O
Precharge level sample-and-hold pulse output.
7
XSHD
O
Data sample-and-hold pulse output.
8
AVD2
—
Power supply for sample-and-hold pulse driver. (+3.3V)
9
XRS
O
Resampling pulse output.
10
AVS2
—
GND
11
RG
O
Reset gate pulse output.
12
REFC3
I
Reference capacitor connection pin.
13
AVD4
—
Power supply for H driver. (+3.3V/+5.0V)
14
H2
O
CCD horizontal register transfer pulse output.
15
H1
O
CCD horizontal register transfer pulse output.
16
AVS3
—
GND
17
VSS1
—
GND
18
XSUB
O
CCD electronic shutter pulse output.
19
VDD1
—
Power supply for Logic. (+3.3V)
20
XV1
O
CCD vertical register transfer pulse output.
21
XV2
O
CCD vertical register transfer pulse output.
22
XSG1
O
CCD sensor readout pulse output.
23
XV3
O
CCD vertical register transfer pulse output.
24
XV4
O
CCD vertical register transfer pulse output.
25
XSG2
O
CCD sensor readout pulse output.
26
PSCI
I
Oscillation cell input. (slave)
27
PSCO
O
Oscillation cell output. (slave)
28
PCK
I
System clock input. (slave)
29
VSS2
—
GND
30
CSEVR
O
Chip select output for camera peripheral ICs. (to EVR)
31
CSROM
O
Chip select output for camera peripheral ICs. (to EEPROM)
32
CASI
I
Serial data input for camera peripheral ICs. (from EEPROM)
33
CASO
O
Serial data output for camera peripheral ICs. (to EVR, EEPROM)
34
CASCK
O
Serial clock output for camera peripheral ICs. (to EVR, EEPROM)
35
VDD2
—
Power supply for Logic. (+3.3V)
A/D converter reference voltage (top) input.
A/D converter analog signal input.
A/D
Power supply for A/D converter. (+3.3V)
AVD1
–4–
S/H
GND
AVD2
AVD4
CCD
I (A)
Power
supply
Description
VDD
OSC2
Symbol
Peripheral
communication
Pin
No.
CXD3142R
36
XCS
I
Chip select input for microcomputer communication.
37
SI
I
Serial data input for microcomputer communication.
38
SO
O
Serial data output for microcomputer communication.
39
SCK
I
Serial clock input for microcomputer communication.
40
PCOMP
41
OSCI
I
Oscillation cell input. (master)
42
OSCO
O
Oscillation cell output. (master)
43
CK
I
System clock input. (master)
44
VDD3
45
P0 (AEME)
I
Port 0 input for mode switch. (AE mode switching)
46
P1 (MIRIS)
I
Port 1 input for mode switch. (Iris mode switching)
47
P2 (BL COFF)
I
Port 2 input for mode switch. (Backlight compensation off)
48
P3 (AGCMAX)
I
Port 3 input for mode switch. (AGC maximum gain switching)
49
P4 (SHTFIX)
I
Port 4 input for mode switch. (SHUT FIX mode switching)
50
P5 (AWB1)
I
Port 5 input for mode switch. (AWB mode switching)
51
P6 (AWB2)
I
Port 6 input for mode switch. (ATW/push lock switching)
52
P7 (AWB3)
I
Port 7 input for mode switch. (Push lock signal input )
53
VSS3
54
VB
55
AVS5
56
IREF
O (A) Reference current setting pin.
57
VREF
I (A)
Reference voltage setting pin.
58
VG
I (A)
Capacitor connection pin. (about 0.1µF)
59
AVD5
—
Power supply for D/A converter. (+3.3V)
60
IO
O
Composite signal (current) output.
61
D7
O/Z
Digital signal output.
62
D6
O/Z
Digital signal output.
63
D5
O/Z
Digital signal output.
64
D4
O/Z
Digital signal output.
65
D3
O/Z
Digital signal output.
66
D2
O/Z
Digital signal output.
67
D1
O/Z
Digital signal output.
68
D0
O/Z
Digital signal output.
69
AVD6
—
—
I (A)
—
—
OSC1
Phase comparator output for PLL.
Power supply for Logic. (+3.3V)
VDD
SW
O/Z
Power
supply
Description
External
communication
I/O
GND
Capacitor connection pin. (about 0.1µF)
GND
Power supply for A/D converter. (+3.3V)
–5–
D/A
Symbol
AVD5
Digital output
Pin
No.
VDD
CXD3142R
Pin
No.
Symbol
I/O
70
S0 (FLD)
O/Z
71
S1 (VD)
O/I/Z Sync signal output 1. (VD signal)/VD signal input for LL
72
S2 (HD)
O/Z
73
XRST
I
74
VDD4
—
75
NTPAL
I
TV mode switching. (Low: NTSC, High: PAL)
76
TEST
I
Chip test input. Low fixed at normal operation.
77
VSS4
—
GND
78
PBLK
O
Preblanking pulse output.
79
CLPDM
O
Dummy data clamp pulse output.
80
CLP0
O
Optical black clamp pulse output.
Power
supply
Sync signal output 0. (FLD signal)
Sync signal output 2. (HD signal)
Reset input. (Low: reset, High: normal operation)
Sync signal
Description
Power supply for Logic. (+3.3V)
I:
CMOS level input
O:
CMOS level output
I/O: Bidirectional input/output
O/Z: Tri-state output
I (A): Analog input
O (A): Analog output
O/I/Z: Bidirectional input/output with Tri-state
–6–
S/H
VDD
CXD3142R
Electrical Characteristics
DC Characteristics
(Within recommended operating range)
Min.
Typ.
Max.
Unit
VDD1, 2, 3, 4
3.0
3.3
3.6
V
AVD1, 2, 6
3.0
3.3
3.6
V
3.0
3.3
3.6
V
3.0
—
5.5
V
Item
Supply voltage
D/A output amplitude = 1Vp-p
AVD5
AVD4
VOH1∗1
Output voltage
IOH = 4mA
VOL1∗1
VOH2∗2, ∗6
VOL2∗2, ∗6
Input voltage
Hysteresis
Input leak current
∗1
∗2
∗3
∗4
∗5
∗6
∗7
Conditions
Symbol
VDD – 0.4
IOL = 4mA
0.4
IOH = 1mA
VDD – 0.4
0.4
0.7VDD
0.5
VIN = VDD
40
V
V
0.2VDD
– VT–∗2, ∗3, ∗5
V
V
IOL = 1mA
VT+∗2, ∗3, ∗4, ∗5
VT–∗2, ∗3, ∗4, ∗5
VT+
IIH∗7
V
100
V
V
240
µA
XV1, XV2, XV3, XV4, XSG1, XSG2, XSUB, PBLK, CLPDM, CLP0, SO, CASCK, CASO, CSROM, CSEVR
S1
XRST, XCS, SI, SCK, CASI
NTPAL
P0, P1, P2, P3, P4, P5, P6, P7
S0, S2, D0, D1, D2, D3, D4, D5, D6, D7
TEST
I/O Pin Capacitance
Item
(VDD = VI = 0V, f = 1MHz)
Symbol
Min.
Typ.
Max.
Unit
Input pin capacitance
CIN
9
pF
Output pin capacitance
COUT
11
pF
I/O pin capacitance
CI/O
11
pF
–7–
–8–
CLPOB
PBLK
CLPDM
XSUB
XV4
XV3
XV2
XV1
XRS
XSHD
XSHP
RG
H2
H1
HD
VD
FLD
MCK
CK
0
2
10
23
20
21
20
510H NTSC Horizontal Timing Chart
29
30
35
41
40
47
52
53
50
59
60
65
69
70 (140)
70
70
77
80
84
91
90
96
96
100
110
120
140
130 (360)
130
150
CK: 1212fH (19.06993MHz/52.44ns)
MCK: 606fH (9.53496MHz/104.88ns)
CXD3142R
–9–
CLPOB
PBLK
CLPDM
XSUB
XV4
XV3
XV2
XV1
XRS
XSHD
XSHP
RG
H2
H1
HD
VD
FLD
MCK
CK
0
1
10
510 PAL Horizontal Timing Chart
21
22
20
28
30
34
40
40
46
50
52
57
58
60
64
70
74
70 (140)
70
70
84
90
77
91
1 2 3 4 5 6 7 8 9 10111213141516
80
101
101
100
110
120
140
131 (262)
130
CK: 1212fH (18.9375MHz/52.81ns)
MCK: 606fH (9.46875MHz/105.61ns)
150
CXD3142R
– 10 –
CLPOB
CLPDM
PBLK
CCD
XV4
XV3
XV2
XV1
XSG2
XSG1
VD
FLD
0
492
491
0
510H NTSC Vertical Timing Chart
3
9
10
1 3 5 7 9 11 13 15 17 19 21
2 4 6 8 10 12 14 16 18 20
20
30
492
265.5
262.5
260
270
271.5
2 4 6 8 10 12 14 16
1 3 5 7 9 11 13 15
280
CK: 1212fH (19.06993MHz/52.44ns)
MCK: 606fH (9.53496MHz/104.88ns)
CXD3142R
– 11 –
CLPOB
CLPDM
PBLK
CCD
XV4
XV3
XV2
XV1
XSG2
XSG1
VD
FLD
581
582
0.5
0
510H PAL Vertical Timing Chart
3
8
10
20
1 3 5 7 9 11 13 15 17 19 21
2 4 6 8 10 12 14 16 18 20
30
310
581
580 582
313
315.5
320.5
320
330
1 3 5
2 4 6
CK: 1212fH (18.9375MHz/52.81ns)
MCK: 606fH (9.46875MHz/105.61ns)
CXD3142R
EVEN
ODD
– 12 –
XV4
XV3
XV2
XV1
XV4
XV3
XV2
XV1
XSG2
XSG1
0
23
23
20
510H NTSC Readout Timing Chart
35
29
35
29
41
47
41
47
40
53
59
53
59
60
65
65
366
369
380
379
366
369
360
420
417
403
400
460
460
460
441
440
500
20
35
29
41
47
40
53
59
53
59
60
65
65
80
CK: 1212fH (19.06993MHz/52.44ns)
MCK: 606fH (9.53496MHz/104.88ns)
CXD3142R
EVEN
ODD
– 13 –
XV4
XV3
XV2
XV1
XV4
XV3
XV2
XV1
XSG2
XSG1
0
510H PAL Readout Timing Chart
20
28
28
40
34
40
34
40
46
52
46
52
58
58
64
64
60
70
70
375
365
362
365
362
360
380
413
399
400
420
437
440
456
456
460
500
20
40
34
40
46
58
58
52
64
64
60
70
70
80
CK: 1212fH (18.9375MHz/52.81ns)
MCK: 606fH (9.46875MHz/105.61ns)
CXD3142R
CXD3142R
510H High-speed Clock Timing chart
CK
MCK
H1
H2
RG
XSHP
XSHD
XRS
– 14 –
CXD3142R
Serial Communication Data
Classification of Serial Data
Category
Contents
I/O
Byte 0
CAT1: SYSCON
I
01h
System configuration
CAT2: CPU
I
02h
CPU configuration
CAT3: PICT
I
03h
Picture parameters
CAT4: AE
I
04h
AE usr specification
CAT5: AWB
I
05h
AWB usr specification
CAT6: ADJUST
I
06h
Adjustment
CAT7: TIMING
I
07h
Timing parameters
CAT8: SOUT
CAT9: EXTCON
I
O
I
08h
09h
Byte 1 to
Serial OUT setting
Serial OUT data
External controller
– 15 –
CXD3142R
Category 1: SYSCON
CAT1
Serial input
Byte bit
Name
0
Description
#1
Block
0
common
0
MAIN/C
0
common
Address
LSB
1
2
0
3
4
Category select code
01h: SYSCON
CAT1
5
6
7
0
NTPAL
1
OCCF
2
1
3
4
5
0: NTSC, 1: PAL
On-chip color filter
0: Type 1/4, 1: Type 1/3
LSB
(Low)
OUTMODE
MSB
"0" fixed
01h
LSB
0x: Analog
1x: Analog and Digital
MSB
1
common
Y/C
(Low)
"0" fixed
0
7
(Low)
"0" fixed
0
1
2
3
4
5
6
7
DLYH
LSB Delay Adjustment for H1, H2
MSB 0h: +0ns, 1h: +4ns, 2h: +7ns, 3h: –8ns
0h
DTYH
LSB Duty Adjustment for H1, H2
MSB 0h: Norm, 1h: F + 3ns, 2h: F + 6ns, 3h: R + 3ns
0h
DLYRG
LSB Delay Adjustment for RG
MSB 0h: +0ns, 1h: +4ns, 2h: +7ns, 3h: –8ns
0h
DTYRG
LSB Duty Adjustment for RG
MSB 0h: Norm, 1h: F + 3ns, 2h: F + 6ns, 3h: R + 3ns
0h
STG
0
IRLESS
IR less mode
1: ON
0
AWB/MAIN
1
VIDEOAE
Video AE mode
1: ON
1
AE/MAIN
0h
STG
2
3
NTSC/PAL
6
0
2
MSB
3
4
ADCKSEL
LSB ADCK Phase Adjustment
MSB 0h: +0Tck, 1h: +1/4Tck, 2h: +2/4Tck, 3h: +3/4Tck
03h
0
(Low)
"0" fixed
6
OPBCKINV
Clock Invert for 1st FF after ADC
7
(Low)
"0" fixed
5
0: Norm, 1: INV
0
0
#1: Initial setting value with Power-on
– 16 –
02h
PRE
CXD3142R
CAT1
Serial input
Byte bit
4
Name
Description
#1
0
(Low)
"0" fixed
0
1
(Low)
"0" fixed
0
2
(Low)
"0" fixed
0
(Low)
"0" fixed
0
3
4
5
6
7
S2DLY
LSB Delay Adjustment for S2
MSB 0h: +0ns, 1h: +15ns, 2h: +30ns, 3h: +45ns
0h
Block
Address
04h
TOP
(Low)
"0" fixed
0
(Low)
"0" fixed
0
7
SPINSW
S0, 1, 2 pin active SW
0: Active, 1: Hi-Z
0
0
ESMODE
Ext Sync mode
0: INT, 1: LL
0 TOP/STG
1
(Low)
"0" fixed
2
CMPMODE
3
(Low)
"0" fixed
4
CMPINV
P-COMP ref/var INVerse
(Low)
"0" fixed
0
S0 pin select
0h: FLD, 1h: SYNC, 2h: BF, 3h: DISP
4h: VD, 5h: HD, 6h: CBLK, 7h: DBLK
0h TOP/STG
Sync SHIFT (shiftVD/HD)
0
STG
S1SEL
LSB S1 pin select
00: VD, 01: FLD, 10: HD, 11: DISP
MSB
ESMODE = LL: S1 = AC in
0h
STG
S2SEL
LSB S2 pin select
MSB 00: HD, 01: FLD, 10: VD, 11: DISP
0h
STG
0
1
2
5
3
05h
4
5
6
6
P-COMP MODE
TOP
0
0: Norm
1: VCOMP mode (pin release)
0 TOP/STG
0
0: Normal, 1: Inverse
0
06h
STG
5
6
7
0
1
LSB
S0SEL
2
7
3
4
5
6
7
MSB
SSHIFT
#1: Initial setting value with Power-on
– 17 –
1: Select shiftVD
07h
CXD3142R
Category 2: CPU
CAT2
Serial input
Byte bit
Name
0
Description
#1
Block
CPU Command (EEPROM, AECMD, AWBCMD)
0h
MAIN
CPU Address
0h
MAIN
CPU Data
0h
MAIN
LSB
1
2
0
3
4
Category select code
02h: CPU
CAT2
5
6
7
MSB
0
LSB
1
2
1
3
4
CPUCMD
5
6
7
MSB
0
LSB
1
2
2
3
4
CPUADRS
5
6
7
MSB
0
LSB
1
2
3
3
4
CPUDATA
5
6
7
MSB
#1: Initial setting value with Power-on
– 18 –
Address
CXD3142R
CAT2
Serial input
Byte bit
4
0: CPU, 1: EXT micon mode
0
1
CPUAE
0: CPU, 1: AE hold (stop)
0
2
CPUAWB
0: CPU, 1: AWB hold (stop)
0
3
CPUSPRS
0: CPU, 1: SPRS hold (stop)
0
4
CPUDIP
0: CPU, 1: Ext Dip SW OFF
0
5
CPUSG
0: CPU, 1: SFT UP/DOWN Function OFF
0
NORMFL
Normal FL (AGC + SHT) SW
1: ON
1
1
LIMFL
LIMIT FL SW
1: ON
0
2
SFIXFL
Shutter FIX FL Control
1: ON
0
3
LAEFL1
Link AE FL1 (NORMFL) Control
1: ON
0
4
LAEFL2
Link AE FL2 (LIMFL) Control
1: ON
0
5
(Low)
"0" fixed
6
LAWBFL
Link AWB FL Control
7
(Low)
"0" fixed
0
AEME
Auto/Manual Exposure
1
MIRIS
Mechanical IRIS
0
2
BLCOFF
BackLight OFF
0
3
AEREF
AE REFerence up
0
4
AGCMAX
AGC MAX gain
0
5
SHTFIX
Shutter Fix (1/100)
0
6
AESHUT
AE Shutter mode
0
MAIN
MAIN
08h
AE
09h
0
1: ON
0
0
0: Auto, 1: Normal
0
LSB
AWB
2
3
Address
—
0
1
Block
—
0
7
7
#1
CPUEXT
7
6
Description
0
6
5
Name
AWB mode
0h: ATW, 1h: IN, 2h: PUSH, 3h: USR,
MSB 4h: —, 5h: FL, 6h: HOLD, 7h: OUT
0h
AWB
—
0Ah
4
(Low)
"0" fixed
0
5
SFTUP
Shift UP
0
MAIN
6
SFTDWN
Shift DOWN
0
MAIN
7
—
#1: Initial setting value with Power-on
– 19 –
CXD3142R
CAT2
Serial input
Byte bit
Name
0
Description
#1
Block
Address
Port 0 Cat/Byte
46h
MAIN
0Bh
Port 0 Mode
00h
MAIN
0Ch
Port 1 Cat/Byte
46h
MAIN
0Dh
Port 1 Mode
01h
MAIN
0Eh
LSB
1
2
8
3
4
P0CB
5
6
7
MSB
0
LSB
1
2
9
3
4
P0M
5
6
7
MSB
0
LSB
1
2
10
3
4
P1CB
5
6
7
MSB
0
LSB
1
2
11
3
4
P1M
5
6
7
MSB
#1: Initial setting value with Power-on
– 20 –
CXD3142R
CAT2
Serial input
Byte bit
Name
0
Description
#1
Block
Address
Port 2 Cat/Byte
46h
MAIN
0Fh
Port 2 Mode
02h
MAIN
10h
Port 3 Cat/Byte
46h
MAIN
11h
Port 3 Mode
04h
MAIN
12h
LSB
1
2
12
3
4
P2CB
5
6
7
MSB
0
LSB
1
2
13
3
4
P2M
5
6
7
MSB
0
LSB
1
2
14
3
4
P3CB
5
6
7
MSB
0
LSB
1
2
15
3
4
P3M
5
6
7
MSB
#1: Initial setting value with Power-on
– 21 –
CXD3142R
CAT2
Serial input
Byte bit
Name
0
Description
#1
Block
Address
Port 4 Cat/Byte
46h
MAIN
13h
Port 4 Mode
05h
MAIN
14h
Port 5 Cat/Byte
47h
MAIN
15h
Port 5 Mode
00h
MAIN
16h
LSB
1
2
16
3
4
P4CB
5
6
7
MSB
0
LSB
1
2
17
3
4
P4M
5
6
7
MSB
0
LSB
1
2
18
3
4
P5CB
5
6
7
MSB
0
LSB
1
2
19
3
4
P5M
5
6
7
MSB
#1: Initial setting value with Power-on
– 22 –
CXD3142R
CAT2
Serial input
Byte bit
Name
0
Description
#1
Block
Address
Port 6 Cat/Byte
47h
MAIN
17h
Port 6 Mode
01h
MAIN
18h
Port 7 Cat/Byte
47h
MAIN
19h
Port 7 Mode
02h
MAIN
1Ah
LSB
1
2
20
3
4
P6CB
5
6
7
MSB
0
LSB
1
2
21
3
4
P6M
5
6
7
MSB
0
LSB
1
2
22
3
4
P7CB
5
6
7
MSB
0
LSB
1
2
23
3
4
P7M
5
6
7
MSB
#1: Initial setting value with Power-on
– 23 –
CXD3142R
Category 3: PICT
CAT3
Byte bit
Serial input
Name
0
Description
#1
Block
Address
LSB
1
2
0
3
4
Category select code
03h: PICT
CAT3
5
6
7
0
1
2
1
3
MSB
HAPGL
HAPGH
LSB
MSB
H Apcom Gain (Low Freq)
3h
H Apcom Gain (High Freq)
1h
YLPFSW
Y-LPF SW (on/off)
5
(Low)
"0" fixed
6
GAMSW
Y/C GAMMA SW (on/off)
1
2
4
LSB
VAPSL
6
2
(Low)
VHAPG
MSB
4
LSB
6
7
0
Y/C/MAIN
Ah
Y
V Apcom Slice Level
2h
"0" fixed
0
VH Apcom Gain
6h
1Ch
LSB
3
5
1: OFF
MSB
0
1
0
V Apcom Gain
VAPG
MSB
7
1Bh
0
LSB
3
5
1: OFF
Y
—
0
3
MSB
4
7
2
LSB
VHAPSL
Y
VH Apcom Slice Level
MSB
#1: Initial setting value with Power-on
– 24 –
4h
1Dh
CXD3142R
CAT3
Serial input
Byte bit
Name
0
Description
#1
Block
Address
Apcom SUPPRESS START
A0h
MAIN
1Eh
Apcom SUPPRESS END
D0h
MAIN
1Fh
Apcom SUPPRESS LEVEL
00h
MAIN
20h
Y GAIN
5Ah
Y
21h
LSB
1
2
4
3
4
ASPRSTA
5
6
7
MSB
0
LSB
1
2
5
3
4
ASPREND
5
6
7
MSB
0
LSB
1
2
6
3
4
ASPRLV
5
6
7
MSB
0
LSB
1
2
7
3
4
YGAIN
5
6
7
MSB
#1: Initial setting value with Power-on
– 25 –
CXD3142R
CAT3
Serial input
Byte bit
Name
0
1
2
8
Description
SETUP
SETUP level
MSB
4
LSB
WCLIP
6
7
Y
22h
Dh
White CLIP level
5h
(Low)
"0" fixed
0
LSB
NT
= 12h
1
9
Address
MSB
0
2
Block
LSB
3
5
#1
BSTLV
Burst Level
PAL
= 13h
3
4
DENC
23h
MSB
5
BSTINV
Burst Inverse
6
(Low)
"0" fixed
7
MIRROR
Mirror SW
0
0: Inverse, 1: Normal
1
0
0
Y/C
R-Y Gain
2Fh
C
24h
B-Y Gain
1Ch
C
25h
0: Normal, 1: Mirror
LSB
1
2
10
3
4
RYGAIN
5
6
7
MSB
0
LSB
1
2
11
3
4
BYGAIN
5
6
7
MSB
#1: Initial setting value with Power-on
– 26 –
CXD3142R
CAT3
Serial input
Byte bit
Name
0
Description
#1
Block
Address
R-Y HUE
FFh
C
26h
B-Y HUE
FEh
C
27h
C SUPPRESS START
A0h
MAIN
28h
C SUPPRESS END
D0h
MAIN
29h
LSB
1
2
12
3
4
RYHUE
5
6
7
MSB
0
LSB
1
2
13
3
4
BYHUE
5
6
7
MSB
0
LSB
1
2
14
3
4
CSPRSTA
5
6
7
MSB
0
LSB
1
2
15
3
4
CSPREND
5
6
7
MSB
#1: Initial setting value with Power-on
– 27 –
CXD3142R
CAT3
Serial input
Byte bit
Name
0
Description
#1
Block
Address
8Ah
MAIN
2Ah
C Suppress V apcom Level
0h
C
C Suppress V apcom THreshold
1h
Y
LSB
1
2
16
3
4
CSPRLV
C SUPPRESS LEVEL
5
6
7
0
1
2
17
3
4
5
6
7
0
1
2
18
3
4
5
6
7
MSB
CSVLV
CSVTH
CSHLV
CSHTH
YSPRLV
YSPRTH
HLLIM
PEDLIM
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
0
2Bh
C Suppress Highlight Level
0h
C
C Suppress Highlight Threshold
2h
Y
Y Suppress Highlight Level
0h
Y/(C)
Y Suppress Highlight Threshold
0h
Y/(C)
2Ch
Highlight LIMiter level
0h
DENC
PEDestal LIMiter level
0h
DENC
Gamma OFF Y/C GAIN
00h
MAIN
LSB
1
2
19
3
4
GOFGAIN
5
6
7
MSB
#1: Initial setting value with Power-on
– 28 –
2Dh
CXD3142R
Category 4: AE
CAT4
Byte bit
Serial input
Name
0
Description
#1
Block
Address
OPD
2Fh
AE
30h
AE
31h
LSB
1
2
0
3
4
Category select code
04h: AE
CAT4
5
6
7
0
1
2
1
3
4
5
6
7
2
MSB
AEW0
AEW1
AEW2
AEW3
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
AE Wind0 weight
0h
AE Wind1 weight
0h
AE Wind2 weight
0h
AE Wind3 weight
0h
0
AGCFL
AGC FL
0
1
SHTFL
Shutter FL
0
2
LSHTLIM
Low speed Shut Lim
3
(Low)
"0" fixed
4
EVR5V
EVR voltage select
5
6
7
0: Normal, 1: Limit ON
0
0
0: 3.3V, 1: 5V
0
—
(Low)
0
"0" fixed
0
AE Stability
0h
LSB
1
2
3
3
4
AESTAB
5
6
7
MSB
#1: Initial setting value with Power-on
– 29 –
CXD3142R
CAT4
Serial input
Byte bit
Name
0
Description
#1
Block
Address
AE HYSTeresis
0h
AE
32h
AE WAIT counter
0h
AE
33h
AE SPEED
08h
AE
34h
AE USR setting level
04h
AE
35h
LSB
1
2
4
3
4
AEHYST
5
6
7
MSB
0
LSB
1
2
5
3
4
AEWAIT
5
6
7
MSB
0
LSB
1
2
6
3
4
AESPEED
5
6
7
MSB
0
LSB
1
2
7
3
4
AEUSR
5
6
7
MSB
#1: Initial setting value with Power-on
– 30 –
CXD3142R
CAT4
Serial input
Byte bit
Name
0
Description
#1
Block
Address
AE AGC MAX Low (AGCMAX = 0)
CCh
AE
36h
AE AGC MAX High (AGCMAX = 1)
FFh
AE
37h
AE MAX speed shut Lim
7h
AE
38h
AE AGC FL lower Lim
20h
AE
39h
LSB
1
2
8
3
4
AGCMAXL
5
6
7
MSB
0
LSB
1
2
9
3
4
AGCMAXH
5
6
7
MSB
0
LSB
1
2
10
3
4
MSHTLIM
5
6
7
MSB
0
LSB
1
2
11
3
4
AGCFLLL
5
6
7
MSB
#1: Initial setting value with Power-on
– 31 –
CXD3142R
CAT4
Serial input
Byte bit
Name
0
1
2
12
Description
SHTFLLL
AE SHUTTER FL Lower Lim
MSB
4
LSB
6
Block
Address
AE
3Ah
LSB
3
5
#1
SHTFLUL
7
MSB
0
LSB
1h
AE SHUTTER FL Upper Lim
Bh
AE THRESHOLD Low
10h
AE
3Bh
AE THRESHOLD High
20h
AE
3Ch
1
2
13
3
4
AETHL
5
6
7
MSB
0
LSB
1
2
14
3
4
AETHH
5
6
7
MSB
#1: Initial setting value with Power-on
– 32 –
CXD3142R
Category 5: AWB
CAT5
Serial input
Byte bit
Name
0
Description
#1
Block
Address
OPD
3Dh
AWB
3Eh
AWB
3Fh
LSB
1
2
0
3
4
Category select code
05h: AWB
CAT5
5
6
7
0
1
2
1
3
4
5
6
7
AWBW0
AWBW1
AWBW2
AWBW3
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
AWB Wind0 weight
0h
AWB Wind1 weight
0h
AWB Wind2 weight
0h
AWB Wind3 weight
0h
0
AWBSEPOF
AWB light SEParate OFF
0h
1
AWBTRIG
AWB TRIGger ON/OFF
0h
AWB High Light CUT block
0h
AWB Low Light integ data CUT
0h
Green GAIN (push lock mode)
26h
2
2
MSB
3
4
AWBHLCUT
LSB
MSB
AWBLLCUT
5
6
—
7
0
LSB
1
2
3
3
4
GGAIN
5
6
7
MSB
#1: Initial setting value with Power-on
– 33 –
CXD3142R
CAT5
Serial input
Byte bit
Name
Description
#1
(0: PUSH mode)
1h
Block
Address
AWB
41h
0
1
2
4
3
4
—
5
6
7
LSB
0
1
2
5
AWB SPEED
AWBSPED
3
MSB
4
LSB
5
6
7
AWBAJST5
AWBAJST6
0
MSB
LSB
MSB
AWB Adjust5
0h
AWB Adjust6
0h
AWB vector FRAME
00h
AWB
42h
AWB ATW R shift
00h
AWB
43h
LSB
1
2
6
3
4
AWBFRAM
5
6
7
MSB
0
LSB
1
2
7
3
4
AWBRSFT
5
6
7
MSB
#1: Initial setting value with Power-on
– 34 –
CXD3142R
CAT5
Serial input
Byte bit
Name
0
Description
#1
Block
Address
AWB ATW B shift
00h
AWB
44h
AWB USR mode R gain
49h
AWB
47h
LSB
1
2
8
3
4
AWBBSFT
5
6
7
MSB
0
1
2
9
3
4
—
5
6
7
0
1
2
10
3
4
—
5
6
7
0
LSB
1
2
11
3
4
WBUSRR
5
6
7
MSB
#1: Initial setting value with Power-on
– 35 –
CXD3142R
CAT5
Serial input
Byte bit
Name
0
Description
#1
Block
Address
2Ch
AWB
48h
WB R shift
3h
AWB
49h
WB B shift
1h
AWB
4Ah
LSB
1
2
12
3
4
WBUSRB
AWB USR mode B gain
5
6
7
MSB
0
LSB
1
2
13
3
4
WBRSFT
5
6
7
MSB
0
LSB
1
2
14
3
4
WBBSFT
5
6
7
MSB
#1: Initial setting value with Power-on
– 36 –
CXD3142R
Category 6: ADJUST
CAT6
Serial input
Byte bit
Name
0
Description
#1
Block
Address
CCD: VSUB
00h
EVR3
4Bh
CCD: RGL
00h
EVR4
4Ch
S/H: AGC MIN gain
11h
AE
4Dh
LSB
1
2
0
3
4
Category select code
06h: ADJUST
CAT6
5
6
7
MSB
0
LSB
1
2
1
3
4
VSUB
5
6
7
MSB
0
LSB
1
2
2
3
4
RGL
5
6
7
MSB
0
LSB
1
2
3
3
4
AGCMIN
5
6
7
MSB
#1: Initial setting value with Power-on
– 37 –
CXD3142R
CAT6
Serial input
Byte bit
Name
0
Description
#1
Block
Address
S/H: OFFSET
A0h
EVR5
4Eh
D/A: VREF
58h
EVR6
4Fh
User setting EVR7
00h
EVR7
50h
User setting EVR8
00h
EVR8
51h
LSB
1
2
4
3
4
SHOFST
5
6
7
MSB
0
LSB
1
2
5
3
4
DAVRF
5
6
7
MSB
0
LSB
1
2
6
3
4
EVRUSR7
5
6
7
MSB
0
LSB
1
2
7
3
4
EVRUSR8
5
6
7
MSB
#1: Initial setting value with Power-on
– 38 –
CXD3142R
CAT6
Serial input
Byte bit
Name
0
Description
#1
Block
Address
PRE white balance R
37h
AWB
52h
PRE white balance B
39h
AWB
53h
PRE R-B L
00h
AWB
54h
PRE R-B H
0Ah
AWB
55h
LSB
1
2
8
3
4
AWBPRER
5
6
7
MSB
0
LSB
1
2
9
3
4
AWBPREB
5
6
7
MSB
0
LSB
1
2
10
3
4
PRERBL
5
6
7
MSB
0
LSB
1
2
11
3
4
PRERBH
5
6
7
MSB
#1: Initial setting value with Power-on
– 39 –
CXD3142R
CAT6
Serial input
Byte bit
Name
0
Description
#1
Block
Address
PRE R + B – 2G L
00h
AWB
56h
PRE R + B – 2G H
23h
AWB
57h
AWB PRE WB2 R
60h
AWB
58h
AWB PRE WB2 B
20h
AWB
59h
LSB
1
2
12
3
4
PRERBGL
5
6
7
MSB
0
LSB
1
2
13
3
4
PRERBGH
5
6
7
MSB
0
LSB
1
2
14
3
4
PRE2R
5
6
7
MSB
0
LSB
1
2
15
3
4
PRE2B
5
6
7
MSB
#1: Initial setting value with Power-on
– 40 –
CXD3142R
CAT6
Serial input
Byte bit
Name
0
Description
#1
Block
Address
AWB Adjust1
18h
AWB
5Ah
AWB Adjust2
1Ch
AWB
5Bh
AWB Adjust3
00h
AWB
5Ch
AWB Adjust4
00h
AWB
5Dh
LSB
1
2
16
3
4
AWBAJST1
5
6
7
MSB
0
LSB
1
2
17
3
4
AWBAJST2
5
6
7
MSB
0
LSB
1
2
18
3
4
AWBAJST3
5
6
7
MSB
0
LSB
1
2
19
3
4
AWBAJST4
5
6
7
MSB
#1: Initial setting value with Power-on
– 41 –
CXD3142R
CAT6
Byte bit
Serial input
Name
0
Description
#1
Block
Address
B LOW GAIN
46h
AWB
5Eh
INTEG SLICE level
80h
AWB
5Fh
LSB
1
2
20
3
4
BLOGAIN
5
6
7
MSB
0
LSB
1
2
21
3
4
INTSLICE
5
6
7
MSB
#1: Initial setting value with Power-on
– 42 –
CXD3142R
Category 7: TIMING
CAT7
Serial input
Byte bit
Name
0
Description
#1
Block
3h
OPD
Address
LSB
1
2
0
3
4
Category select code
07h: TIMING
CAT7
5
6
7
0
1
1
MSB
WINDSEL
LSB
MSB
WIND/DISP SELect
2
WINDMK
WIND MarKer on
1: ON
0
Y
3
DEFMK
DEFect 1, 2 MarKer on
1: ON
0
DLY
4
SVHMK
SHIFT VD MarKer on
1: ON
0
Y
61h
5
6
—
7
0
1
2
2
W3STAH
MSB
4
LSB
6
W3WIDH
7
MSB
0
LSB
1
2
W3STAV
3
MSB
4
LSB
5
6
7
5h
Wind3 H START
3
5
3
LSB
W3WIDV
Wind3 H WIDTH
5h
Wind3 V START
4h
7h
Wind3 V WIDTH
MSB
#1: Initial setting value with Power-on
– 43 –
STG
62h
STG
63h
CXD3142R
CAT7
Serial input
Byte bit
Name
Description
#1
Block
Address
0
1
2
4
"0" fixed
0
3
4
5
ADCKDLY
LSB
MSB
64h
Delay Adjustment for ADCK
2h
0
6
(Low)
"0" fixed
7
OFFSET25
PAL 25Hz Offset
0
1
2
5
(Low)
3
4
5
6
7
0: Normal, 1: 25Hz Offset
0
DLYXSH
LSB Delay Adjustment for XSHP, XSHD
MSB 0h: 0ns, 1h: +4ns, 2h: +7ns, 3h: –8ns
0h
DTYXSH
LSB Duty Adjustment for XSHP, XSHD
MSB 0h: Norm, 1h: F + 3ns, 2h: F + 6ns, 3h: R + 3ns
0h
DLYXRS
LSB Delay Adjustment for XRS
MSB 0h: 0ns, 1h: +4ns, 2h: +7ns, 3h: –8ns
0h
DTYXRS
LSB Duty Adjustment for XRS
MSB 0h: Norm, 1h: F + 3ns, 2h: F + 6ns, 3h: R + 3ns
0h
STG
DENC
STG
65h
0
1
2
6
3
4
(Low)
"0" fixed
0
(Low)
"0" fixed
0
"2"h fixed
2h
5
6
7
0
1
2
7
3
—
4
5
(Constant)
6
7
—
#1: Initial setting value with Power-on
– 44 –
66h
CXD3142R
CAT7
Serial input
Byte bit
Name
Description
#1
Block
Address
0
1
2
8
3
4
(Low)
"0" fixed
68h
0
5
6
7
0
LSB
1
2
9
3
4
SFTVL
SHIFTER V Lsb 8 bit
01h
STG
69h
5
6
7
0
(Low)
"0" fixed
0
2
SFTVM
SHIFTER V Msb 1 bit
0h
3
(Low)
"0" fixed
0
SHIFTER SPEED Adjustment
0h
"1" fixed
1
DEFect 1 H Lsb 8 bit
0h
1
10
MSB
4
5
6Ah
LSB
SFTSPED
6
7
STG
MAIN
MSB
(Constant)
0
LSB
1
2
11
3
4
DEF1HL
5
6
7
MSB
#1: Initial setting value with Power-on
– 45 –
STG
6Bh
CXD3142R
CAT7
Serial input
Byte bit
Name
0
Description
#1
Block
Address
DEFect 1 V Lsb 8 bit
0h
STG
6Ch
DEFect 1 H Msb 2 bit
0h
STG
DEFect 1 V Msb 2 bit
0h
STG
DEFect 1 Large def
0
STG
DEFect 2 H Lsb 8 bit
0h
STG
6Eh
DEFect 2 V Lsb 8 bit
0h
STG
6Fh
LSB
1
2
12
3
4
DEF1VL
5
6
7
0
1
2
13
3
4
MSB
DEF1HM
DEF1VM
LSB
MSB
LSB
MSB
DEF1L
2Eh
5
6
—
7
0
LSB
1
2
14
3
4
DEF2HL
5
6
7
MSB
0
LSB
1
2
15
3
4
DEF2VL
5
6
7
MSB
#1: Initial setting value with Power-on
– 46 –
CXD3142R
CAT7
Serial input
Byte bit
0
1
2
16
3
4
Name
DEF2HM
DEF2VM
DEF2L
Description
LSB
MSB
LSB
MSB
#1
Block
DEFect 2 H Msb 2 bit
0h
STG
DEFect 2 V Msb 2 bit
0h
STG
DEFect 2 Large def
0
STG
5
6
—
7
#1: Initial setting value with Power-on
– 47 –
Address
60h
CXD3142R
Category 8: SOUT
CAT8
Byte bit
Serial input
Name
0
Description
#1
Block
00h
MAIN
LSB
1
2
0
3
4
Category select code
08h: SOUT
CAT8
5
6
7
MSB
0
LSB
1
2
1
3
4
SOBYTE
Serial Out start Byte number
5
6
7
MSB
#1: Initial setting value with Power-on
– 48 –
Address
CXD3142R
Category 9: EXTCON
CAT9
Serial input
Byte bit
Name
0
Description
LSB
1
2
0
3
4
Category select code
09h: EXTCON
CAT9
5
6
7
MSB
0
1
2
1
3
4
—
5
6
7
0
1
2
2
3
4
—
5
6
7
0
1
2
3
3
4
—
5
6
7
#1: Initial setting value with Power-on
– 49 –
#1
Block
Address
CXD3142R
CAT9
Serial input
Byte bit
Name
Description
#1
Block
WB R gain
37h
C
WB G gain
26h
C
WB B gain
39h
C
0
1
2
4
3
4
—
5
6
7
0
LSB
1
2
5
3
4
WBR
5
6
7
MSB
0
LSB
1
2
6
3
4
WBG
5
6
7
MSB
0
LSB
1
2
7
3
4
WBB
5
6
7
MSB
#1: Initial setting value with Power-on
– 50 –
Address
CXD3142R
CAT9
Serial input
Byte bit
Name
#1
Block
Y slice High Level
D0h
OPD
Y slice Low Level
04h
OPD
(Low)
"00"h fixed
00h
(Low)
"00"h fixed
00h
0
Description
LSB
1
2
8
3
4
WBYREFH
5
6
7
MSB
0
LSB
1
2
9
3
4
WBYREFL
5
6
7
MSB
0
1
2
10
3
4
5
6
7
0
1
2
11
3
4
5
6
7
#1: Initial setting value with Power-on
– 51 –
Address
CXD3142R
CAT9
Serial input
Byte bit
Name
Description
#1
Block
Address
0
1
2
12
—
3
4
5
H-driver ability (H1, H2)
1h
(Low)
"0" fixed
0
(Constant)
"3"h fixed
3h
(Constant)
"1"h fixed
1h
(Low)
"0" fixed
0
DRSL1
6
7
0
1
2
3
4
13
5
6
7
72h
LSB
MSB
—
73h
IDINV
0
NT
= 0h
ID INVerse
PAL
= 1h
14
(Low)
3
4
PLLSW
1
2
15
3
4
5
6
7
PLLSW
0: Normal, 1: ON (38MHz)
0
TOP
H-driver ability (RG)
1h
TOP
Y DLY 0 – 3CK
0h
Y
C DLY 0 – 3CK
0h
C
74h
LSB
DRSL2
7
0
0
"0" fixed
MSB
5
6
C
LSB
1
2
TOP
MSB
YDLY
CDLY
YDDLY
CDDLY
LSB
MSB
LSB
MSB
LSB
MSB
LSB
MSB
75h
Y Digital DLY 0 – 3CK
0h
DIF
C Digital DLY 0 – 3CK
0h
DIF
#1: Initial setting value with Power-on
– 52 –
CXD3142R
CAT9
Byte bit
Serial input
Name
0
Description
#1
Block
Address
R matrix
R = RMATY × Yr + Cr + RMATC × Cb
2Dh
C
76h
R matrix
R = RMATY × Yr + Cr + RMATC × Cb
00h
C
77h
B matrix
B = BMATY × Yb + Cb + BMATC × Cr
45h
C
78h
B matrix
B = BMATY × Yb + Cb + BMATC × Cr
BBh
C
79h
LSB
1
2
16
3
4
RMATY
5
6
7
MSB
0
LSB
1
2
17
3
4
RMATC
5
6
7
MSB
0
LSB
1
2
18
3
4
BMATY
5
6
7
MSB
0
LSB
1
2
19
3
4
BMATC
5
6
7
MSB
#1: Initial setting value with Power-on
– 53 –
CXD3142R
CAT9
Serial input
Byte bit
0
1
Name
(Low)
2
20
3
Description
DRSL3
MSB
5
LSB
7
Block
Address
7Ah
"0" fixed
0
H-driver ability (XSHP, XSHD)
1h
TOP
H-driver ability (XRS)
1h
TOP
LSB
4
6
#1
DRSL4
MSB
#1: Initial setting value with Power-on
– 54 –
CXD3142R
Serial output
CAT8
Serial output
Byte bit
Name
Description
0
1
2
1
3
4
—
5
6
7
0
1
2
2
3
4
—
5
6
7
0
1
2
3
3
4
—
5
6
7
0
1
2
4
3
4
—
5
6
7
– 55 –
Block
CXD3142R
CAT8
Byte bit
Serial output
Name
0
Description
Block
LSB
1
2
5
3
4
AWOUT1
AWB OUT 1
AWB
AWB OUT 2
AWB
AWB OUT 3
AWB
AWB OUT 4
AWB
5
6
7
MSB
0
LSB
1
2
6
3
4
AWOUT2
5
6
7
MSB
0
LSB
1
2
7
3
4
AWOUT3
5
6
7
MSB
0
LSB
1
2
8
3
4
AWOUT4
5
6
7
MSB
– 56 –
CXD3142R
CAT8
Serial output
Byte bit
Name
0
Description
Block
LSB
1
2
9
3
4
E2RDATA
EEPROM READ DATA
5
6
7
MSB
– 57 –
MAIN
CXD3142R
Package Outline
Unit: mm
80PIN LQFP (PLASTIC)
14.0 ± 0.2
∗
12.0 ± 0.1
60
41
40
61
(13.0)
B
0.5 ± 0.2
A
21
(0.22)
80
0.5
1
20
b
0.13 M
+ 0.2
1.5 – 0.1
0.1
0.1 ± 0.1
0.5 ± 0.2
0.125 ± 0.04
b = 0.18 ± 0.03
0˚ to 10˚
DETAIL B : PALLADIUM
NOTE: Dimension "∗" does not include mold protrusion.
DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
SONY CODE
LQFP-80P-L01
LEAD TREATMENT
PALLADIUM PLATING
EIAJ CODE
P-LQFP80-12x12-0.5
LEAD MATERIAL
COPPER ALLOY
PACKAGE MASS
0.5g
JEDEC CODE
– 58 –
Sony Corporation