April 2005 RMPA0963 i-Lo™ Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module iL o ™ General Description ■ 38% CDMA/WCDMA efficiency at +28 dBm Pout The RMPA0963 Power Amplifier Module (PAM) is Fairchild’s latest innovation in 50 Ohm matched, surface mount modules targeting Cellular CDMA/WCDMA/HSDPA, AMPS and Wireless Local Loop (WLL) applications. Answering the call for ultra-low DC power consumption and extended battery life in portable electronics, the RMPA0963 uses novel proprietary circuitry to dramatically reduce amplifier current at low to medium RF output power levels (< +16 dBm), where the handset most often operates. A simple two-state Vmode control is all that is needed to reduce operating current by more than 50% at 16 dBm output power, and quiescent current (Iccq) by as much as 70% compared to traditional power-saving methods. No additional circuitry, such as DC-to-DC converters, are required to achieve this remarkable improvement in amplifier efficiency. Further, the 4x4x1.5 mm LCC package is pin-compatible and a drop-in replacement for last generation 4x4 mm PAMs widely used today, minimizing the design time to apply this performanceenhancing technology. The multi-stage GaAs Microwave Monolithic Integrated Circuit (MMIC) is manufactured using Fairchild RF’s InGaP Heterojunction Bipolar Transistor (HBT) process. ■ Meets HSDPA performance requirements ■ Linear operation in low-power mode up to +19 dBm ■ 50% AMPS mode efficiency at +31 dBm Pout ■ Low quiescent current (Iccq): 20 mA in low-power mode ■ Single positive-supply operation with low power and shutdown modes • 3.4V typical Vcc operation • Low Vref (2.85V) compatible with advanced handset chipsets ■ Compact Lead-free compliant LCC package – (4.0 X 4.0 x 1.5 mm nominal) ■ Industry standard pinout ■ Internally matched to 50 Ohms and DC blocked RF input/output ■ Meets IS-95/CDMA2000-1XRTT/WCDMA performance requirements Device Functional Block Diagram (Top View) MMIC 10 GND Vref 1 Vmode 2 GND 3 RF IN 4 Vcc1 5 BIAS/MODE SWITCH OUTPUT MATCH INPUT MATCH 9 GND 8 RF OUT 7 GND 6 Vcc2 11 (paddle ground on package bottom) ©2005 Fairchild Semiconductor Corporation RMPA0963 i-Lo™ Rev. E 1 www.fairchildsemi.com Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) Features ■ 14% CDMAA/WCDMA efficiency (80 mA total current) at +16 dBm Pout RMPA0963 PRELIMINARY Symbol Vcc1, Vcc2 Vref Vmode Parameter Supply Voltages Reference Voltage Value Units 5.0 V 2.6 to 3.5 V 3.5 V RF Input Power +10 dBm Tstg Storage Temperature -55 to +150 °C iL o ™ Note: 1. No permanent damage with one parameter set at extreme limit. Other parameters set to typical values. Electrical Characteristics1 Symbol f Parameter Min Operating Frequency Typ 824 Max Units 849 MHz Comments CDMA/WCDMA Operation Gp Power Gain Po Linear Output Power PAEd Itot 30 20 dB dB 28 16 PAEd (digital) @ +28 dBm dBm dBm 38 Po=+28 dBm; Vmode=0V Po=+16 dBm; Vmode 2.0V P Vmode=0V Vmode 2.0V P % Vmode=0V Vmode 2.0V PAEd (digital) @ +16 dBm 14 % High Power Total Current 480 mA Low Power Total Current 80 mA P Po=+28 dBm, Vmode=0V P Po=+16 dBm, Vmode 2.0V CDMA Adjacent Channel Power Ratio ACPR1 ±885 KHz Offset -50 -55 dBc dBc Po=+28 dBm; Vmode=0V Po=+16 dBm; Vmode 2.0V ACPR2 ±1.98 MHz Offset -60 -65 dBc dBc Po=+28 dBm; Vmode=0V Po=+16 dBm; Vmode 2.0V WCDMA IS-95 A/B Modulation Adjacent Channel Leakage Ratio P P WCDMA Modulation 3GPP 3.2 03-00 DPCCH +1 DCDCH ACLR1 ±5 MHz Offset -40 -45 dBc dBc Po=+28 dBm; Vmode=0V Po=+16 dBm; Vmode 2.0V ACLR2 ±10 MHz Offset -53 -60 dBc dBc Po=+28 dBm; Vmode=0V Po=+16 dBm; Vmode 2.0V Power Gain 29 dB Po=+31 dBm Power-Added Efficiency (analog) 50 % Po=+31 dBm P P AMPS Operation Gp PAEa General Characteristics VSWR NF Input Impedance 2.0:1 Noise Figure3 2.5:1 4 dB -134 dBm/Hz Rx No Receive Band Noise Power3 2fo-5fo Harmonic Suppression3 -30 dBc Po +28 dBm Spurious Outputs2,3 -60 dBc Load VSWR 5.0:1 S 3 10:1 Ruggedness w/ Load Mismatch Tc Case Operating Temperature -30 85 Iref Icc(off) Quiescent Current 20 Reference Current 2 Shutdown Leakage Current 1 O O No permanent damage. °C DC Characteristics Iccq Po<+28 dBm; 869 to 894MHz 5 P mA Vmode 2.0V mA Po+28 dBm µA No applied RF signal Notes: 1. All parameters met at Tc = +25°C, Vcc = +3.4V, Vref = 2.85V and load VSWR 1.2:1, unless otherwise noted. 2. All phase angles. 3. Guaranteed by design. O 2 RMPA0963 i-Lo™ Rev. E www.fairchildsemi.com Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) Power Control Voltage Pin RMPA0963 Absolute Maximum Ratings1 Symbol Parameter Min Typ Max Units Operating Frequency 824 849 MHz Vcc1, Vcc2 Supply Voltage 3.0 3.4 4.2 V Vref Reference Voltage (Operating) (Shutdown) 2.7 0 2.85 3.1 0.5 V V Bias Control Voltage (Low-Power) (High-Power) 1.8 0 2.0 3.0 0.5 V V +28 +19 dBm dBm +85 °C Vmode Pout Tc Linear Output Power (High-Power) (Low-Power) +16 Case Operating Temperature -30 DC Turn-On Sequence 1) Vcc1 = Vcc2 = 3.4V (typical) 2) Vref = 2.85V (typical) 3) High-Power: Vmode = 0V (Pout > 16 dBm) Low-Power: Vmode = 2V (Pout < 16 dBm) 3 RMPA0963 i-Lo™ Rev. E www.fairchildsemi.com iL o ™ Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) f RMPA0963 Recommended Operating Conditions RMPA0963 Evaluation Board Layout 5 1 7 3 iL o ™ 4 2 6 8 6 Materials List Qty Item No. Part Number Description Vendor 1 1 G657549-1 V2 PC Board 2 2 #142-0701-841 SMA Connector Johnson 8 3 #2340-5211TN Terminals 3M Ref 4 G657583 Assembly, RMPA0963 Fairchild Fairchild 2 5 2 5 (Alt) GRM39X7R102K50V 1000pF Capacitor (0603) Murata ECJ-1VB1H102K 1000pF Capacitor (0603) Panasonic 2 6 C3216X5R1A335M 3.3µF Capacitor (1206) TDK 1 7 GRM39Y5V104Z16V 0.1µF Capacitor (0603) Murata 1 7 (Alt) ECJ-1VB1C104K 0.1µF Capacitor (0603) Panasonic 1 8 GRM39X7R331K50V 330pF Capacitor (0603) Murata A/R 9 SN63 Solder Paste Indium Corp. A/R 10 SN96 Solder Paste Indium Corp. Evaluation Board Schematic 0.1 µF 1000 pF Vref 1 Vmode Vcc1 3.3 µF 6 5 1000 pF 11 330 pF (package base) 4 RMPA0963 i-Lo™ Rev. E 8 50 Ohm TRL SMA2 RF OUT Z SMA1 RF IN 4 XYTT 50 Ohm TRL 3,7,9,10 0963 2 Vcc2 3.3 µF www.fairchildsemi.com Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) Z XYTT 0963 5 RMPA0963 Package Outline I/O 1 INDICATOR iL o ™ TOP VIEW 2 9 8 0 7 Z T T XY 9 6 3 6 5 1.60mm MAX. FRONT VIEW .25mm TYP. 3.50mm TYP. See Detail A .40mm .10mm .30mm TYP. .10mm .85mm TYP. 11 3.65mm .40mm .45mm 2 1 1.08mm .18mm 1.84mm DETAIL A. TYP. BOTTOM VIEW Signal Descriptions Pin # Signal Name Description 1 Vref Reference Voltage 2 Vmode High Power/Low Power Mode Control 3 GND Ground 4 RF In RF Input Signal 5 Vcc1 Supply Voltage to Input Stage 6 Vcc2 Supply Voltage to Output Stage 7 GND Ground 8 RF Out RF Output Signal 9 GND Ground 10 GND Ground 11 GND Paddle Ground 5 RMPA0963 i-Lo™ Rev. E www.fairchildsemi.com Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) 4 Z 3 XYTT SQUARE 10 0963 (4.00mm +.100 –.050 ) 1 RMPA0963 Application Information CAUTION: THIS IS AN ESD SENSITIVE DEVICE Precautions to Avoid Permanent Device Damage: Solder Materials & Temperature Profile: • Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC & ground contact areas. • Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. Reflow Profile • Static Sensitivity: Follow ESD precautions to protect against ESD damage: • Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 120-150 seconds at 150°C. • A properly grounded static-dissipative surface on which to place devices. • Static-dissipative floor or mat. • A properly grounded conductive wrist strap for each person to wear while handling devices. • Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/ board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 10 seconds. Maximum soldering temperatures should be in the range 215-220°C, with a maximum limit of 225°C. • General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, & ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. • Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. • Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crack-resistant solder joint. The illustration below indicates the recommended soldering profile. Device Usage: Fairchild RF recommends the following procedures prior to assembly. • Solder Joint Characteristics: Proper operation of this device depends on a reliable void-free attachment of the heatsink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. • Dry-bake devices at 125°C for 24 hours minimum. Note: The shipping trays cannot withstand 125°C baking temperature • Assemble the dry-baked devices within 7 days of removal from the oven. • Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should not be subjected to more than 225°C and reflow solder in the molten state for more than 5 seconds. No more than 2 rework operations should be performed. • During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C • If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure must be repeated. Recommended Solder Reflow Profile 240 10 SEC 220 200 183°C 180 160 140 DEG (°C) 120 1°C/SEC SOAK AT 150°C FOR 60 SEC 80 45 SEC (MAX) ABOVE 183°C 60 1°C/SEC 40 20 0 0 60 120 180 240 300 TIME (SEC) 6 RMPA0963 i-Lo™ Rev. E www.fairchildsemi.com Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) • Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A typical heating rate is 12°C/sec. • Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. 100 iL o ™ The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ Across the board. Around the world.™ OPTOLOGIC OPTOPLANAR™ The Power Franchise PACMAN™ Programmable Active Droop™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET UniFET™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I15 7 RMPA0963 i-Lo™ Rev. E www.fairchildsemi.com iL o ™ Cellular CDMA, CDMA2000-1X and WCDMA Power Amplifier Module (Preliminary) ACEx™ FAST ActiveArray™ FASTr™ Bottomless™ FPS™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOS™ I2C™ EnSigna™ i-Lo™ FACT™ ImpliedDisconnect™ FACT Quiet Series™ RMPA0963 TRADEMARKS