STMICROELECTRONICS 74LVX273

74LVX273
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
WITH CLEAR (5V TOLERANT INPUTS)
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HIGH SPEED:
fMAX = 150 MHz (TYP.) at VCC = 3.3V
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
VIL = 0.8V, VIH = 2V at VCC =3V
LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
LOW NOISE:
VOLP = 0.3V (TYP.) at VCC =3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4 mA (MIN) at VCC =3V
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVX273 is a low voltage CMOS OCTAL
D-TYPE FLIP-FLOP WITH CLEAR fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
Information signals applied to D inputs are
SOP
TSSOP
Table 1: Order Codes
PACKAGE
T&R
SOP
TSSOP
74LVX273MTR
74LVX273TTR
transferred to the Q outputs on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independently of the other inputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
August 2004
Rev. 3
1/12
74LVX273
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
NAME AND FUNCTION
1
CLEAR
2, 5, 6, 9, 12,
15, 16,19
3, 4, 7, 8, 13,
14, 17, 18
11
Q0 to Q7
Asynchronous Master
Reset (Active LOW)
Flip-Flop Outputs
D0 to D7
Data Inputs
CLOCK
10
20
GND
VCC
Clock Input (LOW-to-HIGH
Edge Triggered)
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
INPUTS
OUTPUT
FUNCTION
CLEAR
D
B
X
L
X
H
L
L
H
H
H
H
X
Qn
X : Don’t Care
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
2/12
Q
L
CLEAR
NO CHANGE
74LVX273
Table 4: Absolute Maximum Ratings
Symbol
VCC
Parameter
Supply Voltage
VI
DC Input Voltage
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Current
Unit
-0.5 to +7.0
V
-0.5 to +7.0
V
-0.5 to VCC + 0.5
- 20
V
mA
± 20
mA
ICC or IGND DC VCC or Ground Current
Storage Temperature
Tstg
TL
Value
± 25
mA
± 50
mA
-65 to +150
°C
300
°C
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
Table 5: Recommended Operating Conditions
Symbol
VCC
Parameter
Value
Unit
Supply Voltage (note 1)
2 to 3.6
V
VI
Input Voltage
0 to 5.5
V
VO
Output Voltage
Top
Operating Temperature
dt/dv
Input Rise and Fall Time (note 2) (VCC = 3V)
0 to VCC
V
-55 to 125
°C
0 to 100
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
2) VIN from 0.8V to 2.0V
Table 6: DC Specifications
Test Condition
Symbol
VIH
VIL
VOH
VOL
II
ICC
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
Value
TA = 25°C
VCC
(V)
Min.
2.0
3.0
3.6
2.0
3.0
3.6
Typ.
Max.
1.5
2.0
2.4
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
1.5
2.0
2.4
0.5
0.8
0.8
Max.
1.5
2.0
2.4
0.5
0.8
0.8
Unit
V
0.5
0.8
0.8
V
2.0
IO=-50 µA
3.0
3.0
2.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=50 µA
0.0
0.1
0.1
0.1
3.0
IO=4 mA
0.36
0.44
0.55
3.6
VI = 5V or GND
± 0.1
±1
±1
µA
3.6
VI = VCC or GND
4
40
40
µA
1.9
2.0
IO=-50 µA
2.9
3.0
IO=-4 mA
2.58
1.9
1.9
2.9
2.9
2.48
2.4
V
V
3/12
74LVX273
Table 7: Dynamic Switching Characteristics
Test Condition
Symbol
VOLP
VOLV
VIHD
VILD
Parameter
Dynamic Low Voltage
Quiet Output (note 1, 2)
Dynamic High Voltage
Input (note 1, 3)
Dynamic Low Voltage
Input (note 1, 3)
Value
TA = 25°C
VCC
(V)
Min.
3.3
-0.8
CL = 50 pF
3.3
Typ.
Max.
0.3
0.8
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-0.3
V
2.0
3.3
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
Table 8: AC Electrical Characteristics (Input tr = tf = 3ns)
Test Condition
Symbol
tPLH
tPHL
tPHL
Parameter
Propagation Delay
Time
CK to Q
Propagation Delay
Time
CLEAR to Q
VCC
(V)
CL
(pF)
2.7
2.7
Max.
Min.
Max.
15
50
9.0
11.5
16.9
20.4
1.0
1.0
20.5
24.0
1.0
1.0
22.0
25.5
3.3(*)
15
7.1
11.0
1.0
13.0
1.0
14.5
3.3(*)
50
9.6
14.5
1.0
16.5
1.0
18.0
(*)
15
9.3
17.6
1.0
20.5
1.0
22.0
3.3(*)
50
11.8
21.1
1.0
24.0
1.0
25.5
5.0(**)
15
7.3
11.5
1.0
13.5
1.0
15.5
5.0(**)
2.7
50
9.8
15.0
1.0
17.0
1.0
18.0
tW
CLOCK pulse Width,
HIGH
tS
Setup Time Q to
CLOCK HIGH or LOW 3.3(*)
2.7
Hold Time Q to
CLOCK HIGH or LOW 3.3(*)
Recovery Time
CLEAR to Q
fMAX
Maximum Clock
Frequency
tOSLH
tOSHL
Output to Output
Skew Time (note 1,2)
-55 to 125°C
Min.
3.3
(*)
3.3
2.7
(*)
3.3
2.7
2.7
(*)
3.3
2.7
2.7
Min.
-40 to 85°C
Max.
CLEAR pulse Width,
HIGH
tREM
TA = 25°C
Typ.
tW(L)
th
Value
50
50
50
50
50
5.0
6.0
6.0
5.0
5.0
5.0
5.5
6.5
6.5
5.0
5.0
5.0
5.5
6.5
6.5
4.5
4.5
4.5
1.0
1.0
1.0
1.0
1.0
1.0
2.5
2.5
2.5
2.0
2.0
2.0
15
50
55
45
110
60
55
40
50
35
3.3(*)
15
95
150
80
75
3.3(*)
2.7
50
60
50
0.5
1.0
1.5
1.5
3.3(*)
50
0.5
1.0
1.5
1.5
90
55
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
50
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V ± 0.3V
4/12
74LVX273
Table 4: CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
TA = 25°C
VCC
(V)
CIN
Input Capacitance
3.3
CPD
Power Dissipation
Capacitance
(note 1)
3.3
Value
Min.
fIN = 10MHz
Typ.
Max.
5
10
40
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
ad. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
Figure 5: Test Circuit
CL =15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
Figure 6: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
5/12
74LVX273
Figure 7: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle)
Figure 8: Waveform - Recovery Time (f=1MHz; 50% duty cycle)
6/12
74LVX273
SO-20 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.1
0.30
0.004
0.012
B
0.33
0.51
0.013
0.020
C
0.23
0.32
0.009
0.013
D
12.60
13.00
0.496
0.512
E
7.4
7.6
0.291
0.299
e
1.27
0.050
H
10.00
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.4
1.27
0.016
0.050
k
0°
8°
0°
8°
ddd
0.100
0.004
0016022D
7/12
74LVX273
TSSOP20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
A
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
6.4
6.5
6.6
0.252
0.256
0.260
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.0256 BSC
0.60
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
K
e
L
E
c
D
E1
PIN 1 IDENTIFICATION
1
0087225C
8/12
74LVX273
Tape & Reel SO-20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
30.4
0.519
1.197
Ao
10.8
11
0.425
0.433
Bo
13.2
13.4
0.520
0.528
Ko
3.1
3.3
0.122
0.130
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
9/12
74LVX273
Tape & Reel TSSOP20 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
10/12
TYP
0.504
22.4
0.519
0.882
Ao
6.8
7
0.268
0.276
Bo
6.9
7.1
0.272
0.280
Ko
1.7
1.9
0.067
0.075
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
74LVX273
Table 9: Revision History
Date
Revision
27-Aug-2004
3
Description of Changes
Ordering Codes Revision - pag. 1.
11/12
74LVX273
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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