STMICROELECTRONICS 74VHCT74A

74VHCT74A
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
■
■
■
■
■
■
■
■
■
HIGH SPEED:
fMAX = 160 MHz (TYP.) at VCC = 5V
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN.), VIL = 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT74A is an advanced high-speed
CMOS DUAL D-TYPE FLIP FLOP WITH PRESET
AND CLEAR fabricated with sub-micron silicon
gate and double-layer metal wiring C2MOS
technology.
A signal on the D INPUT is transferred to the Q
OUTPUT during the positive going transition of the
clock pulse.
SOP
TSSOP
Table 1: Order Codes
PACKAGE
T&R
SOP
TSSOP
74VHCT74AMTR
74VHCT74ATTR
CLR and PR are independent of the clock and
accomplished by a low setting on the appropriate
input.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
December 2004
Rev. 3
1/14
74VHCT74A
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
1, 13
1CLR, 2CLR
2, 12
3, 11
1D, 2D
1CK, 2CK
4, 10
1PR, 2PR
5, 9
6, 8
1Q, 2Q
1Q, 2Q
7
14
GND
VCC
NAME AND FUNCTION
Asynchronous Reset Direct Input
Data Inputs
Clock Input
(LOW to HIGH, Edge
Triggered)
Asynchronous Set - Direct
Input
True Flip-Flop Outputs
Complement Flip-Flop
Outputs
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
INPUTS
OUTPUTS
FUNCTION
CLR
PR
D
CK
Q
Q
L
H
L
H
L
L
X
X
X
X
X
X
L
H
H
H
L
H
H
H
L
L
H
H
H
H
H
L
H
H
X
Qn
Qn
X : Don’t Care
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
2/14
CLEAR
PRESET
NO CHANGE
74VHCT74A
Table 4: Absolute Maximum Ratings
Symbol
VCC
Parameter
Value
Unit
Supply Voltage
-0.5 to +7.0
V
VI
DC Input Voltage
-0.5 to +7.0
V
VO
DC Output Voltage (see note 1)
-0.5 to +7.0
V
VO
DC Output Voltage (see note 2)
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
- 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 25
mA
ICC or IGND DC VCC or Ground Current
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
± 50
mA
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) VCC = 0V
2) High or Low State
Table 5: Recommended Operating Conditions
Symbol
VCC
Parameter
Supply Voltage
Value
Unit
4.5 to 5.5
V
0 to 5.5
V
VI
Input Voltage
VO
Output Voltage (see note 1)
0 to 5.5
V
VO
Output Voltage (see note 2)
0 to VCC
V
Top
Operating Temperature
dt/dv
Input Rise and Fall Time (see note 3) (VCC = 5.0 ± 0.5V)
-55 to 125
°C
0 to 20
ns/V
1) VCC = 0V
2) High or Low State
3) VIN from 0.8V to 2V
3/14
74VHCT74A
Table 6: DC Specifications
Test Condition
Symbol
VIH
VIL
VOH
VOL
II
ICC
+ICC
IOPD
Parameter
TA = 25°C
VCC
(V)
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
4.5 to
5.5
4.5 to
5.5
Value
Min.
Typ.
Max.
2
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
2
0.8
Max.
2
0.8
Unit
V
0.8
V
4.5
IO=-50 µA
4.4
4.5
IO=-8 mA
3.94
Low Level Output
Voltage
4.5
IO=50 µA
0.1
0.1
0.1
4.5
IO=8 mA
0.36
0.44
0.55
Input Leakage
Current
Quiescent Supply
Current
Additional Worst
Case Supply
Current
0 to
5.5
VI = 5.5V or GND
± 0.1
± 1.0
± 1.0
µA
5.5
VI = VCC or GND
2
20
20
µA
5.5
One Input at 3.4V,
other input at VCC
or GND
1.35
1.5
1.5
mA
0
VOUT = 5.5V
0.5
5.0
5.0
µA
Output Leakage
Current
4.5
0.0
4.4
4.4
3.8
3.7
V
V
Table 7: AC Electrical Characteristics (Input tr = tf = 3ns)
Test Condition
Symbol
Parameter
VCC
(V)
CL
(pF)
tPLH
tPHL
Propagation Delay
Time CK to Q or Q
5.0(*)
5.0(*)
tPLH
tPHL
Propagation Delay
Time PR or CLR to
Q or Q
CK Pulse Width
HIGH or LOW
PR or CLR Pulse
Width LOW
Setup Time D to CK
HIGH or LOW
Hold Time D to CK
HIGH or LOW
Removal Time
PR or CLR to CK
Maximum Clock
Frequency
tW
tW
ts
th
tREM
fMAX
(*) Voltage range is 5.0V ± 0.5V
4/14
Value
TA = 25°C
Min.
-40 to 85°C
-55 to 125°C
Max.
Min.
Typ.
Max.
Min.
15
5.8
7.8
1.0
9.0
1.0
9.0
50
6.3
8.8
1.0
10.0
1.0
10.0
5.0(*)
15
7.6
10.4
1.0
12.0
1.0
12.0
5.0(*)
50
8.1
11.4
1.0
13.0
1.0
13.0
Unit
Max.
ns
ns
5.0(*)
5.0
5.0
5.0
ns
5.0(*)
5.0
5.0
5.0
ns
5.0(*)
5.0
5.0
5.0
ns
5.0(*)
0.0
0.0
0.0
ns
5.0(*)
3.5
3.5
3.5
ns
5.0(*)
15
100
160
80
80
5.0(*)
50
80
140
65
65
MHz
74VHCT74A
Table 8: Capacitive Characteristics
Test Condition
Symbol
Parameter
Value
TA = 25°C
Min.
Typ.
Max.
10
CIN
Input Capacitance
6
CPD
Power Dissipation
Capacitance
(note 1)
21
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per gate)
Figure 4: Test Circuit
CL =15/50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
5/14
74VHCT74A
Figure 5: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle)
6/14
74VHCT74A
Figure 6: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
Figure 7: Waveform - Removal Times (f=1MHz; 50% duty cycle)
7/14
74VHCT74A
Figure 8: Waveform - Pulse Width
8/14
74VHCT74A
SO-14 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
1.35
1.75
0.053
0.069
A1
0.1
0.25
0.004
0.010
A2
1.10
1.65
0.043
0.065
B
0.33
0.51
0.013
0.020
C
0.19
0.25
0.007
0.010
D
8.55
8.75
0.337
0.344
E
3.8
4.0
0.150
0.157
e
1.27
0.050
H
5.8
6.2
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.4
1.27
0.016
0.050
k
0°
8°
0°
8°
ddd
0.100
0.004
0016019D
9/14
74VHCT74A
TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
10/14
74VHCT74A
Tape & Reel SO-14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
22.4
0.519
0.882
Ao
6.4
6.6
0.252
0.260
Bo
9
9.2
0.354
0.362
Ko
2.1
2.3
0.082
0.090
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
11/14
74VHCT74A
Tape & Reel TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
12/14
TYP
0.504
22.4
0.519
0.882
Ao
6.7
6.9
0.264
0.272
Bo
5.3
5.5
0.209
0.217
Ko
1.6
1.8
0.063
0.071
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
74VHCT74A
Table 9: Revision History
Date
Revision
16-Dec-2004
3
Description of Changes
Order Codes Revision - pag. 1.
13/14
74VHCT74A
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2004 STMicroelectronics - All Rights Reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
14/14