STMICROELECTRONICS EMIF1K

EMIF10-1K010F2
®
EMI FILTER
INCLUDING ESD PROTECTION
IPAD™
MAIN PRODUCT CHARACTERISTICS:
Where EMI filtering in ESD sensitive equipment is
required
■ Mobile phones and communication systems
■ Computers, printers and MCU Boards
DESCRIPTION
The EMIF10-1K010F2 is a highly integrated
devices designed to suppress EMI/RFI noise in all
systems
subjected
to
electromagnetic
interferences. The EMIF10 flip chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV.
Flip-Chip
(24 Bumps)
Table 1: Order Code
Part Number
EMIF10-1K010F2
BENEFITS
■
■
■
■
■
■
■
■
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Lead free package
Very low PCB space consuming:
2.57 mm x 2.57 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration & wafer level packaging.
Marking
FD
Figure 1: Pin Configuration (ball side)
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4
15kV (air discharge)
8kV (contact discharge)
5
4
3
2
I7
GND
GND
I3
I9
GND
GND
I5
I1
B
I10
I8
I6
I4
I2
C
09
07
05
03
01
D
010
08
06
04
02
E
1
A
MIL STD 883E -Method 3015-6 Class 3
Figure 2: Basic Cell Configuration
Low-pass Filter
Output
Input
Ri/o = 1kΩ
Cline = 100pF
GND
GND
GND
TM: IPAD is a trademark of STMicroelectronics.
October 2004
REV. 1
1/7
EMIF10-1K010F2
Table 2: Absolute Maximum Ratings (Tamb = 25°C)
Symbol
Parameter and test conditions
Tj
Junction temperature
Value
Unit
125
°C
Top
Operating temperature range
- 40 to + 85
°C
Tstg
Storage temperature range
- 55 to + 150
°C
Table 3: Electrical Characteristics (Tamb = 25°C)
Symbol
Parameters
I
VBR
Breakdown voltage
IRM
Leakage current @ VRM
VRM
Stand-off voltage
VCL
Clamping voltage
Rd
Dynamic impedance
IPP
Peak pulse current
RI/O
Series resistance between Input &
Output
Cin
VCL VBR
VRM
V
IRM
IR
IPP
Input capacitance per line
Symbol
Test conditions
VBR
IR = 1 mA
IRM
VRM = 3V per line
RI/O
Rline
At 0V bias
Figure 3: S21 (dB) attenuation measurement
and Aplac simulation
Min.
Typ.
Max.
Unit
6
8
10
V
500
nA
900
1000
1100
Ω
80
100
120
pF
Figure 4: Analog crosstalk measurements
0
0.00
dB
- 5.00
Aplac
-20
- 10.00
Measure
- 15.00
-40
- 20.00
- 25.00
-60
- 30.00
- 35.00
-80
- 40.00
- 45.00
-100
- 50.00
1.0M
3.0M
10.0M
30.0M
f/Hz
2/7
100.0M
300.0M
1.0G
1
10
100
frequency (MHz)
1,000
EMIF10-1K010F2
Figure 5: Digital crosstalk measurement
Figure 6: ESD response to IEC61000-4-2
(+15kV air disc.harge) on one input V(in) and
on one output (Vout)
V(in1)
VG1
V(out1)
β2 1VG1
Figure 7: ESD response to IEC61000-4-2 (-15kV
air discharge) on one input V(in) and on one
output (Vout)
Figure 8: Line capacitance versus applied
voltage
C(pF)
V(in1)
V(out1)
100
90
80
70
60
50
40
30
20
10
0
F=1MHz
Vosc=30mV
VR(V)
1
2
5
10
3/7
EMIF10-1K010F2
Figure 9: Aplac model single line structure
GNDi
Rs
Ls
50pH
50m
50pH
Ii
50m
+
+ Port15
- 50
Ls
Rs
Oi
+
cap_line
Lbump
Port16
50
cap_line
Rbump
Rgnd Lgnd
Rgnd
Lgnd
Rgnd
Lgnd
Rseries
Oi
Ii
Ii
Rgnd Lgnd
Csubump Rsubump
+
Rsub
MODEL = demif10
Lhole
+
sub
GNDi
MODEL = demif10
Oi
Csubump Rsubump
+
sub
Figure 10: Aplac model parameters
Cz
Rseries
cap_line
Ls
Rbump
Lbump
Rs
Csubump
Rsubump
Rsub
lhole
Rhole
cap_hole
Rgnd
Ignd
4/7
57pF
960
0.8pF
0.6nH
50m
50pH
0.15
15pF
0.15
0.1
1.2nH opt
0.15
0.15pF
0.25
0.4nH
Model demif10
BV = 7
IBV = 1m
CJO = Cz
M = 0.3333
Rs = 1
VJ = 0.6
TT = 100n
cap_hole
Rhole
EMIF10-1K010F2
Figure 11: Ordering Information Scheme
EMIF
yy
-
xxx zz
Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
= 3: Leadfree Pitch = 400µm, Bump = 250µm
Figure 12: FLIP-CHIP Package Mechanical Data
650µm ± 65
315µm ± 50
2.57mm ± 50µm
500µm ± 50
500µm ± 50
2.57mm ± 50µm
Figure 13: Foot print recommendations
250µm ± 40
Figure 14: Marking
545
Solder stencil opening : 330µm
400
545
Copper pad Diameter :
250µm recommended , 300µm max
Dot, ST logo
xx = marking
z = packaging
location
yww = datecode
(y = year
ww = week)
E
230
x x z
y ww
100
Solder mask opening recommendation :
340µm min for 315µm copper pad diameter
All dimensions in µm
5/7
EMIF10-1K010F2
Figure 15: FLIP-CHIP Tape and Reel Specification
Dot identifying Pin A1 location
1.75 +/- 0.1
Ø 1.5 +/- 0.1
4 +/- 0.1
3.5 +/- 0.1
ST
E
E
xxz
yww
ST
E
xxz
yww
ST
xxz
yww
8 +/- 0.3
0.73 +/- 0.05
4 +/- 0.1
User direction of unreeling
All dimensions in mm
Table 4: Ordering Information
Ordering code
Marking
Package
Weight
Base qty
Delivery mode
EMIF010-1K010F2
FD
Flip-Chip
9.2 mg
5000
Tape & reel 7”
Note: More informations are available in the application notes:
AN1235: “Flip-Chip: Package description and recommendations for use”
AN1751: "EMI Filters: Recommendations and measurements"
Table 5: Revision History
6/7
Date
Revision
12-Oct-2004
1
Description of Changes
First issue
EMIF10-1K010F2
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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