L5950 ® MULTIPLE MULTIFUNCTION VOLTAGE REGULATOR FOR CAR RADIO 5 REGULATORS 10V (350mA); 8.5V (175mA); 5V (350mA); 5V (250mA); 8V/10V (1A) ALL REGULATORS ARE LOW DROPOUT OUPUTS 3 HIGH SIDE DRIVERS: 2A (HSD1), 0.45A (HSD2 & HSD3) NO EXTERNAL CHARGE PUMP CAPACITORS ARE REQUIRED STAND BY MODE CONTROLLED BY 3 INPUT PINS: ENABLE FOR REG2 AND REG3, I2C BUS FOR REG1, REG4, REG5, HSD1, HSD2, HSD3 INDIVIDUAL THERMAL SHUTDOWN INDEPENDENT CURRENT LIMITING SHORT CIRCUIT PROTECTION LOAD DUMP PROTECTION AND OVERVOLTAGE SHUTDOWN ESD PROTECTED Multiwatt15 DESCRIPTION The ASPM (Audio System Power Module) is an integration of three high side drivers and five regulators developed to provide the power for an audio system. The outputs of the IC are controlled via the I2C bus and the Enable input. External protection must be provided for reverse battery protection. BLOCK DIAGRAM BAT GND VOLTAGE REFERENCE VREF ENABLE REG 1 10V 350mA REG1 REG 2 8.5V 175mA REG2 REG 3 5V 350mA REG3 REG 4 8V/10V 1A REG4 REG 5 5V 250mA REG5 DRIVE 1 2A HSD1 DRIVE 2 450mA HSD2 DRIVE 3 450mA HSD3 8.5 & 5V ENABLE SCL PC OUTPUT CONTROL SDA CURRENT LIMIT PROTECTION LOGIC INDIVIDUAL THERMAL SHUTDOWN OVERVOLTAGE PROTECTION D99AU1002 March 2001 1/8 L5950 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit -0.6 to 26.5 V 34 V -0.6 to 9 V Output Control Voltage -0.6 to 6.0 V Top Operating Temperature Range -40 to 85 °C Tstg Storage Temperature Range -40 to 150 °C VS DC Operating Supply Voltage VS Transient Supply Overvoltages, rise time = 10ms delay time = 115ms Vin Input Voltages (EN, SDA, SCL) Vout PIN CONNECTION 15 REG4 14 BAT 13 REG5 12 REG3 11 REG2 10 REG1 9 VREF 8 GND 7 SCL 6 Enable 5 SDA 4 HSD3 3 HSD2 2 BAT 1 HSD1 D99AU1006 THERMAL DATA Symbol Rth j-case 2/8 Parameter Thermal Resistance Junction-case Value Unit 2 °C/W L5950 ELECTRICAL CHARACTERISTICS (Refer to the application circuit, VS = 14.4V; Tamb = 25°C; unless otherwise specified.) Symbol Iq,ST-BY Iq IEN VIL, VIH Parameter Test Condition Max. Unit 2 µA VBAT = 14V, IREG1 = 350mA, IREG2 = 175mA, IREG3 = 350mA, IREG4 = 1A, IREG5 = 250mA, IHSD1 = 2A, IHSD2,3 = 450mA 150 mA VBAT = 14V, Enable ≥ 2V VBAT = 14V, Enable ≥ 0.8V 10 µA Standby Quiescent Current All Outputs Off, VBAT = 14V Maximum Quiescent Current Enable Input Current Enable Threshold Voltage VBAT = 14V, VIL VBAT = 14V, VIH Min. Typ. µA -10 0.8 V V 10.5 V 2 10V/350mA REG 1 OUTPUT VREG1 Output Voltage IREG1 = 350mA 11V ≤ VCC ≤ 16V ∆Vline Line Regulation 11V ≤ VCC ≤ 26V (Measure ∆ VREG1 Across VCC Range) 55 mV ∆Vload Load Regulation 5mA ≤ IREG1 ≤ 350mA 55 mV Dropout Voltage (Measure VBAT- VREG1 when VREG1 drops 0.1V) (Measure VBAT- VREG1 when VREG1 drops 0.1V) IREG1 = 350mA IREG1 = 5mA 900 300 mV mV 1.1 A VDROPOUT Ilim1 Current Limit SVR Ripple Rejection 9.50 10 0.51 fo = 1kHz, VBAT = 14V with 1Vpp AC IREG1 = 175mA 50 8.3 dB 8.5V/175mA REG 2 OUTPUT VREG2 Output Voltage IREG2 = 175mA 9.5V ≤ VBAT ≤ 16V ∆Vline Line Regulation ∆Vload VDROPOUT 8.7 V 9.5V ≤ VBAT ≤ 26V (Measure ∆ VREG2 Across VBAT Range) 50 mV Load Regulation 5mA ≤ IREG2 ≤ 175mA 50 mV Dropout Voltage (Measure VBAT- VREG2 when VREG2 drops 0.1V) IREG2 = 175mA IREG2 = 5mA 900 300 mV mV 525 mA Ilim2 Current Limit SVR Ripple Rejection 8.5 280 fo = 1kHz, VBAT = 14V with 1Vpp AC IREG2 = 100mA 50 dB 5V/350mA REG 3 OUTPUT VREG3 Voltage Offset from VREF ∆Vline Line Regulation ∆Vload Load Regulation 10 40 mV 7V ≤ VBAT ≤ 26V (Measure ∆ VREG3 Across VBAT Range) 40 mV 5mA ≤ IREG3 ≤ 350mA 100 mV 3/8 L5950 ELECTRICAL CHARACTERISTICS (continued) Symbol VDROPOUT Parameter Dropout Voltage (Measure VBAT- VREG3 when VREG3 drops 0.1V) Ilim3 Current Limit SVR Ripple Rejection Test Condition Min. Typ. (Measure VBAT- VREG3 when VREG3 drops 0.1V) IREG3 = 175mA IREG3 = 5mA 0.5 fo = 1kHz, VBAT = 14V with 1Vpp AC IREG3 = 175mA Max. Unit 950 600 mV mV 1 A 50 dB 8/10V/1A REG 4 OUTPUT VREG4 Output Voltage IREG4 = 1A b5 = 0 b5 = 1 7.6 9.50 8 10 8.4 10.5 V V ∆Vline Line Regulation 11V ≤ VBAT ≤ 26V, b5 = 1 (Measure ∆ VREG2 Across VBAT Range) 50 mV ∆Vload Load Regulation 5mA ≤ IREG4 ≤ 1A 150 mV VDROPOUT Dropout Voltage (Measure VBAT- VREG2 when VREG2 drops 0.1V) IREG4 = 1A IREG4 = 5mA 950 600 mV mV Ilim4 Current Limit SVR Ripple Rejection 1.3 fo = 1kHz, VBAT = 14V with 1Vpp AC IREG4 = 500mA 2.4 50 A dB 5V/250mA REG 5 OUTPUT VREG5 Output Voltage IREG5 = 250mA 5.25 V ∆Vline Line Regulation 7V ≤ VBAT ≤ 26V (Measure ∆ VREG5 Across VBAT Range) 40 mV ∆Vload Load Regulation 5mA ≤ IREG5 ≤250mA 100 mV VDROPOUT Dropout Voltage (Measure VBAT- VREG5 when VREG5 drops 0.1V) IREG5 = 250A IREG5 = 5mA 1.6 1.2 V V 700 mA Ilim5 Current Limit SVR Ripple Rejection fo = 1kHz, VBAT = 14V with 1Vpp AC IREG5 = 125mA Vsat Output Saturation Voltage IHSD1 = 1A Continuous Time Operation Ileak1 Output Leakage Current All Driver Outputs are Off Current Limiting RHSD1 = 0.5Ω 4.75 320 5 50 dB 2A HSD1 Ilim 0.5 V -50 50 µA 2.4 4 A 0.6 V 0.45A HSD2 & HSD3 Vsat Ileak2,3 Ilim 4/8 Output Saturation Voltage IHSD2,3 = 300mA Continuous Time Operation Output Leakage Current All Driver Outputs are Off -50 50 µA Current Limiting RHSD2,3 = 0.5Ω 0.56 1 A L5950 ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Condition Min. Typ. Max. Unit 1.5 V CHARACTERISTICS FOR I2C VIL LOW Level Input Voltage VIH HIGH Level Input Voltage VHYS Input Hysteresis VOL1 LOW Level Output Sink Current = 3mA Input Current 0.4V ≤ VI ≤ 0.9VDDmax 3 V 0.2 V 0.4 Sink Current = 6mA VOL2 II -10 SCL Clock Frequency fSCL V 0.6 V 10 µA 400 kHz while 10V is the output voltage when bit5 = ’1’. When all outputs are turned off the total current draw must be minimized. I2C will run at a clock speed range of 100kHz to 400kHz. This device should be capable of operating at any frequency within this range. Protection The L5950 can survive under the following conditions: shorting the outputs to BAT and GND, loss of BAT, loss of IC GND, double battery(+26.5V), 4000V ESD, 34V load dump. L5950 will not handle a reverse battery condition. External components must be implemented for reverse battery protection. Thermal Shutdown: REG1, REG2, REG3, REG4, REG5 outputs shutdown at 160°C and return to normal operation at 130°C. The HSD2 and HSD3 shutdown at 160°C and return to normal operation at 130°C. The HSD1 with go into thermal shutdown at 170°C and returns to operation at 120°C. Current Limiting: each voltage regulator will contain its own current protection. Short Circuit: If the outputs are short circuited, the IC will go into current limiting and eventually the thermal shutdown will kick in. Current limiting will not disable the outputs. Overvoltage: The IC will not operate if the BAT voltage reaches 27V typ. or above. FUNCTIONAL DESCRIPTION The three high side drivers are a 2.0A output (HSD1), and two 450mA outputs (HSD2 & 3). The five regulator outputs are a 10V at 350mA (REG1), an 8.5V at 175mA (REG2), a 5V at 350mA (REG3), an 8V/10V at 1A (REG4), and 5V at 250mA (REG5). The regulators are low dropout. The regulators will operate with output capacitors with ESR of 0.1Ω to 5Ω. The 8.5V regulator output (REG2) is a tighter tolerance output than the other regulator outputs. The 8.5V output is a ±2.5% (5% total range) output over temperature. This is required on the regulator to improve performance and reduce cost on the 8.5V driven IC’s in the radio. The tighter tolerance is possible by performing a trim of the bandgap reference to the 8.5V output. The other outputs are ±5% variation over temperature. REG3 is referenced from the VREF input not the internal bandgap. This is done to minimize the voltage offset between individual 5V supplies. The REG2 and REG3 outputs are turned on and off with the Enable input, a ’1’ turns the outputs on and a ’0’ turns them off. When Enable is "1", the other outputs can be independently controlled via the I2C bus. When a given regulator is turned off it must be guaranteed to be lower than 0.2V. The output voltage of REG4 is selected via bit 5 of the I2C data byte: 8V is the output voltage if bit5 = ’0’ Figure 1. Definition of Timing on the I2C Bus. SDA tBUP tLOW tF tR tHD;STA tSP SCL tHD;DAT P S tHD;DAT tHIGH tSU;DAT tSU;STA tSU;STO Sr D99AU1007 P 5/8 L5950 Figure 2. Typical Application Circuit. EN ENABLE REG1 BAT REG2 VREF REG3 FBATT 0.1µF VREF 1000µF REG1 REG2 REG3 REG4 REG5 REG5 C14 10µF SCL HSD1 SDA C10 10µF HSD1 HSD2 HSD2 HSD3 GND C12 10µF C6 10µF C8 10µF REG4 HSD3 D99AU1010A (*) ESR of output capacitors should be between 0.1Ω and 5.0Ω. WRITE MODE: CHIP ADDRESS DATA BYTE S 0 MSB A A LSB MSB .. .. P LSB S = START condition - SDA goes from high to low while SCL is high A = Acknowledge - the device being written to, pulls down on data line (SDA) during the acknowledge clock pulse. P = STOP condition - SDA goes from low to high while SCL is high. CHIP ADDRESS BYTE: CHIP ADDRESS READ/WRITE A7 A6 A5 A4 A3 A2 A1 A0 0 0 0 1 0 0 0 0 DATA BYTE: DATA BYTE REG1 b7 b6 R4 10V REG4 REG5 HSD1 HSD2 HSD3 b5 b4 b3 b2 b1 b0 X Default mode is 0000 0000 which corresponds to all outputs being off, low power mode. Bit 5 Controls the output voltage of REG4. A ’0’ corresponds to 8V and a ’1’ corresponds to 10V. 6/8 L5950 mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 5 0.197 B 2.65 0.104 C 1.6 0.063 D 1 OUTLINE AND MECHANICAL DATA 0.039 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 G 1.02 1.27 1.52 0.040 0.050 0.060 G1 17.53 17.78 18.03 0.690 0.700 0.710 H1 19.6 0.772 H2 20.2 0.795 L 21.9 22.2 22.5 0.862 0.874 0.886 L1 21.7 22.1 22.5 0.854 0.870 0.886 L2 17.65 18.1 0.695 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L7 2.65 2.9 0.104 0.713 0.114 M 4.25 4.55 4.85 0.167 0.179 0.191 M1 4.63 5.08 5.53 0.182 0.200 0.218 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 Multiwatt15 V 7/8 L5950 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8