STMICROELECTRONICS L6353D

L6353

SMART DRIVER FOR POWER MOS & IGBT
PEAK HIGH OUTPUT CURRENT CAPABILITY (+8A)
WIDE SUPPLY VOLTAGE RANGE (12.5 TO
18V)
0 TO –7.5V NEGATIVE BIAS VOLTAGE SUPPLY RANGE
OVER CURRENT AND DESATURATION
PROTECTION OF THE EXTERNAL POWER
DEVICE (EXTERNALLY PROGRAMMABLE)
LATCH-UP PROTECTION (FOR IGBT)
TWO STEPS TURN-ON (PROGRAMMABLE)
PROTECTION AGAINST POSITIVE SUPPLY
UNDER-VOLTAGE
INPUT COMPATIBLE WITH OPTOCOUPLER
OR PULSE TRANSFORMER
PROGRAMMABLE TURN-ON DELAY
THERMAL PROTECTION WITH ON-CHIP
OVER-TEMPERATURE ALARM AND TURNOFF PROCEDURE
OPERATING FREQUENCY UP TO 100kHz
SO16
DIP16
ORDERING NUMBERS: L6353 (DIP)
L6353D (SO)
DESCRIPTION
The L6353 device is a smart driver, with all the
drive and protection know-how ”on board”.
Available in both DIP and SO package, it can be
triggered with a logic level or with the signal from an
optocoupler or a pulse transformer. It filters parasitic
input signals and drives any MOS or IGBT.
BLOCK DIAGRAM
DELAY
SUPPLY
UV SENSE
REFERENCES
2.5V
300µA
3.15V
1.25V
+
−
VPOS
−
−
INPUT
REF
+
+
SELECT
VCC
OUT1
OUT1
CLAMPING
FILTER
200ns
THERMAL
SHUTDOWN
CLAMP_PROG
LOGIC
OUT2
VSS
− 3.15V
1.25V
+
3.75V
MON_DELAY
−
INV_OUT
+
4V
+
ALARM
ON_SENSE
−
ON_LEV_PROG
7.5V
COM
February 2000
D94IN106B
1/11
L6353
DESCRIPTION (continued)
It monitors the on-state voltage drop of the driven
power device and protects it against overload and
short circuit.
The on-state voltage drop level is externally programmable from 5 to 15V. This function is inhibited during the turn-on of the external power device for an externally programmable period.
An internal inhibition time of 200ns avoids false
triggering.
Overload or overheating are signalled on an
alarm output. If temperature continues to increase
the power output is switched off and maintained
in the off-state until the temperature decreases
below the low threshold. A programmable turn-on
delay avoids cross conduction in bridge configurations.
To preserve the external power device (especially
IGBT) from the risk of latch-up, the gate voltage
can be risen in two different steps (of which the
first is externally programmable from 7 to 11V).
PIN CONNECTION (top view)
OUT1
1
16
OUT2
VCC
2
15
COM
VPOS
3
14
VSS
CLAMP_PROG
4
13
ON_SENSE
INV_OUT
5
12
ON_LEV_PROG
ALARM
6
11
SELECT
MON_DELAY
7
10
DELAY
VREF
8
9
INPUT
D94IN113A
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VCC
Supply Voltage referred to COM pin
VSS
Negative Supply Voltage referred to COM pin
VPOS - VOUT1
Collector-Emitter Voltage of High Side NPN
VOUT2 - VSS
Drain-Source Voltage of Low Side DMOS
VEXT1
Externally Forced Voltage (pin 9)
VEXT2
Externally Forced Voltage (pins 4,7,10, 11, 12)
IDELAY
Sink Current pin Delay
Value
Unit
20
V
– 8 to 0
V
25
V
25
V
-0.3 to VCC
V
-0.3 to 7
V
3
mA
IMON_DELAY
Sink Current Pin Mon_Delay
3
mA
VON_SENSE
Voltage on ON_SENSE Pin
VSS-0.3 to VCC
V
A
IOUT1
Positive Output Current (tp ≤1ms) (peak)
8
IOUT2
Negative Output Current (tp ≤1ms) (peak)
8
A
±20
mA
±20
mA
Output Current in INV_OUT Pin
IINV_OUT
Output Current in ALARM Pin
IALARM
Ptot
Total Power Dissipation
internally limited
Tamb
Operating Temperature Range
-25 to +85
°C
Tstg
Storage Temperature
-50 to +150
°C
THERMAL DATA
Symbol
Rthj-ambient
2/11
Parameter
Thermal Resistance Junction-ambient
Max
DIP16
SO16
Unit
80
90
°C/W
L6353
PIN FUNCTIONS
N.
Name
Function
1
OUT1
2
VCC
Positive Supply Voltage (referred to COM).
See under voltage lockout functioning
3
VPOS
Positive Bias Voltage (collector of the NPN power transistor).
4
CLAMP_PROG
5
INV-OUT
Output of high side driver (emitter of power NPN transistor).
First Step of the Gate Voltage Programming.
The programming is achieved setting an appropriate voltage on this pin (i.e. using a resistence
voltage divider).
Inverted Output Driver Status.
The buffer output is able to drive some auxiliary circuit (i.e. a LED).
6
ALARM
7
MON_DELAY
Diagnostic Output Signal. A fault condition is signalled by this output buffer.
8
VREF
9
INPUT
Input signal.
The driving signal can be a logic level either active LOW (inverted mode) or HIGH (direct
mode) in the Logic Level or a pulse in the Pulse Transformer Mode (see Figure 2)
10
DELAY
On Triggering Delay. An R-C network connected between this, the COM and the VREF pins,
definethe tDELAY time interval (see fig 4)
11
SELECT
Select the direct/inverted mode in the Logic Level Mode. It’s also the reference pin in Pulse
transformer mode.
12
ON_LEV_PROG
VON level programming.
This pin is used to set the VON monitor level. The programming is achieved setting an
appropriate voltage on this pin (i.e. using a resistive divider).
13
ON_SENSE
14
VSS
VON Monitor Delay. An R-C network connected between this, the COM and the V REF pins,
define tMON_DELAY time interval (see fig 4)
Output of the 5V/10mA internal voltage reference.
On State Monitor.
This pin is used to monitor the turning on of the external power device.
Negative supply voltage (referred to the COM).
This pin is the source of the low side driver DMOS.
15
COM
Ground
16
OUT2
Output of the low side driver (drain of the DMOS).
3/11
L6353
DC ELECTRICAL CHARACTERISTICS (VPOS = VCC=15V; VSS = -5 to 0V; Tj = -25 to +125°C; unless
otherwise specified)
Symbol
Pin
Vdrop
1
VPOS - VOUT1
Parameter
IOUT1 = 2A
Test Condition
VCC
2
Operating Supply Voltage
(referred to COM pin)
Min.
Typ.
Max.
2.5
V
18
V
VCCth1
Under Voltage Upper
Threshold
10.5
11.5
12.5
V
VCCth2
Under Voltage Lower
Threshold
10
11
12
V
VCChys
Under Voltage Hysteresis
0.3
0.5
0.7
V
Quiescent Supply Current
ICCq
pin floating
Iso
Sourced Current
Isi
Sinked Current
Vdrop_sig
4, 12
5
Output Voltage
Vd
12.5
Unit
5, 6
V
pin grounding
20
µA
pin at +5V
-20
µA
V
High State Output Voltage Drop Iout = 20mA
VCC–3
Low State Output Voltage Drop
Vref
8
R in
7, 10
Iref = 0A; Tj = 25°C
4.9
Iref < 10mA; Tj = 25°C
4.8
13
Iouts
Input Resistance
Output Current
pin grounded
Operating Negative Bias
Voltage
(referred to COM)
VSS
14
R ON
16
On Resistance
OUT2 to VSS); IOUT2 = 2A
Vil
9
Low Level Voltage
(Logic Level Mode)
Vih
High Level Voltage
Iin
Input Current
tinh
Inhibited Parasitic Pulse
Duration
(Logic Level Mode)
Vton
Turn-on Threshold Voltage
Referred to Vse l
(Pulse Transformer Mode)
Vtoff
Turn-off Threshold Voltage
Referred to Vsel
(Pulse Transformer Mode)
Vsl
3
V
5.1
V
5.2
mA
100
Ω
3.15
V
75
KΩ
200
µA
–7
0
V
Ω
0.5
0
1
(Logic Level Mode)
4
VCC
V
0<Vin<VCC
(Logic Level Mode)
– 10
10
µA
300
ns
1.5
V
200
– 1.5
V
V
Low Level Voltage
(Logic Level Mode)
0
1
V
High Level Voltage
(Logic Level Mode)
2
VREF
V
Isl
Current Output of SELECT Pin
Vsl = 0V (Logic Level Mode)
Vsel
Output Voltage of SELECT Pin
(Pulse Transformer Mode)
Vsh
4/11
11
5
Comparator Input Resistance
Comparator Threshold
Vdth
R ins
Output of Internal Voltage
Reference
mA
1.26
µA
300
2.25
2.5
2.75
V
L6353
AC ELECTRICAL CHARACTERISTICS
Symbol
Pin
Parameter
ton
9 vs 1
Turn on Propagation Delay
Time
400
ns
toff
9 vs 16 Turn off propagation delay
time
400
ns
Rise Time
50
ns
Fall Time
50
tr
tf
tfault
1,16
Test Condition
Min.
Typ.
Delay Time for Fault
Detection
Max.
Unit
ns
400
ns
Max.
Unit
THERMAL PROTECTION
Symbol
Parameter
Test Condition
Min.
Typ.
Tth1
Over Temperature Threshold
130
°C
Thys1
Over Temperature Threshold Hysteresis
20
°C
Tth2
Over Temperature Shutdown
160
°C
Thys2
Over Temperature Shutdown Hysteresis
20
°C
(Thermal Procedure)
Figure 1: Switching waveforms and test circuit
V in
5V
50%
50%
0
t
tW
tON
tOFF
VOUT
90%
90%
50%
50%
10%
10%
tr
tf
D94IN107
t
Figure 1a : Switching waveforms and test circuit
POSITIVE
SUPPLY
100µF
VREF
INPUT
100nF
100nF
VPOS
V CC
SELECT
2
11
13
3
8
1
9
16
D.U.T.
VSS
100µF
D94IN108B
14
VCLAMP_
PROG
4
7
MON_
DELAY
4.7KΩ
OUT1
OUT2
1nF
Vin
NEGATIVE
SUPPLY
VON_SENSE
10
15
COM
DELAY
VREF
4.7KΩ
VREF
5/11
L6353
Figure 2. Pulse Transformer mode operation.
Vin
tW
tW
V ton = Vsel +1.5V
INPUT
Vsel
Vin
SELECT
V toff = Vsel -1.5V
INPUT PULSE
TRANSFORMER
OFF
ON
D94IN114
t
Figure 3. Gate driving voltage waveforms.
Vin
t
VOUT1
VPOS
VCL
VSS
t
tDELAY
VG
VPOS
t MILLER =
VCL
VMILLER
t
tMON_DELAY
trr
tMILLER
tr
Short circuit
or overcurrent
protected area
VONth
D94IN115
6/11
V CL − V MILLER
QGATE (device dependent)
defined between 0V and
VCL
VSS
VCE/VDS
VH.V.
Q GATE ⋅ R G’
t
L6353
Figure 4. Gate driving waveforms test circuit.
VH.V.
POSITIVE
SUPPLY
100µF-35V
DFW
VCC
LOAD
V POS
SELECT
ON_SENSE
100nF
OUT1
INPUT
LOGIC
VG
VCE
1.2Ω
OUT2
Vin
COM
VREF
5.6Ω
VSS (**)
100nF
CLAMP_PROG
12KΩ
MON DELAY
2.2KΩ
100nF
(*)
47KΩ
DELAY
1nF
100µF-10V
ON_LEV_PROG
100nF
(*)
100pF
4.7KΩ
NEGATIVE
SUPPLY
12KΩ
12KΩ
D94IN116B
VREF
VREF
V REF
VREF
NOTES:
(*) The capacitor is required if the pin is left floating.
(**) If the negative supply is not used, the VSS pin must be connected to the COM pin as close as possible to the IC.
INPUT INTERFACE
To drive the external power device three different
possibilities are allowed:
The Logic Level Mode, either direct or inverted,
and the Pulse Transformer Mode
Using the Logic Level Mode (direct) an high level
(referred to COM), at the INPUT pin will start the
Turn on Procedure (i.e. firing an N channel external device). A low level (referred to COM) will instead close the OUT2 pin to VSS.
The functioning is reversed in the inverted mode.
To select the direct mode the SELECT pin must
be connected via a capacitor to COM. The inverted mode is chosen by connecting the SELECT pin to COM.
In logic Level Mode pulses lasting less than t inh
(200ns typ.) are filtered out.
In the Pulse Transformer Mode the SELECT pin
will be the reference pin for the signal applied to
the INPUTpin. The positive pulse will start the
TURN ON PROCEDURE, while the negative
pulse will close OUT2 to VSS. The duration of this
pulses (tw, see fig.2) must be again tw > tinh.
TURN-ON PROCEDURE
The firing of the external power device is performed in three steps in order to avoid the most
common problems that can arise.
In each of these steps there are a number of parameters that can be easily externally presetted to
the requested values.
First Step
Parameter: tDELAY
In order to avoid cross-conduction between the
external power device in half bridge arrangement
the driver output is activated after an externally
programmable delay time (tDELAY, see fig. 3) after
the input signal. To set the tDELAYinterval an R-C
network has to be connected between the DELAY, VREF and COM pins (see fig.4) giving:
tDELAY (µsec) = REXT (KΩ) . CEXT(nF)+ t on
To minimize this interval only a resistor has to be
connected between the DELAY and the VREF limiting thus the duration to the internal propagation
delay ton.
Second step
Parameters: tMON_DELAY, VCL
To protect the driven device from latch-up at turnon (IGBT) after the t DELAY time interval a second
externally programmable time interval tMON_DELAY (presettable using the same technique used
to set the tDELAY interval, see fig.4)
tMON-DELAY (µsec) = REXT (KΩ) . CEXT(nF)
during the tMON_DELAY the voltage on the VOUT1)
is limited to the VCL level. To program this value
an appropriate voltage drop has to be imposed,
by mean of a resistive voltage divider, at the
CLAMP_PROG pin according to the following formula:
7/11
L6353
VCLAMP_PROG =
with
VCL
6
7V < VCL <11V
Leaving the CLAMP_PROG pin floating the VCL
level is set to 9V. If the pin is grounded the function is inhibited (i.e. no intermediate step during
the firing).
Third step
Parameter: VONth
At the end of the tMON_DELAY the gate of the
driven device is pulled toward the VPOS level in
order to ensure an appropriate drive to minimize
the power losses. The external power device is
considered in overload whenever the voltage on
its output, sensed via the VON_SENSE pin, is above
VONth. The comparison value is programmable
setting at a certain level, by means of a resistive
divider, the ON_LEV_PROG pin according to the
following formula:
VON_LEV_PROG = VONth. 0.17
with
5V < VONth. < 15V
and
VONth. < VCC -1V.
If the ON_LEV_PROG pin is left floating theVONth.
level is set to 7.5V.
The overload status is signalled via the ALARM
pin, active LOW. To inhibite the VON Monitor function, the VSENSE pins must be grounded.
THERMAL PROCEDURE
As the junction temperature raises, two different
events will take place. When the Over Temperature Threshold (Tth1), set at 130°C is reached, the
ALARM output is activated (low level). If the temperature keeps on raising, up to the Over Temperatur Shutdown (Tth2 = 160°C Typ) the output
power device is turned off until the temperature
decrease. To prevent an oscillating behaviour
both the thresholds have a built-in hysteresis of
20°C.
UNDERVOLTAGE LOCK OUT
To avoid operation with non optimal drive of the
external power device, an Undervoltage Lockout
function is implemented. The OUT1 pin is forced
close to VSS until the VCC supply voltage has
reached the Undervoltage Upper Threshold
(VCCth2) value. If the supply voltage falls below
the lower hysteresis value (i.e. VCCth1 - VCChys)
the OUT1 will be again forced close to VSS. The
built-in hysteresis will thus avoid intermittent functioning of the device at low supply voltage that
may have a superimposed ripple.
Undervoltage Comparator Hysteresis
Vcchys
Vccth
8/11
D94IN126B
Vs
L6353
mm
DIM.
MIN.
a1
0.51
B
0.77
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
Z
OUTLINE AND
MECHANICAL DATA
3.3
0.130
1.27
DIP16
0.050
9/11
L6353
mm
DIM.
MIN.
TYP.
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.25
a2
MAX.
0.069
0.004
0.009
1.6
0.063
b
0.35
0.46
0.014
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
c1
0.020
45° (typ.)
D (1)
9.8
10
0.386
0.394
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
8.89
0.350
F (1)
3.8
4
0.150
0.157
G
4.6
5.3
0.181
0.209
L
0.4
1.27
0.016
0.050
M
S
OUTLINE AND
MECHANICAL DATA
0.62
0.024
SO16 Narrow
8°(max.)
(1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch).
10/11
L6353
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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11/11