FAIRCHILD FAN2106MPX_12

FAN2106 — TinyBuck™
3-24 V Input, 6 A, High-Efficiency,
Integrated Synchronous Buck Regulator
Features
Description






6 A Output Current
The FAN2106 TinyBuck™ is a highly efficient, smallfootprint,
constant-frequency,
6 A,
integrated
synchronous buck regulator.

Fully Synchronous Operation with Integrated
Schottky Diode on Low-Side MOSFET Boosts
Efficiency
Wide Input Range: 3 V - 24 V
Output Voltage Range: 0.8 V to 80% VIN
Over 95% Peak Efficiency
1% Reference Accuracy Over Temperature
Programmable Frequency Operation: 200 KHz to
600 KHz








Internal Bootstrap Diode

5x6 mm, 25-Pin, 3-Pad MLP Package
Internal Soft-Start
Power-Good Signal
Starts on Pre-Biased Outputs
Accepts Ceramic Capacitors on Output
External Compensation for Flexible Design
Programmable Current Limit
Under-Voltage, Over-Voltage, and Thermal
Protections
Applications
 Servers & Telecom
 Graphics Cards & Displays
 Computing Systems
 Point-of-Load Regulation
 Set-Top Boxes & Game Consoles
The FAN2106 contains both synchronous MOSFETs
and a controller/driver with optimized interconnects in
one package, which enables designers to solve highcurrent requirements in a small area with minimal
external components. Integration helps to minimize
critical inductances, making component layout simpler
and more efficient compared to discrete solutions.
The
FAN2106
provides
for
external
loop
compensation, programmable switching frequency,
and current limit. These features allow design
flexibility and optimization. High-frequency operation
allows for all-ceramic solutions.
The summing current-mode modulator uses lossless
current sensing for current feedback and over-current
protection. Voltage feedforward helps operation over a
wide input voltage range.
Fairchild’s advanced BiCMOS power process,
combined with low-RDS(ON) internal MOSFETs and a
thermally efficient MLP package, provide the ability to
dissipate high power in a small package.
Output over-voltage, under-voltage, over-current, and
thermal shutdown protections help protect the device
from damage during fault conditions. FAN2106
prevents pre-biased output discharge during startup in
point-of-load applications.
Related Resources


AN-8022 — TinyCalc™ Calculator User Guide
TinyCalc™ Calculator Design Tool
Ordering Information
Part Number
Operating
Temperature Range
FAN2106MPX
-10°C to 85°C
Molded Leadless Package (MLP) 5x6 mm
Tape and Reel
FAN2106EMPX
-40°C to 85°C
Molded Leadless Package (MLP) 5x6 mm
Tape and Reel
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
Package
Packing Method
www.fairchildsemi.com
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
November 2012
Figure 1. Typical Application
Block Diagram
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Application Diagram
Figure 2. Block Diagram
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
www.fairchildsemi.com
2
Figure 3. MLP 5x6 mm Pin Configuration (Bottom View)
Pin Definitions
Pin #
Name
P1, 6-12
SW
Description
Switching Node. Junction of high-side and low-side MOSFETs.
P2, 2-5
VIN
P3, 21-23
PGND
Power Ground. Power return and Q2 source.
1
BOOT
High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes
an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when
SW is LOW.
13
PGOOD
14
EN
ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the
regulator after a latched fault condition. This input has an internal pull-up when the IC is
functioning normally. When a latched fault occurs, EN is discharged by a current sink.
15
VCC
Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin. This
pin should be decoupled to AGND through a >1 µF X5R/X7R capacitor.
16
AGND
17
ILIM
Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the default setting.
18
R(T)
Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching
frequency.
19
FB
Output Voltage Feedback. Connect through a resistor divider to the output voltage.
20
COMP
24
NC
25
RAMP
Power Input Voltage. Connect to the main input power source.
Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits
specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled.
Analog Ground. The signal ground for the IC. All internal control voltages are referred to
this pin. Tie this pin to the ground island/plane through the lowest impedance connection.
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Pin Configuration
Compensation. Error amplifier output. Connect the external compensation network between
this pin and FB.
No Connect. This pin is not used.
Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude
and provides voltage feedforward functionality.
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Parameter
Conditions
Min.
VIN to PGND
VCC to AGND
AGND = PGND
BOOT to PGND
28
V
6
V
35
V
6.0
V
Continuous
-0.5
24.0
Transient (t < 20 ns, f < 600 KHz)
-5.0
30.0
-0.3
VCC+0.3
All other pins
ESD
Unit
-0.3
BOOT to SW
SW to PGND
Max.
Human Body Model, JEDEC JESD22-A114
2.0
Charged Device Model, JEDEC JESD22-C101
2.5
V
V
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
5.0
5.5
V
V
VCC
Bias Voltage
VCC to AGND
4.5
VIN
Supply Voltage
VIN to PGND
3
24
TA
Ambient Temperature
FAN2106MPX
-10
+85
FAN2106EMPX
-40
+85
TJ
Junction Temperature
fSW
Switching Frequency
200
°C
+125
°C
600
KHz
Max.
Unit
+150
°C
+300
°C
Thermal Information
Symbol
TSTG
Parameter
Storage Temperature
TL
Lead Soldering Temperature, 10 Seconds
θJC
Thermal Resistance: Junction-to-Case
θJ-PCB
PD
Min.
Typ.
-65
P1 (Q2)
4
P2 (Q1)
7
P3
4
Thermal Resistance: Junction-to-Mounting Surface
°C/W
35(1)
°C/W
(1)
Power Dissipation, TA = 25°C
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Absolute Maximum Ratings
2.8
W
Note:
1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 26. Actual results
are dependent on mounting method and surface related to the design.
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
www.fairchildsemi.com
4
Electrical specifications are the result of using the circuit shown in Figure 1 with VIN = 12 V, unless otherwise noted.
Parameter
Conditions
Min.
Typ.
Max.
Unit
SW = Open, FB = 0.7 V, VCC = 5 V,
fSW = 600 KHz
8
12
mA
Shutdown: EN = 0, VCC = 5 V
7
10
µA
4.3
4.5
V
Power Supplies
VCC Current
Rising VCC
VCC UVLO Threshold
4.1
Hysteresis
300
mV
Oscillator
Frequency
RT = 50 KΩ
255
300
345
KHz
RT = 24 KΩ
540
600
660
KHz
50
65
ns
(2)
Minimum On-Time
Ramp Amplitude, Peak-to-Peak
16 VIN, 1.8 VOUT, RT = 30 KΩ,
RRAMP = 200 KΩ
0.53
Minimum Off-Time(2)
V
100
150
ns
Reference
Reference Voltage (VFB)(3)
FAN2106MPX, TA = 25°C
794
800
806
mV
FAN2106EMPX, TA = 25°C
795
800
805
mV
80
85
dB
12
15
MHz
Error Amplifier
DC Gain(2)
(2)
Gain Bandwidth Product
VCC = 5 V
Output Voltage (VCOMP)
0.4
3.2
V
Output Current, Sourcing
VCC = 5 V, VCOMP = 2.2 V
1.5
2.2
mA
Output Current, Sinking
VCC = 5 V, VCOMP = 1.2 V
0.8
1.2
mA
FB Bias Current
VFB = 0.8 V, TA = 25°C
-850
-650
-450
nA
6
8
10
A
-11
-10
-9
µA
Protection and Shutdown
Current Limit
RILIM Open, fSW = 500 KHz, VOUT =
1.8 V, RRAMP = 200 KΩ, 16 Consecutive
Cycles
ILIM Current
VCC = 5 V, TA = 25°C
Over-Temperature Shutdown
Over-Temperature Hysteresis
+155
Internal IC Temperature
°C
+30
°C
Over-Voltage Threshold
2 Consecutive Clock Cycles
110
115
120
%VOUT
Under-Voltage Shutdown
16 Consecutive Clock Cycles
68
73
78
%VOUT
Fault Discharge Threshold
Measured at FB Pin
250
mV
Fault Discharge Hysteresis
Measured at FB Pin (VFB ~500 mV)
250
mV
5.3
ms
6.7
ms
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications
Soft-Start
VOUT to Regulation (T0.8)
Fault Enable/SSOK (T1.0)
Frequency = 600 KHz
Continued on the following page…
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
www.fairchildsemi.com
5
Electrical specifications are the result of using the circuit shown in Figure 1 with VIN= 12 V, unless otherwise noted.
Parameter
Conditions
Min.
Typ.
Max.
Unit
2.00
V
Control Functions
EN Threshold, Rising
VCC = 5 V
1.35
EN Hysteresis
VCC = 5 V
250
mV
EN Pull-Up Resistance
VCC = 5 V
800
KΩ
EN Discharge Current
Auto-Restart Mode, VCC = 5 V
1
µA
FB OK Drive Resistance
800
Ω
PGOOD Threshold
(Compared to VREF)
FB < VREF, 2 Consecutive Clock Cycles
-14
-11
-8
%VREF
FB > VREF, 2 Consecutive Clock Cycles
+7
+10
+13
%VREF
PGOOD Output Low
IOUT < 2 mA
0.4
V
Note:
2. Specifications guaranteed by design and characterization; not production tested.
3. See Figure 4 for Temperature Coefficient
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications (Continued)
www.fairchildsemi.com
6
1.20
1.005
1.10
I FB
V FB
1.010
1.000
0.995
1.00
0.90
0.990
0.80
-50
0
50
100
150
-50
0
Temperature (oC)
Figure 4. Reference Voltage (VFB) vs. Temperature,
Normalized
150
1.02
1200
1.01
Frequency
Frequency (KHz)
100
Figure 5. Reference Bias Current (IFB) vs.
Temperature, Normalized
1500
900
600
600 kHz
1.00
300 kHz
0.99
300
0.98
0
0
20
40
60
80
100
120
-50
140
0
RT (KΩ)
50
100
150
o
Temperature ( C)
Figure 6. Frequency vs. RT
Figure 7.
Frequency vs. Temperature, Normalized
1.04
1.60
1.40
1.02
1.20
I ILIM
RDS
50
Temperature (oC)
1.00
1.00
o
Q1 ~0.32 %/ C
0.80
0.98
Q2 ~0.35 %/oC
0.96
0.60
-50
0
50
100
150
-50
50
100
150
o
o
Temperature ( C)
Temperature ( C)
Figure 9.
Figure 8. RDS vs. Temperature, Normalized
(VCC = VGS = 5 V)
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
0
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Characteristics
ILIM Current (IILIM) vs. Temperature,
Normalized
www.fairchildsemi.com
7
Figure 10. Application Circuit: 1.8 VOUT, 500 KHz
Typical Performance Characteristics
100
1400
95
1200
Dissipation (mW)
Efficiency (%)
Typical operating characteristics using the circuit shown in Figure 10. VIN=12 V, VCC=5 V, unless otherwise specified.
90
85
8 VIN 12 VIN 18 VIN
80
75
1000
8 VIN 12 VIN 18 VIN
800
600
400
200
70
0
0
1
2
3
4
5
6
0
1
2
Load (A)
1.8 VOUT Efficiency Over VIN vs. Load
100
95
95
90
85
VIN=12V
80
4
5
6
Figure 12. 1.8 VOUT Dissipation Over VIN vs. Load
100
Efficiency (%)
Efficiency (%)
Figure 11.
3
Load (A)
300 kHz 500 kHz 700 kHz
90
8VIN, 300 kHz
85
12VIN, 500 kHz
80
18VIN, 700 kHz
75
75
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
FAN2106
Application Circuit
70
70
0
1
2
3
4
5
0
6
Figure 13. 1.8 VOUT Efficiency Over Frequency vs.
Load (Circuit Value Changes)
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
1
2
3
4
5
6
Load (A)
Load (A)
Figure 14. 3.3 VOUT Efficiency vs. Load
(Circuit Value Changes)
www.fairchildsemi.com
8
Typical operating characteristics using the circuit shown in Figure 10. VIN=12 V, VCC=5 V, unless otherwise specified.
VOUT
VOUT
SW
SW
Figure 15. SW and VOUT Ripple, 6 A Load
Figure 16. Startup with 1 V Pre-Bias on VOUT
VOUT
EN
IOUT
SW
Figure 17. Transient Response, 2-6 A Load
Figure 18.
VOUT
Re-Start on Fault
VOUT
PGOOD
PGOOD
EN
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
EN
Figure 19. Startup, 3 A Load
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
Figure 20.
Shutdown, 3 A Load
www.fairchildsemi.com
9
Soft-start time is a function of switching frequency.
PWM Generation
Refer to Figure 2 for the PWM control mechanism.
FAN2106 uses the summing-mode method of control to
generate the PWM pulses. An amplified current-sense
signal is summed with an internally generated ramp and
the combined signal is compared with the output of the
error amplifier to generate the pulsewidth to drive the
high-side MOSFET. Sensed current from the previous
cycle is used to modulate the output of the summing
block. The output of the summing block is also
compared against a voltage threshold set by the RLIM
resistor to limit the inductor current on a cycle-by-cycle
basis. The RRAMP resistor helps set the charging current
for the internal ramp and provides input voltage feedforward function. The controller facilitates external
compensation for enhanced flexibility.
EN
1.35V
2400 CLKs
0.8V
FB
Fault
Latch
Enable
1.0V
0.8V
SS
3200 CLKs
T0.8
Initialization
4000 CLKs
Once VCC exceeds the UVLO threshold and EN is HIGH,
the IC checks for a shorted FB pin before releasing the
internal soft-start ramp (SS).
T1.0
Figure 22. Soft-Start Timing Diagram
If the parallel combination of R1 and RBIAS is ≤ 1 KΩ, the
internal SS ramp is not released and the regulator does
not start.
Cycling VCC or the EN pin discharges the internal SS
and resets the IC. In applications where external EN
signal is used, VIN and VCC should be established before
the EN signal comes up to prevent skipping the softstart function.
Enable
FAN2106 has an internal pull-up to the ENABLE (EN)
pin so that the IC is enabled once VCC exceeds the
UVLO threshold. Connecting a small capacitor across
EN and AGND delays the rate of voltage rise on the EN
pin. The EN pin also serves for the restart whenever a
fault occurs (refer to the Auto-Restart section). If the
regulator is enabled externally, the external EN signal
should go HIGH only after VCC is established. For
applications where such sequencing is required,
FAN2106 can be enabled (after the VCC comes up) with
external control, as shown in Figure 21.
Startup on Pre-Bias
The regulator does not allow the low-side MOSFET to
operate in full synchronous rectification mode until
internal SS ramp reaches 95% of VREF (~0.76 V). This
helps the regulator start on a pre-biased output and
ensures that the pre-biased outputs are not discharged
during soft-start.
Protections
The converter output is monitored and protected against
extreme overload, short-circuit, over-voltage, undervoltage, and over-temperature conditions.
Under-Voltage Shutdown
If the voltage on the FB pin remains below the undervoltage threshold for 16 consecutive clock cycles, the
fault latch is set and the converter shuts down. This
protection is not active until the internal SS ramp
reaches 1.0 V during soft-start.
Figure 21. Enabling with External Control
Soft-Start
Over-Voltage Protection
Once internal SS ramp has charged to 0.8 V (T0.8), the
output voltage is in regulation. Until SS ramp reaches
1.0 V (T1.0), the fault latch is inhibited.
If voltage on the FB pin exceeds 115% of VREF for two
consecutive clock cycles, the fault latch is set and
shutdown occurs.
To avoid skipping the soft-start cycle, it is necessary to
apply VIN before VCC reaches its UVLO threshold. Normal
sequence for powering up would be VINVCCEN.
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Circuit Description
A shorted high-side MOSFET condition is detected
when SW voltage exceeds ~0.7 V while the low-side
www.fairchildsemi.com
10
Application Information
The OV and high-side short fault protections are active
all the time, including during soft-start.
Bias Supply
The FAN2106 requires a 5 V supply rail to bias the IC
and provide gate-drive energy. Connect a ≥ 1.0 µf X5R
or X7R decoupling capacitor between VCC and PGND.
Over-Temperature Protection (OTP)
The chip incorporates an over-temperature protection
circuit that sets the fault latch when a die temperature of
about 150°C is reached. The IC restarts when the die
temperature falls below 125°C.
Since VCC is used to drive the internal MOSFET gates,
supply current is frequency and voltage dependent.
Approximate VCC current (ICC) can be calculated using:
Auto-Restart
ICC (mA ) = 4.58 + [(
After a fault, EN pin is discharged by a 1 µA current sink
to a 1.1 V threshold before the internal 800 KΩ pull-up is
restored. A new soft-start cycle begins when EN
charges above 1.35 V.
Setting the Output Voltage
The output voltage of the regulator can be set from
0.8 V to 80% of VIN by an external resistor divider (R1
and RBIAS in Figure 1). For output voltages > 5 V, output
current rating may need to be de-rated depending upon
the ambient temperature, power dissipated in the
package and the PCB layout.
Table 1. Fault / Restart Configurations
Controller / Restart State
Pull to GND
Pull-up to VCC with
100 K
Open
OFF (Disabled)
No Restart – Latched OFF
(After VCC Comes Up)
Immediate Restart After Fault
New Soft-Start Cycle After:
tDELAY (ms)=3.9 • C(nf)
Cap. to GND
The external resistor divider is calculated using:
V
− 0 .8 V
0. 8 V
= OUT
+ 650nA
RBIAS
R1
(2)
Connect RBIAS between FB and AGND.
If R1 is open (see Figure 1), the output voltage is not
regulated eventually causing a latched fault after the soft
start is complete (T1.0)
When EN is left open, restart is immediate.
If auto-restart is not desired, tie the EN pin to the VCC
pin or pull it HIGH after VCC comes up with a logic gate
to keep the 1 µA current sink from discharging EN to
1.1 V. Figure 23 shows one method to pull up EN to VCC
for a latch configuration.
If the parallel combination of R1 and RBIAS is ≤ 1KΩ, the
internal SS ramp is not released and the regulator does
not start.
Setting the Switching Frequency
Switching frequency is determined by an external resistor,
RT, connected between the R(T) pin and AGND:
15 VCC
100K
(1)
where frequency (f) is expressed in KHz.
Depending on the external circuit, the FAN2106 can be
configured to remain latched-off or to automatically
restart after a fault.
EN Pin
VCC − 5
+ 0.013) • ( f − 128)]
227
R T ( KΩ ) =
FAN2106
(10 6 / f ) − 135
65
(3)
where RT is in KΩ and frequency (f) is in KHz.
14 EN
The regulator cannot start if RT is left open.
Calculating the Inductor Value
Typically the inductor value is chosen based on ripple
current (ΔIL), which is chosen between 10 to 35% of the
maximum DC load. Regulator designs that require fast
transient response use a higher ripple-current setting,
while regulator designs that require higher efficiency
keep ripple current on the low side and operate at a
lower switching frequency. The inductor value is
calculated by the following formula:
3.3n
Figure 23.
Enable Control with Latch Option
Power-Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW when
VOUT is out of regulation, as measured at the FB pin.
Thresholds are specified in the Electrical Specifications
section. PGOOD does not assert HIGH until the fault
latch is enabled (T1.0) (see Figure 22).
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
ΔIL =
VOUT • (1 - D)
L•f
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
MOSFET is fully enhanced. The fault latch is set
immediately upon detection.
(4)
where f is the switching frequency.
www.fairchildsemi.com
11
RRAMP resistor plays a critical role in the design by
providing charging current to the internal ramp capacitor
and also serving as a means to provide input voltage
feedforward.
VRILIM = 10µA*RILIM
To calculate RILIM:
RRAMP is calculated by the following formula:
RRAMP ( KΩ ) =
(VIN − 1.8) • VOUT
(18 ) • VIN • f • 10 − 6
RILIM = VRILIM/ 10µA
−2
(5)
For wide input operation, first calculate RRAMP for the
minimum and maximum input voltage conditions and
use larger of the two values calculated.
RILIM = (VBOT + VRMPEAK)/ 10µA
In all applications, current through the RRAMP pin must
be greater than 10 µA from the equation below for
proper operation:
VIN − 1.8
≥ 10 μA
RRAMP + 2
VBOT = 0.96 + (ILOAD * RDSON *KT*8);
VRMPEAK = D*(VIN – 1.8)/(fSW*0.03*RRAMP);
ILOAD = the desired maximum load current;
RDSON = the nominal RDSON of the low-side MOSFET;
KT = the normalized temperature coefficient for the
low-side MOSFET (on datasheet graph);
D = VOUT/VIN duty cycle;
The current limit system involves two comparators. The
MAX ILIMIT comparator is used with a VILIM fixed-voltage
reference and represents the maximum current limit
allowable. This reference voltage is temperature
compensated to reflect the RDSON variation of the lowside MOSFET. The ADJUST ILIMIT comparator is used
where the current limit needs to be set lower than the
VILIM fixed reference. The 10 µA current source does not
track the RDSON changes over temperature, so change is
added into the equations for calculating the ADJUST
ILIMIT comparator reference voltage, as is shown below.
Figure 24 shows a simplified schematic of the overcurrent system.
fSW = Clock frequency in kHz; and
RRAMP = chosen ramp resistor value in kΩ.
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling VCC or EN restores operation after a
normal soft-start cycle (refer to the Auto-Restart
section).
The over-current protection fault latch is active during
the soft-start cycle. Use 1% resistor for RILIM.
PWM
COMP
PWM
VCC
VILIM
+
_
(10)
where:
(6)
Setting the Current Limit
VERR
(9)
RILIM = {0.96 + (ILOAD * RDSON *KT*8)} +
{D*(VIN – 1.8)/(fSW*0.03*RRAMP)}/10µA
If the calculated RRAMP values in Equation (5) result in a
current less than 10 µA, use the RRAMP value that
satisfies Equation (6). In applications with large input
ripple voltage, the RRAMP resistor should be adequately
decoupled from the input voltage to minimize ripple on
the RAMP pin.
+
_
(8)
The voltage VRILIM is made up of two components, VBOT
(which relates to the current through the low-side
MOSFET) and VRMPEAK (which relates to the peak
current through the inductor). Combining those two
voltage terms results in:
where frequency (f) is expressed in KHz.
RAMP
(7)
MAX
ILIMIT
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Since the ILIM voltage is set by a 10 µA current source
into the RILIM resistor, the basic equation for setting the
reference voltage is:
Setting the Ramp Resistor Value
10µA
ILIM
+
_
ADJUST
ILIMIT
ILIMTRIP
RILIM
Figure 24. Current-Limit System Schematic
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
www.fairchildsemi.com
12
Recommended PCB Layout
The loop is compensated using a feedback network
around the error amplifier. Figure 25 shows a complete
Type-3
compensation
network.
For
Type-2
compensation, eliminate R3 and C3.
Good PCB layout and careful attention to temperature
rise is essential for reliable operation of the regulator.
Four-layer PCB with two-ounce copper on the top and
bottom sides and thermal vias connecting the layers are
recommended. Keep power traces wide and short to
minimize losses and ringing. Do not connect AGND to
PGND below the IC. Connect the AGND pin to PGND at
the output OR to the PGND plane.
SW
GND
Figure 25. Compensation Network
Since the FAN2106 employs a summing current-mode
architecture, Type-2 compensation can be used for
many applications. For applications that require wide
loop bandwidth and/or use very low-ESR output
capacitors, Type-3 compensation may be required.
VOUT
Figure 26. Recommended PCB Layout
RRAMP also provides feedforward compensation for
changes in VIN. With a fixed RRAMP value, the modulator
gain increases as VIN is reduced; this could make it
difficult to compensate the loop. For low-input-voltagerange designs (3 V to 8 V), RRAMP and the compensation
component values are different compared to designs
with VIN between 8 V and 24 V.
Application note AN-8022 (TinyCalc™) can be used to
calculate the compensation components.
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
VIN
GND
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Loop Compensation
www.fairchildsemi.com
13
2X
TOP VIEW
2X
RECOMMENDED LAND PATTERN
ALL VALUES TYPICAL EXCEPT WHERE NOTED
SIDE VIEW
SEATING
PLANE
OPTIONAL LEAD DESIGN
(LEADS# 1, 24 & 25 ONLY)
SCALE: 1.5X
A) DIMENSIONS ARE IN MILLIMETERS.
B) DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) DESIGN BASED ON JEDEC MO-220
VARIATION WJHC
E) TERMINALS ARE SYMMETRICAL AROUND THE
X & Y AXIS EXCEPT WHERE DEPOPULATED.
F) DRAWING FILENAME: MKT-MLP25AREV3
BOTTOM VIEW
Figure 27. 5x6mm Molded Leadless Package (MLP)
FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2
www.fairchildsemi.com
14
FAN2106 — TinyBuck™ 3-24V Input, 6A, High Efficiency, Integrated Synchronous Buck Regulator
15
www.fairchildsemi.com
© 2009 Fairchild Semiconductor Corporation
FAN2106 • Rev. 1.1.2