STMICROELECTRONICS LNBP11SP

LNBP10 SERIES
LNBP20

LNB SUPPLY AND CONTROL VOLTAGE
REGULATOR (PARALLEL INTERFACE)
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■
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■
■
■
■
■
■
■
■
COMPLETE INTERFACE FOR TWO LNBs
REMOTE SUPPLY AND CONTROL
LNB SELECTION AND STAND-BY FUNCTION
BUILT-IN TONE OSCILLATOR FACTORY
TRIMMED AT 22KHz
FAST OSCILLATOR START-UP
FACILITATES DiSEqC ENCODING
TWO SUPPLY INPUTS FOR LOWEST
DISSIPATION
BYPASS FUNCTION FOR SLAVE
OPERATION
LNB SHORT CIRCUIT PROTECTION AND
DIAGNOSTIC
AUXILIARY MODULATION INPUT EXTENDS
FLEXIBILITY
CABLE LENGTH COMPENSATION
INTERNAL OVER TEMPERATURE
PROTECTION
BACKWARD CURRENT PROTECTION
DESCRIPTION
Intended for analog and digital satellite receivers,
the LNBP is a monolithic linear voltage regulator,
assembled in Multiwatt-15, PowerSO-20 and
PowerSO-10, specifically designed to provide the
powering voltages and the interfacing signals to
the LNB downconverter situated in the antenna
via the coaxial cable. Since most satellite
receivers have two antenna ports, the output
voltage of the regulator is available at one of two
logic-selectable output pins (LNBA, LNBB). When
the IC is powered and put in Stand-by (EN pin
LOW), both regulator outputs are disabled to
allow the antenna downconverters to be
supplied/controlled by others satellite receivers
sharing the same coaxial lines. In this occurrence
the device will limit at 3 mA (max) the backward
current that could flow from LNBA and LNBB
output pins to GND.
For slave operation in single dish, dual receiver
systems, the bypass function is implemented by
an electronic switch between the Master Input pin
(MI) and the LNBA pin, thus leaving all LNB
powering and control functions to the Master
Receiver. This electronic switch is closed when
the device is powered and EN pin is LOW.
September 1998
Multiwatt-15
10
1
PowerSo-20
PowerSO-10
The regulator outputs can be logic controlled to
be 13 or 18 V (typ.) by mean of the VSEL pin for
remote controlling of LNBs. Additionally, it is
possible to increment by 1V (typ.) the selected
voltage value to compensate the excess voltage
drop along the coaxial cable (LLC pin HIGH).
In order to reduce the power dissipation of the
device when the lowest output voltage is
selected, the regulator has two Supply Input pins
VCC1 and VCC2. They must be powered
respectively at 16V (min) and 23V (min), and an
internal switch automatically will select the
suitable supply pin according to the selected
output voltage. If adequate heatsink is provided
and higher power losses are acceptable, both
supply pins can be powered by the same 23V
source without affecting any other circuit
performance.
The ENT (Tone Enable) pin activates the internal
oscillator so that the DC output is modulated by a
±0.3 V, 22KHz (typ.) square wave. This internal
oscillator is factory trimmed within a tolerance of
±2KHz, thus no further adjustments neither
external components are required.
A burst coding of the 22KHz tone can be
1/18
LNBP10 SERIES - LNBP20
accomplished thanks to the fast response of the
ENT input and the prompt oscillator start-up. This
helps designers who want to implement the
DiSEqC protocols (*).
In order to improve design flexibility and to allow
implementation of newcoming LNB remote
control standards, an analogic modulation input
pin is available (EXTM). An appropriate DC
blocking capacitor must be used to couple the
modulating signal source to the EXTM pin. When
external modulation is not used, the relevant pin
can be left open.
Two pins are dedicated to the overcurrent
protection/monitoring: CEXT and OLF. The
overcurrent protection circuit works dynamically:
as soon as an overload is detected in either LNB
output, the output is shut-down for a time Toff
determined by the capacitor connected between
CEXT and GND. Simultaneously the OLF pin,
that is an open collector diagnostic output flag,
from HIGH IMPEDANCE state goes LOW. After
the time has elapsed, the output is resumed for a
time ton=1/15toff (typ.) and OLF goes in HIGH
IMPEDANCE. If the overload is still present, the
protection circuit will cycle again through t off and
ton until the overload is removed. Typical ton+toff
value is 1200ms when a 4.7µF external capacitor
is used.
This dynamic operation can greatly reduce the
power dissipation in short circuit condition, still
ensuring excellent power-on start up even with
highly capacitive loads on LNB outputs.
The device is packaged in Multiwatt15 for
thru-holes mounting and in PowerSO-20 for
surface mounting. When a limited functionality in
a smaller package matches design needs, a
range of cost-effective PowerSO-10 solutions is
also offered. All versions have built-in thermal
protection against overheatingdamage.
(*): External components are needed to comply to level 2.x and above (bidirectional) DiSEqC bus hardware requirements. DiSEqC is
a trademark of EUTELSAT.
ORDERING NUMBERS
Type
LNBP10
LNBP11
LNBP12
LNBP13
LNBP14
LNBP15
LNBP16
LNBP20
Multiwatt-15
PowerSO-20
PowerSO-10
LNBP10SP
LNBP11SP
LNBP12SP
LNBP13SP
LNBP14SP
LNBP15SP
LNBP16SP
LNBP20CR
LNBP20PD
PIN CONFIGURATIONS
Multiwatt-15
2/18
PowerSO-20
PowerSO-10
LNBP10 SERIES - LNBP20
TABLE A: PIN CONFIGURATIONS
SYMBOL
NAME
FUNCTION
PIN NUMBER vs SALES TYPE (LNBP)
20CR 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP
V CC1
Supply Input 1
15V to 25V supply. It is
automatically selected
when VOUT = 13 or 14V
1
2
1
1
1
1
1
1
1
V CC2
Supply Input 2
22V to 25V supply. It is
automatically selected
when VOUT = 18 or 19V
2
3
2
2
2
2
2
2
2
LNBA
Output Port
See truth tables for voltage
and port selection. In
stand-by mode this port is
powered by the MI pin via
the internal Bypass Switch
3
4
3
3
3
3
3
3
3
VSEL
Output Voltage
Selection: 13 or
18V (typ)
Logic control input: See
truth table
4
5
4
4
4
4
4
4
4
EN
Port Enable
Logic control input: See
truth table
5
6
5
5
5
5
5
5
5
OSEL
Port Selection
Logic control input: See
truth table
7
7
9
NA
NA
NA
NA
NA
NA
GND
G round
Circuit Ground. It is
internally connected to the
die frame
8
1
10
11
20
6
6
6
6
6
6
6
ENT
22 KHz Tone
Enable
Logic control input: See
truth table
9
13
7
7
7
7
7
7
7
CEXT
External Capacitor
Timing capacitor used by
the Dynamic Overload
Protection. Typical
application is 4.7 µF for a
1200 ms cycle
10
14
8
8
8
8
8
8
8
EXTM
External
Modulation
External Modulation Input.
Needs DC decoupling to
the AC source. If not used,
can be left open.
11
15
NA
NA
NA
9
NA
9
9
12
16
NA
NA
9
NA
9
NA
10
LLC
Line Length
Logic control input: See
Compens. (1V typ) truth table
OLF
Over Load F lag
Logic output (open
Collector). Normally in
HIGH IMPEDANCE, goes
LOW when current or
thermal overload occurs.
13
17
NA
9
NA
NA
10
10
NA
MI
Master Input
In stand-by mode, the
voltage on MI is routed to
LNBA pin. Can be left
open if bypass function is
not needed
14
18
NA
10
10
10
NA
NA
NA
LNBB
Output Port
See truth tables for voltage
and port selection.
15
19
10
NA
NA
NA
NA
NA
NA
NOTE: The limited pin availability of the PowerSO-10 package leads to drop some functions.
3/18
LNBP10 SERIES - LNBP20
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Vi
DC Input Voltage (VCC1, VCC2, MI)
Io
Output Current (LNBA, LNBB)
Vi
Logic Input Voltage (ENT, EN, OSEL, VSEL, LLC)
Value
Unit
28
V
Internally limited
I SW
Bypass Switch Current
Pt ot
Power Dissipation at Tcase < 85 C
o
-0.5 to 7
V
900
mA
14
W
T stg
Storage Temperature Range
- 40 to 150
o
To p
Operating Junction Temperature Range
- 40 to 125
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions
is not implied
THERMAL DATA
Symbol
Parameter
Value
R t hj- case Thermal Resistance Junction-case
Unit
o
2
LOGIC CONTROLS TRUTH TABLES
Control I/O
Pin Name
L
OUT
O LF
I OUT > I OMAX or Tj > 150 C
I OUT < I OMAX
IN
ENT
22KHz tone O FF
22KHz tone ON
IN
EN
See table below
See table below
IN
OSEL
See table below
See table below
IN
VSEL
See table below
See table below
IN
LLC
See table below
See table below
VLNBB
EN
OSEL
VSEL
LLCP
VLNBA
L
X
X
X
V MI -0.4V (typ.)
Disabled
H
L
L
L
13V (typ.)
Disabled
H
L
H
L
18V (typ.)
Disabled
H
L
L
H
14V (typ.)
Disabled
H
L
H
H
19V (typ.)
Disabled
H
H
L
L
Disabled
13V (typ.)
H
H
H
L
Disabled
18V (typ.)
H
H
L
H
Disabled
14V (typ.)
H
H
H
H
Disabled
19V (typ.)
NOTE: All logic input pins have internal pull-down resistor (typ. = 250KΩ)
4/18
H
O
C/W
LNBP10 SERIES - LNBP20
BLOCK DIAGRAM
5/18
LNBP10 SERIES - LNBP20
ELECTRICAL CHARACTERISTICS FOR LNBP SERIES (Tj = 0 to 85 oC, Ci = 0.22 µF, Co = 0.1 µF,
EN=H, ENT=L, LLC= L, VIN1 = 16V, VIN2 = 23V, IOUT = 50mA, (unless otherwise specified)
Symbol
Test Conditions
Min.
Max.
Unit
V IN1
VCC1 Supply Voltage
Parameter
IO = 500mA, ENT=H, VSEL=L, LLC=L
IO = 500mA, ENT=H, VSEL=L, LLC=H
15
16
25
25
V
V
V IN2
VCC2 Supply Voltage
IO = 500mA, ENT=VSEL=H, LLC=L
IO = 500mA, ENT=VSEL=H, LLC=H
22
23
25
25
V
V
V O1
Output Voltage
IO = 500 mA, VSEL=H, LLC=L
IO = 500 mA, VSEL=H, LLC=H
17.3
18
19
18.7
V
V
V O2
Output Voltage
IO = 500 mA, VSEL=L, LLC=L
IO = 500 mA, VSEL=L, LLC=H
12.5
13
14
13.5
V
V
∆V O
Line Regulation
VIN1 = 15 to 18 V, VOUT = 13 V
VIN2 = 22 to 25 V, VOUT = 18 V
4
4
40
40
mV
mV
∆V O
Load Regulation
VIN1 = VIN2 = 22 V, VOUT = 13 or 18V,
IO = 50 to 500 mA
80
180
mV
SVR
Supply Voltage Rejection
VIN1 = VIN2 = 23 ± 0.5Vac, fac = 50 KHz
45
I MAX
Output Current Limiting
t OFF
Dynamic Overload Protection
OFF Time
tON
500
Typ.
650
dB
800
mA
Output shorted, CEXT = 4.7µF
1100
ms
Dynamic Overload Protection
ON Time
Output shorted, CEXT = 4.7µF
t OFF /15
ms
F TONE
Tone Frequency
ENT=H
20
22
24
KHz
A TONE
Tone Amplitude
ENT=H
0.4
0.6
0.8
Vpp
D T ONE
Tone Duty Cucle
ENT=H
40
50
60
%
Tone Rise or Fall Time
ENT=H
5
10
15
µs
G EXT M
External Modulation Gain
∆VOUT/∆VEXTM, f = 10Hz to 40KHz
V EXTM
External Modulation Input
Voltage
External Modulation
Impedance
AC Coupling
400
mV pp
f = 10Hz to 40KHz
400
Bypass Switch Voltage Drop
(MI to LNBA)
Overload Flag Pin Logic Low
EN=L, ISW= 300mA, VCC2-VMI = 4V
0.35
0.6
IOL = 8mA
0.28
0.5
V
VOH = 6V
10
µA
0.8
V
tr, tf
Z EXT M
V SW
V OL
V IL
Overload Flag Pin OFF State
Leakage Current
Control Input Pin Logic Low
VI H
Control Input Pin Logic High
I OZ
5
Ω
2.5
V
V
µA
I IH
Control Pins Input Current
VIH = 5V
20
I CC
Supply Current
Outputs Disabled (EN=L)
0.3
I CC
Supply Current
ENT=H, IOUT = 500 mA
3.1
6
mA
I OBK
Output Backward Current
EN=L, VLNBA = VLNBB = 18V
VIN1 = VIN2 = 22V or floating
0.2
3
mA
T SHDN
6/18
Thermal Shutdown Threshold
150
1
mA
o
C
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified T j=25oC)
Output Voltage vs Output Current
Tone Frequency vs Temperature
Tone Duty Cycle vs Temperature
Tone Rise Time vs Temperature
Tone Fall Time vs Temperature
Tone Amplitude vs Temperature
7/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
S.V.R. vs Frequency
LNBA External Modulation Gain vs Frequency
External Modulation vs Temperature
Bypass Switch Drop vs Output Current
Bypass Switch Drop vs Output Current
Overload Flag pin Logic Low vs Flag Current
8/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Supply Current vs Temperature
Supply Current vs Temperature
Dynamic Overload protection (ISC vs Time)
Tone Enable
Tone Disable
22 KHz Tone
9/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Enable Time
Disable Time
18V to 13V Change
13V to 18V Change
10/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS
TWO ANTENNA PORTS RECEIVER
MCU+V
17V
24V
10uF
C2
AUX DATA
ANT CONNECTORS
11
EXTM
R1
47K
13
4
9
5
7
12
OLF
VSEL
ENT
EN
OSEL
LLC
VCC1
VCC2
LNBA
LNBB
MI
CEXT
1
2
JA
3
15
14
JB
TUNER
10
4.7µF C1
+
GND
C3
C5
C6
8
2x 0.1µF
LNBP20CR
Vcc
C4
2x 47nF
I/Os
I/Os
MCU
SINGLE ANTENNA RECEIVER WITH MASTER RECEIVER PORT
17V
MCU+V
24V
10uF
C2
AUX DATA
11
EXTM
R1
47K
13
4
9
5
7
12
OLF
VSEL
ENT
EN
OSEL
LLC
VCC1
VCC2
LNBA
LNBB
MI
CEXT
1
2
ANT
3
15
14
4.7µF C1
+
GND
TUNER
C3
C4
C5
47nF
8
2x 0.1µF
LNBP20CR
Vcc
MASTER
10
I/Os
I/Os
MCU
11/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS (continued)
USING SERIAL BUS TO SAVE MPU I/Os
17V
24V
MCU+V
ANT
CONNECTORS
C2
R1
11
AUX DATA
EXTM
47K
VCC1
VCC2
10uF
13
1
2
3
15
STR
D
CLK
OE
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
QS
QS
4
5
6
7
14
13
12
11
LNBA
LNBB
MI
OLF
4
9
5
7
12
VSEL
CEXT
ENT
EN
OSEL
LLC
1
2
JA
3
15
14
JB
TUNER
10
4.7µF C1
+
GND
C3
C4
C5
C6
8
2x 0.1µF
LNBP20CR
2x 47nF
9
10
4094
SERIAL
BUS
MCU+V
I/Os
Vcc
MCU
TWO ANTENNA PORTS RECEIVER: LOW COST SOLUTION
17V
24V
ANT CONNECTORS
VCC1
VCC2
LNBA
LNBB
1
2
JA
3
10
JB
4
7
5
9
VSEL
ENT
CEXT
8
TUNER
4.7µF
EN
OSEL
GND
C1
+
C3
C4
C5
C6
6
2x 0.1µF
LNBP10SP
2x 47nF
MCU+V
Vcc
I/Os
I/Os
MCU
12/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS (continued)
CONNECTING TOGETHER VCC1 AND VCC2
24V
ANT CONNECTORS
VCC1
VCC2
LNBA
LNBB
1
2
JA
3
10
JB
4
7
5
9
CEXT
VSEL
ENT
EN
OSEL
8
TUNER
C1
+
4.7µF
GND
C4
C5
C6
6
0.1µF
LNBP10SP
2x 47nF
MCU+V
Vcc
I/Os
I/Os
MCU
SINGLE ANTENNA RECEIVER WITH MASTER RECEIVER PORT: LOW COST SOLUTION
17V
24V
C2
9
AUX DATA
EXTM
10µF
VCC1
VCC2
1
2
ANT
3
LNBA
MI
4
7
5
VSEL
ENT
CEXT
10
MASTER
TUNER
8
4.7µF
EN
C1
+
C3
6
C4
C5
47nF
GND
2x 0.1µF
LNBP13SP
MCU+V
Vcc
I/Os
I/Os
MCU
13/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS (continued)
SINGLE ANTENNA RECEIVER WITH OVERLOAD DIAGNOSTIC
17V
24V
MCU+V
C2
9
AUX DATA
R1
EXTM
10µF
10
47K
4
7
5
VCC1
VCC2
LNBA
1
2
3
ANT
OLF
VSEL
ENT
EN
CEXT
8
TUNER
4.7µF
GND
C4
C5
47nF
2x 0.1µF
I/Os
I/Os
MCU
14/18
C3
6
LNBP15SP
Vcc
C1
+
LNBP10 SERIES - LNBP20
MULTIWATT-15 MECHANICAL DATA
DIM.
A
B
C
D
E
F
G
G1
H1
H2
L
L1
L2
L3
L4
L7
M
M1
S
S1
Dia1
MIN.
mm
TYP.
MAX.
5
2.65
1.6
MIN.
0.55
0.75
1.52
18.03
0.019
0.026
0.040
0.690
0.772
1
0.49
0.66
1.02
17.53
19.6
21.9
21.7
17.65
17.25
10.3
2.65
4.25
4.63
1.9
1.9
3.65
1.27
17.78
22.2
22.1
17.5
10.7
4.55
5.08
inch
TYP.
MAX.
0.197
0.104
0.063
0.039
20.2
22.5
22.5
18.1
17.75
10.9
2.9
4.85
5.53
2.6
2.6
3.85
0.862
0.854
0.695
0.679
0.406
0.104
0.167
0.182
0.075
0.075
0.144
0.050
0.700
0.874
0.870
0.689
0.421
0.179
0.200
0.022
0.030
0.060
0.710
0.795
0.886
0.886
0.713
0.699
0.429
0.114
0.191
0.218
0.102
0.102
0.152
0016036
15/18
LNBP10 SERIES - LNBP20
PowerSO-20 MECHANICAL DATA
DIM.
mm
TYP.
MIN.
A
a1
a2
a3
b
c
D (1)
E
e
e3
E1 (1)
E2
G
h
L
N
S
T
MAX.
3.60
0.30
3.30
0.10
0.53
0.32
16.00
14.50
0.10
0
0.40
0.23
15.80
13.90
inch
TYP.
MIN.
MAX.
0.1417
0.0118
0.1299
0.0039
0.0209
0.0126
0.6299
0.570
0.0039
0
0.0157
0.009
0.6220
0.5472
1.27
11.43
0.050
0.450
10.90
11.10
2.90
0.10
1.10
1.10
0
0.80
0.4291
0.437
0.1141
0.0039
0.0433
0.0433
0
0.0314
10o (max.)
8o (max.)
10.0
0.3937
(1) ”D and E1” do not include mold flash or protusions
- Mold flash or protusions shall not exceed 0.15mm (0.006”)
N
R
N
a2
b
DETAILA
A
e
c
a1
DETAILB
E
e3
D
DETAILA
lead
20
11
slug
a3
DETAILB
E2
E1
0.35
Gage Plane
T
-C-
S
L
SEATING PLANE
G
C
(COPLANARITY)
1
10
PSO20MEC
h x 45°
0056635
16/18
LNBP10 SERIES - LNBP20
PowerSO-10 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
3.35
3.65
0.132
0.144
A1
0.00
0.10
0.000
0.004
B
0.40
0.60
0.016
0.024
c
0.35
0.55
0.013
0.022
D
9.40
9.60
0.370
0.378
D1
7.40
7.60
0.291
0.300
E
9.30
9.50
0.366
0.374
E1
7.20
7.40
0.283
0.291
E2
7.20
7.60
0.283
0.300
E3
6.10
6.35
0.240
0.250
E4
5.90
6.10
0.232
e
1.27
0.240
0.050
F
1.25
1.35
0.049
0.053
H
13.80
14.40
0.543
0.567
1.80
0.047
h
0.50
L
0.002
1.20
q
1.70
0.067
o
α
0.071
8o
0
B
0.10 A B
10
5
e
0.25
B
=
=
=
E4
=
=
=
1
E1
=
E3
=
E2
=
E
=
=
=
H
6
SEATING
PLANE
DETAIL ”A”
A
C
M
Q
h
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
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