LNBP20 / LNBP1X series LNBP supply and control voltage regulator (parallel interface) Feature summary ■ Complete interface for two LNBs remote supply and control ■ LNB selection and stand-by function ■ Built-in tone oscillator factory trimmed at 22KHz 10 1 TM ■ Fast oscillator start-up facilitates DiSEqC encoding ■ Two supply inputs for lowest dissipation ■ Bypass function for slave operation ■ LNB short circuit protection and diagnostic ■ Auxiliary modulation input extends flexibility ■ Cable length compensation ■ Internal over temperature protection ■ Backward current protection PowerSO-20 Description Intended for analog and digital satellite receivers, the LNBP is a monolithic linear voltage regulator, assembled in PowerSO-20 and PowerSO-10, specifically designed to provide the powering voltages and the interfacing signals to the LNB downconverter situated in the antenna PowerSO-10 via the coaxial cable. Since most satellite receivers have two antenna ports, the output voltage of the regulator is available at one of two logic-selectable output pins (LNBA, LNBB). When the IC is powered and put in Stand-by (EN pin LOW), both regulator outputs are disabled to allow the antenna downconverters to be supplied/controlled by others satellite receivers sharing the same coaxial lines. In this occurrence the device will limit at 3 mA (max) the backward current that could flow from LNBA and LNBB output pins to GND. (See continuous description). Order codes Part number PowerSO-20 PowerSO-10 LNBP10 LNBP10SP-TR LNBP11 LNBP11SP-TR LNBP12 LNBP12SP-TR LNBP13 LNBP13SP-TR LNBP14 LNBP14SP-TR LNBP15 LNBP15SP-TR LNBP16 LNBP16SP-TR LNBP20 May 2007 Package LNBP20PD-TR Rev. 10 1/24 www.st.com 24 LNBP20 / LNBP1X series Contents 1 Description (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 2/24 LNBP20 / LNBP1X series 1 Description (continued) Description (continued) For slave operation in single dish, dual receiver systems, the bypass function is implemented by an electronic switch between the Master Input pin (MI) and the LNBA pin, thus leaving all LNB powering and control functions to the Master Receiver. This electronic switch is closed when the device is powered and EN pin is LOW. The regulator outputs can be logic controlled to be 13 or 18 V (typ.) by mean of the VSEL pin for remote controlling of LNBs. Additionally, it is possible to increment by 1V (typ.) the selected voltage value to compensate the excess voltage drop along the coaxial cable (LLC pin HIGH). In order to reduce the power dissipation of the device when the lowest output voltage is selected, the regulator has two Supply Input pins VCC1 and VCC2. They must be powered respectively at 16V (min) and 23V (min), and an internal switch automatically will select the suitable supply pin according to the selected output voltage. If adequate heatsink is provided and higher power losses are acceptable, both supply pins can be powered by the same 23V source without affecting any other circuit performance. The ENT (Tone Enable) pin activates the internal oscillator so that the DC output is modulated by a ±0.3 V, 22KHz (typ.) square wave. This internal oscillator is factory trimmed within a tolerance of ±2KHz, thus no further adjustments neither external components are required. A burst coding of the 22KHz tone can be accomplished thanks to the fast response of the ENT input and the prompt oscillator start-up. This helps designers who want to implement the DiSEqCTM protocols (a). In order to improve design flexibility and to allow implementation of newcoming LNB remote control standards, an analogic modulation input pin is available (EXTM). An appropriate DC blocking capacitor must be used to couple the modulating signal source to the EXTM pin. When external modulation is not used, the relevant pin can be left open. Two pins are dedicated to the overcurrent protection/monitoring: CEXT and OLF. The overcurrent protection circuit works dynamically: as soon as an overload is detected in either LNB output, the output is shut-down for a time toff determined by the capacitor connected between CEXT and GND. Simultaneously the OLF pin, that is an open collector diagnostic output flag, from HIGH IMPEDANCE state goes LOW. After the time has elapsed, the output is resumed for a time ton=1/15toff (typ.) and OLF goes in HIGH IMPEDANCE. If the overload is still present, the protection circuit will cycle again through toff and ton until the overload is removed. Typical ton+toff value is 1200ms when a 4.7µF external capacitor is used. This dynamic operation can greatly reduce the power dissipation in short circuit condition, still ensuring excellent power-on start up even with highly capacitive loads on LNB outputs. The device is packaged in PowerSO-20 for surface mounting. When a limited functionality in a smaller package matches design needs, a range of cost-effective PowerSO-10 solutions is also offered. All versions have built-in thermal protection against overheating damage. a. External components are needed to comply to level 2.x and above (bidirectional) DiSEqCTM bus hardware requirements. DiSEqCTM is a trademark or EUTELSAT. 3/24 Pin configuration LNBP20 / LNBP1X series 2 Pin configuration Figure 1. Pin connections (top view) PowerSO-20 Table 1. PowerSO-10 Pin Description PIN NUMBER vs SALES TYPE (LNBP) SYMBOL NAME FUNCTION 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP VCC1 15V to 25V supply. It is Supply input automatically selected 1 when VOUT= 13 or 14V 2 1 1 1 VCC2 22V to 25V supply. It is Supply input automatically selected 2 when VOUT= 18 or 19V 3 2 2 2 4 3 3 1 1 1 2 2 2 2 3 3 3 3 3 LNBA Output port See truth table voltage and port selection. In stand-by mode this port is powered by the MI pin via the internal bypass switch VSEL Output voltage selection:13 or 18V (typ) Logic control input: see truth table 5 4 4 4 4 4 4 4 EN Port enable Logic control input: see truth table 6 5 5 5 5 5 5 5 OSEL Port selection Logic control input: see truth table 7 9 NA NA NA NA NA NA Ground Circuit ground. It is internally connected to the die frame 1 10 11 20 6 6 6 6 6 6 6 GND 4/24 LNBP20 / LNBP1X series Table 1. Pin configuration Pin Description PIN NUMBER vs SALES TYPE (LNBP) SYMBOL NAME FUNCTION 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP Logic control input: see truth table 13 7 7 7 7 7 7 7 External capacitor Timing capacitor used by the dynamic overload protection. Typical application is 4.7μF for a 1200ms cycle 14 8 8 8 8 8 8 8 EXTM External modulator External modulation input. Needs DC decoupling to the AC source. if not used, can be left open. 15 NA NA NA 9 NA 9 9 LLC Line length compens. (1V typ) Logic control input: see truth table 16 NA NA 9 NA 9 NA 10 Over load flag Logic output (open collector). Normally in HIGH IMPEDANCE, goes LOW when current or thermal overload occurs 17 NA 9 NA NA 10 10 NA In stand-by mode, the voltage on MI is routed to Master input LNBA pin. Can be left open if bypass function is not needed 18 NA 10 10 10 NA NA NA 19 10 NA NA NA NA NA NA ENT CEXT OLF MI LNBB Note: 22KHz tone enable Output port See truth tables for voltage and port selection The limited pin availability of the PowerSO-10 package leads to drop some functions. 5/24 Maximum ratings LNBP20 / LNBP1X series 3 Maximum ratings Table 2. Absolute maximum ratings Symbol Parameter VI DC Input voltage (VCC1, VCC2, MI) VO Output voltage IO Output current (LNBA, LNBB) VI Logic input voltage (ENT, EN OSEL, VSEL, LLC) Value Unit 28 V -0.3 to 28 V Internally Limited mA -0.5 to 7 V ISW Bypass switch current 900 mA PD Power dissipation at Tcase < 85°C 14 W Tstg Storage temperature range -40 to +150 °C Top Operating junction temperature range -40 to +125 °C Note: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied Table 3. Thermal data Symbol RthJC Table 4. PowerSO-20 PowerSO-10 Unit 2 2 °C/W Thermal resistance junction-case Logic Controls Truth Table CONTROL I/O PIN NAME L H OUT OLF IOUT > IOMAX or Tj > 150°C IOUT < IOMAX IN ENT 22KHz tone OFF 22KHz tone ON IN EN See Table Below See Table Below IN OSEL See Table Below See Table Below IN VSEL See Table Below See Table Below IN LLC See Table Below See Table Below EN OSEL VSEL LLCO VLNBA VLNBB L X X X VMI - 0.4V (typ.) Disabled H L L L 13V (typ.) Disabled H L H L 18V (typ.) Disabled H L L H 14V (typ.) Disabled H L H H 19V (typ.) Disabled H H L L Disabled 13V (typ.) H H H L Disabled 18V (typ.) H H L H Disabled 14V (typ.) H H H H Disabled 19V (typ.) Note: 6/24 Parameter All logic input pins have internal pull-down resistor (typ. = 250KW) LNBP20 / LNBP1X series 4 Diagram Figure 2. Block diagram Diagram 7/24 Electrical characteristics LNBP20 / LNBP1X series 5 Electrical characteristics Table 5. Electrical characteristics for LNBP Series (TJ = 0 to 85°C, CI = 0.22µF, CO = 0.1µF, EN=H, ENT=L, LLC=L, VIN1=16V, VIN2=23V IOUT=50mA, unless otherwise specified.) Symbol Parameter VIN1 VCC1 Supply voltage VIN2 VCC2 Supply voltage VO1 Output voltage VO2 Output voltage ΔVO Line regulation ΔVO Test conditions Min. IO = 500 mA, ENT=H, VSEL=L, LLC=L Max. Unit 15 25 V IO = 500 mA, ENT=H, VSEL=L, LLC=H 16 25 V IO = 500 mA, ENT=H, VSEL=L, LLC=L 22 25 V IO = 500 mA, VSEL=L, LLC=H 23 25 V IO = 500 mA, VSEL=H, LLC=L 17.3 18.7 V IO = 500 mA, VSEL=H, LLC=H IO = 500 mA, VSEL=L, LLC=L Typ. 18 19 12.5 13 V 13.5 V IO = 500 mA, VSEL=L, LLC=H 14 VIN1=15 to 18V, VOUT=13V 4 40 mV VIN2=22 to 25V, VOUT=18V 4 40 mV Load regulation VIN1=VIN2=22V, VOUT=13 or 18V IO = 50 to 500mA 80 180 mV SVR Supply voltage rejection VIN1 = VIN2 = 23 ± 0.5Vac, fac = 120 Hz, 45 IMAX Output current limiting tOFF Dynamic overload protection OFF time Output Shorted, CEXT = 4.7µF 1100 ms tON Dynamic overload protection ON time Output Shorted, CEXT = 4.7µF tOFF/15 ms fTONE Tone frequency ENT=H 20 22 24 KHz ATONE Tone amplitude ENT=H 0.55 0.72 0.9 VPP DTONE Tone duty cycle ENT=H 40 50 60 % Tone rise and fall time ENT=H 5 10 15 µs GEXTM External modulation gain ΔVOUT/ΔVEXTM, f = 10Hz to 40KHz VEXTM External modulation input voltage AC Coupling 400 mVPP ZEXTM External modulation impedance f = 10Hz to 40KHz 400 VSW Bypass switch voltage drop (MI to LNBA) EN=L, ISW=300mA, VCC2-VMI=4V 0.35 0.6 V VOL Overload flag pin logic LOW IOL=8mA 0.28 0.5 V IOZ Overload flag pin OFF state leakage current VOH = 6V 10 µA VIL Control input pin logic LOW 0.8 V tr, tf 8/24 500 650 V dB 800 mA 5 Ω LNBP20 / LNBP1X series Table 5. Symbol Electrical characteristics for LNBP Series (TJ = 0 to 85°C, CI = 0.22µF, CO = 0.1µF, EN=H, ENT=L, LLC=L, VIN1=16V, VIN2=23V IOUT=50mA, unless otherwise specified.) Parameter VIH Control input pin logic HIGH IIH Control pins input current ICC Supply current IOBK Output backward current TSHDN Electrical characteristics Temperature shutdown threshold Test conditions Min. Typ. Max. 2.5 Unit V VIH = 5V 20 Output Disabled (EN=L) 0.3 1 mA ENT=H, IOUT=500mA 3.1 6 mA EN=L, VLNBA = VLNBB = 18V VIN1 = VIN2 = 22V or floating 0.2 3 mA 150 µA °C 9/24 Typical characteristics LNBP20 / LNBP1X series 6 Typical characteristics Figure 3. (unless otherwise specified TJ = 25°C) Output voltage vs output current Figure 4. Tone duty cycle vs temperature Figure 5. Tone fall time vs temperature Figure 6. Tone frequency vs temperature Figure 7. Tone rise time vs temperature Figure 8. Tone amplitude vs temperature 10/24 LNBP20 / LNBP1X series Figure 9. S.V.R. vs Frequency Typical characteristics Figure 10. External modulation vs temperature Figure 11. Bypass switch drop vs output current Figure 12. LNBA External modulation gain vs frequency Figure 13. Bypass switch drop vs output current Figure 14. Overload flag pin logic low vs flag current 11/24 Typical characteristics LNBP20 / LNBP1X series Figure 15. Supply voltage vs temperature Figure 16. Supply voltage vs temperature Figure 17. Dynamic overload protection (ISC vs time) Figure 18. Tone enable Figure 19. Tone disable Figure 20. 22KHz Tone 12/24 LNBP20 / LNBP1X series Typical characteristics Figure 21. Enable time Figure 22. Disable time Figure 23. 18V to 13V Change Figure 24. 18V to 13V Change 13/24 Typical application schematics 7 LNBP20 / LNBP1X series Typical application schematics Figure 25. Two antenna ports receiver MCU+V 17V 24V 10uF C2 AUX DATA ANT CONNECTORS 11 EXTM R1 47K 13 4 9 5 7 12 OLF VSEL ENT EN OSEL LLC VCC1 VCC2 LNBA LNBB MI CEXT 1 2 JA 3 15 14 JB TUNER 10 4.7µF C1 + GND C3 C5 C6 8 2x 0.1µF LNBP20CR Vcc C4 2x 47nF I/Os I/Os MCU Figure 26. Single antenna receiver with master receiver port 17V MCU+V 24V 10uF C2 AUX DATA 11 EXTM R1 13 47K 4 9 5 7 12 OLF VSEL ENT EN OSEL LLC VCC1 VCC2 LNBA LNBB MI CEXT 1 2 ANT 3 15 14 4.7µF C1 + GND C3 C4 C5 47nF 2x 0.1µF I/Os I/Os MCU 14/24 TUNER 8 LNBP20CR Vcc MASTER 10 LNBP20 / LNBP1X series Typical application schematics Figure 27. Using serial bus to save MPU I/os 17V 24V MCU+V ANT CONNECTORS C2 R1 11 AUX DATA VCC1 VCC2 EXTM 47K 10uF 13 1 2 3 15 STR D CLK OE Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 QS QS 4 5 6 7 14 13 12 11 4 9 5 7 12 OLF LNBA LNBB MI VSEL CEXT ENT EN OSEL LLC 1 2 JA 3 15 14 JB TUNER 10 4.7µF C1 + GND C3 C4 C5 C6 8 2x 0.1µF LNBP20CR 2x 47nF 9 10 4094 SERIAL BUS MCU+V I/Os Vcc MCU Figure 28. Two antenna ports receiver - low cost solution 17V 24V ANT CONNECTORS VCC1 VCC2 LNBA LNBB 1 2 JA 3 10 JB 4 7 5 9 VSEL ENT EN CEXT 8 TUNER 4.7µF OSEL GND C1 + C3 C4 C5 C6 6 2x 0.1µF LNBP10SP 2x 47nF MCU+V Vcc I/Os I/Os MCU 15/24 Typical application schematics LNBP20 / LNBP1X series Figure 29. Connecting together VCC1 and VCC2 24V ANT CONNECTORS VCC1 VCC2 LNBA LNBB 1 2 JA 3 10 JB 4 7 5 9 CEXT VSEL ENT EN OSEL 8 TUNER C1 + 4.7µF GND C4 C5 C6 6 0.1µF LNBP10SP 2x 47nF MCU+V Vcc I/Os I/Os MCU Figure 30. Single antenna receiver with master receiver port - low cost solution 17V 24V C2 9 AUX DATA EXTM 10µF VCC1 VCC2 1 2 ANT 3 LNBA MI 4 7 5 VSEL ENT CEXT 10 MASTER TUNER 8 4.7µF C1 + EN C3 6 C4 C5 47nF GND 2x 0.1µF LNBP13SP MCU+V Vcc I/Os I/Os MCU 16/24 LNBP20 / LNBP1X series Typical application schematics Figure 31. Single antenna receiver with overload diagnostic 17V 24V MCU+V C2 9 AUX DATA R1 EXTM 10µF 10 47K 4 7 5 VCC1 VCC2 LNBA 1 2 3 ANT OLF VSEL ENT EN CEXT 8 TUNER 4.7µF C1 + GND C4 C5 47nF 6 2x 0.1µF LNBP15SP Vcc C3 I/Os I/Os MCU 17/24 Package mechanical data 8 LNBP20 / LNBP1X series Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 18/24 LNBP20 / LNBP1X series Package mechanical data PowerSO-20 MECHANICAL DATA DIM. A a1 a2 a3 b c D (1) E e e3 E1 (1) E2 E3 G H h L N S T mm. MIN. TYP inch MAX. 3.60 0.30 3.30 0.10 0.53 0.32 16.00 14.50 0.10 0 0.40 0.23 15.80 13.90 MIN. 0 0.0157 0.0090 0.6220 0.5472 0.0500 0.4500 11.10 2.90 6.2 0.10 15.9 1.10 1.10 10° 8° 5.8 0 15.5 0.80 0° 10.0 MAX. 0.1417 0.0118 0.1299 0.0039 0.0209 0.0013 0.630 0.5710 0.0039 1.27 11.43 10.90 TYP. 0.4291 0.4370 0.1141 0.2441 0.0039 0.6260 0.0433 0.0433 10° 8° 0.2283 0.0000 0.6102 0.0314 0° 0.3937 (1) “D and E1” do not include mold flash or protusions - Mold flash or protusions shall not exceed 0.15mm (0.006”) 0056635/I 19/24 Package mechanical data LNBP20 / LNBP1X series PowerSO-10 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 3.70 0.146 A1 0.10 0.004 A2 3.40 3.60 0.134 0.142 A3 1.25 1.35 0.049 0.053 b 0.40 0.53 0.016 0.021 c 0.35 0.55 0.014 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 0.299 E 13.80 14.40 0.543 0.567 E1 9.30 9.50 0.366 0.374 E2 7.20 7.60 0.283 0.299 E3 5.90 6.10 0.232 0.240 e 1.27 0.050 L 0.95 1.65 0.037 0.065 α 0° 8° 0° 8° 0068039-E 20/24 LNBP20 / LNBP1X series Package mechanical data Tape & Reel PowerSO-20 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 30.4 0.519 1.197 Ao 15.1 15.3 0.594 0.602 Bo 16.5 16.7 0.650 0.658 Ko 3.8 4.0 0.149 0.157 Po 3.9 4.1 0.153 0.161 P 23.9 24.1 0.941 0.949 W 23.7 24.3 0.933 0.957 21/24 Package mechanical data LNBP20 / LNBP1X series Tape & Reel PowerSO10 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 22/24 TYP 0.504 30.4 0.519 1.197 Ao 14.9 15.1 0.587 0.594 Bo 9.9 10.1 0.390 0.398 Ko 4.15 4.35 0.163 0.171 Po 3.9 4.1 0.153 0.161 P 23.9 24.1 0.941 0.949 W 23.7 24.3 0.933 0.957 LNBP20 / LNBP1X series Revision history 9 Revision history Table 6. Revision history Date Revision Changes 08-Jun-2004 7 Typing Error VO1 and VO2 on Table 6 - Page 6. 21-Dec-2004 8 Table 2 has been updated on GND row. 07-Sep-2006 9 Add value VO on table 2 and new template. 03-May-2007 10 Order codes has been updated. 23/24 LNBP20 / LNBP1X series Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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