STMICROELECTRONICS M74HC259

M54HC259
M74HC259
8 BIT ADDRESSABLE LATCH
.
.
.
.
.
.
.
.
HIGH SPEED
tPD = 15 ns (TYP.) at VCC = 5 V
LOW POWER DISSIPATION
ICC = 4 µA (MAX.) at TA = 25 °C
HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
SYMMETRICAL PROPAGATION DELAYS
IOH = IOL = 4 mA (MIN.)
BALANCED PRORAGATION DELAYS
tPLH = tPHL
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
PIN AND FUNCTION COMPATIBLE WITH
54/74LS259
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC259F1R
M74HC259M1R
M74HC259B1R
M74HC259C1R
DESCRIPTION
The M54/74HC259 is a high speed CMOS 8 BIT
ADDRESSABLE LATCH fabricated in silicon gate
C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low
power consumption.
The M54HC259/M74HC259 has single data input
(D) 8 latch outputs (Q0-Q7), 3 address inputs (A, B,
and C), common enable input (E), and a common
CLEAR input. To operate this device as an addressable latch, data is held on the D input, and the address of the latch into which the data is to be entered
is held on the A, B, and C inputs. When ENABLE is
taken low the data flows through to the addresses
output. The data is stored on the positive-going
edge of the ENABLE pulse. All unaddressed latches
will remain unaffected. With ENABLE in the high
state the device is deselected and all latches remain
in their previous state, unaffected by changes on the
data or address inputs. To eliminate the possibility
of entering erroneous data into the latches, the ENABLE should be held high (inactive) while the address lines are changing. If ENABLE is held high and
CLEAR is taken low all eight latches are cleared to
the low state. If ENABLE is low all latches except the
addressed latch will be cleared. The addressed
latch will instead follow the D input, effectively implementing a 3-to 8 line decoder.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
October 1992
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
1/12
M54/M74HC259
TRUTH TABLE
INPUTS
OUTPUTS OF
ADDRESSED LATCH
EACH OTHER
OUTPUT
D
Qi0
ADDRESSABLE LATCH
H
Qi0
Qi0
MEMORY
L
H
D
L
L
L
CLEAR
H
ENABLE
L
H
L
L
FUNCTION
8 LINE DEMULTIPLEXER
CLEAR ALL BITS TO ’L’
D: The level at the data input
Qi0: The level before the indicated steady state input conditions were established, (i = 0, 1, .....,7).
SELECT INPUTS
B
A
L
L
L
L
L
H
L
H
L
Q2
L
H
H
L
H
L
Q3
Q4
H
L
H
Q5
H
H
H
H
L
H
Q6
Q7
LOGIC DIAGRAM
2/12
LATCH ADDRESSED
C
Q0
Q1
M54/M74HC259
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
IEC LOGIC SYMBOL
NAME AND FUNCTION
1, 2, 3
A, B, C
Address Inputs
4, 5, 6, 7, 9,
10, 11, 12
Q0 to Q7
Latch Outputs
13
14
D
ENABLE
Data Input
Latch Enable Input
(Active LOW)
15
CLEAR
Conditional Reset Input
(Active LOW)
8
GND
Ground (0V)
16
VCC
Positive Supply Voltage
ABSOLUTE MAXIMUM RATINGS
Symbol
ICC
Value
Unit
VCC
VI
Supply Voltage
DC Input Voltage
Parameter
-0.5 to +7
-0.5 to VCC + 0.5
V
V
VO
DC Output Voltage
-0.5 to VCC + 0.5
V
IIK
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
or IGND
DC Output Source Sink Current Per Output Pin
DC VCC or Ground Current
± 25
± 50
mA
mA
PD
Power Dissipation
500 (*)
mW
Tstg
TL
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
300
o
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC
3/12
M54/M74HC259
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
VI
Supply Voltage
Input Voltage
VO
Output Voltage
Top
Operating Temperature: M54HC Series
M74HC Series
Input Rise and Fall Time
tr, tf
Value
Unit
2 to 6
0 to VCC
V
V
0 to VCC
V
o
-55 to +125
-40 to +85
0 to 1000
VCC = 2 V
VCC = 4.5 V
0 to 500
VCC = 6 V
0 to 400
C
C
ns
o
DC SPECIFICATIONS
Test Conditions
Symbol
VIH
V IL
V OH
VOL
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level
Output Voltage
Low Level Output
Voltage
VCC
(V)
2.0
Min.
1.5
4.5
3.15
6.0
2.0
4.2
6.0
2.0
ICC
4/12
Quiescent Supply
Current
Max.
-40 to 85 oC -55 to 125 oC
74HC
54HC
Min.
1.5
Max.
3.15
Min.
1.5
4.2
4.2
0.5
0.5
1.35
1.35
1.35
1.8
2.0
1.9
1.9
4.5
4.4
4.4
6.0
4.5
5.9
4.18
6.0
4.31
5.9
4.13
5.9
4.10
6.0
IO=-5.2 mA
5.68
5.8
5.63
5.60
6.0
6.0
V
1.8
1.9
4.4
2.0
4.5
V
0.5
1.8
Unit
Max.
3.15
VI =
IO=-20 µA
VIH
or
V IL IO=-4.0 mA
4.5
4.5
6.0
Input Leakage
Current
Typ.
4.5
6.0
II
Value
TA = 25 oC
54HC and 74HC
V
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.0
0.1
0.1
0.1
0.17
0.18
0.26
0.26
0.33
0.33
0.40
0.40
VI = VCC or GND
±0.1
±1
±1
µA
VI = VCC or GND
4
40
80
µA
VI =
IO= 20 µA
VIH
or
V IL IO= 4.0 mA
IO= 5.2 mA
V
M54/M74HC259
AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns)
Test Conditions
o
TA = 25 C
54HC and 74HC
Value
-40 to 85 oC -55 to 125 oC
74HC
54HC
Symbol
Parameter
VCC
(V)
tTLH
tTHL
Output Transition
Time
2.0
4.5
Typ.
30
8
Max.
75
15
tPLH
tPHL
Propagation
Delay Time
(DATA - Q)
6.0
2.0
4.5
6.0
7
56
18
15
13
140
28
24
16
175
35
30
19
210
42
36
tPLH
tPHL
Propagation
Delay Time
(A, B, C - Q)
tPLH
tPHL
Propagation
Delay Time
(G - Q)
2.0
4.5
6.0
2.0
4.5
76
24
20
57
19
190
38
32
150
30
240
48
41
190
38
285
57
48
225
45
tPLH
tPHL
Propagation
Delay Time
(CLEAR - Q)
6.0
2.0
4.5
6.0
16
45
15
13
26
115
23
20
32
145
29
25
38
175
35
30
ns
tW(L)
Minimum Pulse
Width
(ENABLE)
2.0
4.5
6.0
28
7
6
75
15
13
90
19
16
115
23
20
ns
Minimum Pulse
Width
(CLEAR)
2.0
4.5
24
6
75
15
90
19
115
23
ns
6.0
2.0
5
12
13
50
16
60
20
75
4.5
6.0
3
3
10
9
12
11
15
13
tW(L)
ts
ts
th
th
CIN
CPD (*)
Minimum Set-up
Time
(DATA)
Min.
Min.
Max.
95
19
Min.
Max.
110
22
Minimum Set-up
Time
(A, B, C)
2.0
4.5
6.0
25
5
5
30
6
5
40
8
7
Minimum Hold
Time
(DATA)
2.0
4.5
6.0
2.0
5
5
5
0
5
5
5
0
5
5
5
0
4.5
6.0
0
0
10
0
0
10
0
0
10
Minimum Hold
Time
(A, B, C)
Input Capacitance
Power Dissipation
Capacitance
5
66
Unit
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC
5/12
M54/M74HC259
SWITCHING CHARACTERISTICS TEST WAVEFORM
WAVEFORM 1. (ENABLE = L, CLR = H, A ∼ C =
WAVEFORM 2. (G = L)
WAVEFORM 3. (CLR = H, A ∼ C = Stable)
ENABLE
WAVEFORM 4. (D = H, A ∼ C - Stable)
WAVEFORM 5. (CLR = H)
ENABLE
ENABLE
6/12
M54/M74HC259
TEST CIRCUIT ICC (Opr.)
ENABLE
ENABLE
7/12
M54/M74HC259
Plastic DIP16 (0.25) MECHANICAL DATA
mm
DIM.
MIN.
a1
0.51
B
0.77
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
0.130
1.27
0.050
P001C
8/12
M54/M74HC259
Ceramic DIP16/1 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
20
0.787
B
7
0.276
D
E
3.3
0.130
0.38
e3
0.015
17.78
0.700
F
2.29
2.79
0.090
0.110
G
0.4
0.55
0.016
0.022
H
1.17
1.52
0.046
0.060
L
0.22
0.31
0.009
0.012
M
0.51
1.27
0.020
0.050
N
P
Q
10.3
7.8
8.05
5.08
0.406
0.307
0.317
0.200
P053D
9/12
M54/M74HC259
SO16 (Narrow) MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.004
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
9.8
E
5.8
10
0.385
6.2
0.228
0.393
0.244
e
1.27
0.050
e3
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.62
0.024
8° (max.)
P013H
10/12
M54/M74HC259
PLCC20 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
9.78
10.03
0.385
0.395
B
8.89
9.04
0.350
0.356
D
4.2
4.57
0.165
0.180
d1
2.54
0.100
d2
0.56
0.022
E
7.37
8.38
0.290
0.330
e
1.27
0.050
e3
5.08
0.200
F
0.38
0.015
G
0.101
0.004
M
1.27
0.050
M1
1.14
0.045
P027A
11/12
M54/M74HC259
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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12/12