STW240NF55 N-CHANNEL 55V - 0.0027 Ω - 120A TO-247 STripFET™ II POWER MOSFET TYPE STW240NF55 ■ ■ ■ VDSS RDS(on) ID(1) 55V <0.0035Ω 120A TYPICAL RDS(on) = 0.0027Ω STANDARD THRESHOLD DRIVE 100% AVALANCHE TESTED DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS ■ HIGH CURRENT, HIGH SWITCHING SPEED ■ OR-ING FUNCTION 1 2 3 TO-247 INTERNAL SCHEMATIC DIAGRAM Ordering Information SALES TYPE STW240NF55 MARKING W240NF55 PACKAGE TO-247 PACKAGING TUBE ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID(1) ID(1) IDM(•) Ptot dv/dt (2) EAS(3) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy Storage Temperature Operating Junction Temperature (•) Pulse width limited by safe operating area. (1)Current Limited by Package May 2004 Value 55 55 ± 20 120 120 480 500 3.33 5 3.5 Unit V V V A A A W W/°C V/ns J -55 to 175 °C (2) ISD ≤ 120A, di/dt ≤ 600A/µs, VDD ≤ 48V, Tj ≤ TJMAX. (3) Starting Tj = 25 oC, ID = 60A, VDD = 30V 1/8 STW240NF55 THERMAL DATA Rthj-case Rthj-amb Tl °C/W °C/W °C 0.3 50 300 Max Max Typ Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose (1.6 mm from case, for 10 sec) ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions V(BR)DSS Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V Min. Typ. Max. 55 Unit V 1 10 µA µA ±100 nA Max. Unit 4 V 2.7 3.5 mΩ Typ. Max. Unit ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS RDS(on) Static Drain-source On Resistance VGS = 10 V ID = 250 µA Min. Typ. 2 ID = 60 A DYNAMIC Symbol 2/8 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 15 V Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 ID = 60 A Min. 100 S 12250 2600 745 pF pF pF STW240NF55 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 27.5 V ID = 60 A VGS = 10 V RG = 4.7 Ω (Resistive Load, Figure 3) 52 235 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=27.5V ID=120A VGS=10V 350 75 140 480 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. VDD = 27.5 V ID = 60 A VGS = 10 V RG = 4.7Ω, (Resistive Load, Figure 3) 225 115 ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 120 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 120 A di/dt = 100A/µs Tj = 150°C VDD = 20 V (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 115 435 7.6 Max. Unit 120 480 A A 1.5 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STW240NF55 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STW240NF55 Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature . . 5/8 STW240NF55 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STW240NF55 TO-247 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 4.7 5.3 0.185 0.209 D 2.2 2.6 0.087 0.102 E 0.4 0.8 0.016 0.031 F 1 1.4 0.039 0.055 F3 2 2.4 0.079 0.094 F4 3 3.4 0.118 0.134 G 10.9 0.429 H 15.3 15.9 0.602 0.626 L 19.7 20.3 0.776 0.779 L3 14.2 14.8 0.559 0.582 L4 34.6 1.362 L5 5.5 0.217 M 2 3 0.079 0.118 P025P 7/8 STW240NF55 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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