VBUS051BD-HD1 www.vishay.com Vishay Semiconductors Low Capacitance, Single-Line ESD-Protection Diode FEATURES • • • • 1 2 20856 • • • 20855 MARKING (example only) XY • • • • 21121 Bar = cathode marking Y = type code (see table below) X = date code Ultra compact LLP1006-2L package Low package profile < 0.4 mm 1-line ESD-protection High surge current acc. IEC 61000-4-5 IPPM > 3 A Low leakage current IR < 0.1 μA Low load capacitance CD = 0.9 pF ESD-protection acc. IEC 61000-4-2 ± 15 kV contact discharge ± 15 kV air discharge Soldering can be checked by standard vision inspection; no X-ray necessary Pin plating NiPdAu (e4) no whisker growth e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn) Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 ORDERING INFORMATION DEVICE NAME VBUS051BD-HD1 ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VBUS051BD-HD1-GS08 8000 8000 PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VBUS051BD-HD1 LLP1006-2L A 0.72 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS PARAMETER TEST CONDITIONS SYMBOL Peak pulse current acc. IEC 61000-4-5; tp = 8/20 μs; single shot IPPM 3 A Peak pulse power acc. IEC 61000-4-5; tp = 8/20 μs; single shot PPP 45 W ESD immunity Operating temperature Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses UNIT ± 15 kV ± 15 kV TJ - 55 to + 145 °C TSTG - 55 to + 150 °C VESD Junction temperature Storage temperature VALUE ELECTRICAL CHARACTERISTICS (Ratings at 25 °C ambient temperature, unless otherwise specified) PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Number of lines which can be protected Nlines - - 1 lines Max. reverse working voltage VRWM - - 5 V Reverse voltage at IR = 0.1 μA; pin 2 to pin 1 VR 5 - - V Reverse current at VR = VRWM = 5 V; pin 2 to pin 1 IR - < 0.01 0.1 μA Protection paths Reverse stand-off voltage at IR = 1 mA; pin 2 to pin 1 VBR 6.9 7.9 8.7 V Reverse clamping voltage Reverse breakdown voltage at IPP = 3 A; acc. IEC 61000-4-5; pin 2 to pin 1 VC - - 16 V Forward clamping voltage at IF = 3 A; acc. IEC 61000-4-5; pin 1 to pin 2 VF - 3.4 4 V at VR = 0 V; f = 1 MHz; pin 2 to pin 1 CD - 0.9 1.3 pF Capacitance Rev. 2.0, 23-May-12 Document Number: 81785 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS051BD-HD1 www.vishay.com Vishay Semiconductors APPLICATION NOTE The VBUS051BD-HD1 is an ESD-protection device with the characteristic of a Z-diode with a high ESD-immunity and a very low capacitance which makes it usable for high frequency applications like USB2.0 or HDMI. With the VBUS051BD-HD1 one high speed data line can be protected against transient voltage signals like ESD (electro static discharge). Connected to the data line (pin 2) and to ground (pin 1) negative transients will be clamped close below the ground level while positive transients will be clamped close above the 5 V working range. The clamping behaviour of the VBUS051BD-HD1 is bidirectional but asymmetrical (BiAs) and so it offers the best protection for applications running up to 5 V. TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 120 % 2.5 f = 1 MHz Rise time = 0.7 ns to 1 ns 2 80 % CD (pF) Discharge Current IESD 100 % 60 % 53 % 1.5 1 40 % 27 % 0.5 20 % 0% - 10 0 10 20 30 40 50 60 70 80 90 100 0 1 2 Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF) 3 4 5 6 VR (V) 21421 Time (ns) 20557 0 Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR 100 8 µs to 100 % 100 % 10 IF (mA) 80 % IPPM 60 % 20 µs to 50 % 40 % 20 % 1 0.1 0.01 0% 0 20548 10 20 30 40 Time (µs) Fig. 2 - 8/20 μs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Rev. 2.0, 23-May-12 0.001 0.5 20880 0.6 0.7 0.8 0.9 1 1.1 VF (V) Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF Document Number: 81785 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS051BD-HD1 www.vishay.com Vishay Semiconductors 9 2 8 0 7 -2 VC-ESD (V) 6 VR (V) 5 4 3 -4 -6 -8 2 - 10 1 - 12 0 0.01 0.1 1 20881 10 - 14 - 10 0 10 20 30 40 50 60 70 80 90 100 1000 10 000 IR (µA) t (ns) 20884 Fig. 5 - Typical Reverse Voltage VR vs. Reverse Current IR Acc. IEC 61000-4-2 - 200 V contact discharge Fig. 8 - Typical Clamping Performance at - 200 V Contact Discharge (acc. IEC 61000-4-2) 100 16 14 Positive surge 80 12 Acc. IEC 61000-4-2 + 8 kV contact discharge 10 60 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 6 4 VC-ESD (V) VC (V) 8 VC 2 40 20 0 -2 0 Negative surge -4 - 20 - 10 0 -6 0 20882 1 2 3 IPP (A) Fig. 6 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP 21422 20 Acc. IEC 61000-4-2 + 200 V contact discharge 0 - 20 10 - 40 VC-ESD (V) VC-ESD (V) 12 8 6 - 60 - 100 2 - 120 0 - 140 20883 10 20 30 40 50 60 70 80 90 t (ns) Fig. 7 - Typical Clamping Performance at + 200 V Contact Discharge (acc. IEC 61000-4-2) Rev. 2.0, 23-May-12 Acc. IEC 61000-4-2 - 8 kV contact discharge - 80 4 -2 - 10 0 t (ns) Fig. 9 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 16 14 10 20 30 40 50 60 70 80 90 - 160 - 10 0 21423 10 20 30 40 50 60 70 80 90 t (ns) Fig. 10 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) Document Number: 81785 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS051BD-HD1 www.vishay.com Vishay Semiconductors 300 Acc. IEC 61000-4-2 contact discharge VC-ESD (V) 200 100 0 VC-ESD - 100 - 200 - 300 0 5 10 15 20 VESD (kV) 21424 Fig. 11 - Typical Peak. Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) 0.25 [0.010] 0.15 [0.006] PACKAGE DIMENSIONS in millimeters (inches) LLP1006-2L 0.55 [0.022] 0.45 [0.018] 0.3 [0.012] 0.2 [0.008] 0.125 [0.005] Ref. 0.65 [0.026] 0.55 [0.022] 0.05 [0.002] 0 [0.000] 0.4 [0.016] 0.33 [0.013] 0.45 [0.018] 0.35 [0.014] Orientation Identification 1.05 [0.041] 0.95 [0.037] 1 [0.039] 0.2 [0.008] 0.5 [0.020] 0.6 [0.024] Foot print recommendation: solder resist mask solder pad Created - Date: 13. July. 2007 Rev. 5 - Date: 21 April 2010 Document no.:S8-V-3906.04-005 (4) 20812 Rev. 2.0, 23-May-12 0.05 [0.002] 0.25 [0.010] 0.5 [0.020] soldermask opening ± 0.03 measured middle of the package Document Number: 81785 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VBUS051BD-HD1 www.vishay.com Vishay Semiconductors Pin 1 - Location LLP1713 Top view Pad layout - view from top seen at bottom side Pin 1 - Location LLP2513 Top view Pad layout - view from top seen at bottom side Pin 1 - Location LLP3313 Top view Rev. 2.0, 23-May-12 Pad layout - view from top seen at bottom side Document Number: 81785 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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