ETC STB8NS25T4

STB8NS25
N-CHANNEL 250V - 0.38Ω - 8A D2PAK
MESH OVERLAY MOSFET
■
■
■
TYPE
VDSS
RDS(on)
ID
STB8NS25
250 V
< 0.45 Ω
8A
TYPICAL RDS(on) = 0.38 Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
3
1
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding
performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for
lighting applications.
D2PAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLIES (SMPS)
■ DC-DC CONVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT
■
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
250
V
Drain-gate Voltage (RGS = 20 kΩ)
250
V
VGS
Gate- source Voltage
± 20
V
ID (*)
Drain Current (continuos) at TC = 25°C
8
A
ID
Drain Current (continuos) at TC = 100°C
5
A
Drain Current (pulsed)
32
A
IDM (●)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1)
Tstg
Tj
Peak Diode Recovery voltage slope
Storage Temperature
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
July 2001
80
W
0.64
W/°C
5
V/ns
–65 to 150
°C
150
°C
(1) ISD≤ 8A, di/dt≤300 A/µs, VDD≤ V (BR)DSS, Tj≤TjMAX
(*)Limited only by maximum temperature allowed
1/9
STB8NS25
THERMAL DATA
Rthj-case
Thermal Resistance Junction-case Max
1.56
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value
Unit
8
A
300
mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
Parameter
Test Conditions
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
IDSS
Zero Gate Voltage
Drain Current (V GS = 0)
VDS = Max Rating
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ±20V
V(BR)DSS
Min.
Typ.
Max.
250
Unit
V
1
VDS = Max Rating, TC = 125 °C
µA
10
µA
±100
nA
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
R DS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 4 A
Min.
Typ.
Max.
Unit
2
3
4
V
0.38
0.45
Ω
Min.
Typ.
Max.
Unit
7
8
S
770
pF
DYNAMIC
Symbol
gfs (1)
2/9
Parameter
Test Conditions
Forward Transconductance
VDS > ID(on) x RDS(on)max,
ID = 4A
VDS = 25V, f = 1 MHz, VGS = 0
C iss
Input Capacitance
Coss
Output Capacitance
118
pF
Crss
Reverse Transfer
Capacitance
48
pF
STB8NS25
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr
Parameter
Turn-on Delay Time
Rise Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Q gd
Gate-Drain Charge
Test Conditions
Min.
Typ.
Max.
Unit
VDD = 125 V, ID = 4 A
RG = 4.7Ω VGS = 10 V
(see test circuit, Figure 3)
13
ns
18
ns
VDD = 200V, I D = 8 A,
VGS = 10V
37
51.8
nC
5.2
nC
14.8
nC
SWITCHING OFF
Symbol
Parameter
Test Condit ions
Min.
Typ.
Max.
Unit
td(Voff)
tf
Turn-off- Delay Time
Fall Time
VDD = 125V, ID = 4 A,
R G = 4.7Ω, VGS = 10V
(see test circuit, Figure 3)
51
16
ns
ns
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Vclamp = 200V, ID = 8 A,
R G = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
12.5
12.5
28
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
ISD
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Source-drain Current
8
A
ISDM (2)
Source-drain Current (pulsed)
32
A
VSD (1)
Forward On Voltage
ISD = 8 A, VGS = 0
1.7
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ISD = 8 A, di/dt = 100A/µs
VDD = 30V, Tj = 150°C
(see test circuit, Figure 5)
IRRM
Reverse Recovery Current
198
ns
1.1
µC
11.3
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
3/9
STB8NS25
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/9
STB8NS25
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STB8NS25
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
STB8NS25
D2PAK MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
0.368
D1
E
8
0.315
10
E1
10.4
0.393
8.5
0.334
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
M
2.4
3.2
0.094
0.126
R
0.015
0º
8º
3
V2
0.4
7/9
1
STB8NS25
TAPE AND REEL SHIPMENT (suffix ”T4”)*
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
TAPE MECHANICAL DATA
DIM.
8/9
mm
inch
MIN.
MAX.
MIN.
MAX.
A0
B0
10.5
15.7
10.7
15.9
0.413 0.421
0.618 0.626
D
D1
1.5
1.59
1.6
1.61
0.059 0.063
0.062 0.063
E
1.65
1.85
0.065 0.073
F
11.4
11.6
0.449 0.456
K0
P0
4.8
3.9
5.0
4.1
0.189 0.197
0.153 0.161
P1
P2
11.9
1.9
12.1
2.1
0.468 0.476
0.075 0.082
R
50
T
0.25
0.35 0.0098 0.0137
1.574
W
23.7
24.3
0.933 0.956
B
1.5
C
12.8
D
G
20.2
24.4
N
T
100
MAX.
330
inch
MIN.
MAX.
12.992
0.059
13.2
0.504 0.520
26.4
0795
0.960 1.039
3.937
30.4
1.197
BASE QTY
BULK QTY
1000
1000
STB8NS25
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
 2001 STMicroelectronics – Printed in Italy – All Rights Reserved
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