STMICROELECTRONICS TDA7315D

TDA7315

DIGITAL CONTROLLED AUDIO PROCESSOR
1 STEREO INPUT
LOUDNESS FUNCTION
VOLUME CONTROL IN 1.25dB STEPS
TREBLE AND BASS CONTROL
TWO SPEAKERS ATTENUATORS:
- INDEPENDENT SPEAKERS CONTROL
IN 1.25dB STEPS
- INDEPENDENT MUTE FUNCTION
ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS
DESCRIPTION
The TDA7315 is a volume, tone (bass and treble)
balance (Left/Right) processor for quality audio applications in car radio and Hi-Fi systems.
Control is accomplished by serial bus microprocessor
interface.
The AC signal settingis obtainedby resistor networks
SO20
DIP 20
ORDERING NUMBER: TDA7315 (DIP 20)
TDA7315D (SO 20)
and switches combined with operational amplifiers.
Thanks to the used BIPOLAR/CMOS Technology,
Low Distortion, Low Noise and DC stepping are obtained.
BLOCK DIAGRAM
July 1998
1/12
TDA7315
PIN CONNECTION (Top view)
THERMAL DATA
Symbol
Parameter
R th j-pins
Thermal Resistance Junction-pins
Max.
SO 20
DIP 20
Unit
150
150
°C/W
ABSOLUTE MAXIMUM RATINGS
Symbol
VS
Parameter
Operating Supply Voltage
T amb
Operating Ambient Temperature
Tstg
Storage Temperature Range
Value
Unit
10.2
V
-10 to 85
°C
-55 to +150
°C
QUICK REFERENCE DATA
Symbol
Min.
Typ.
Max.
VS
Supply Voltage
Parameter
6
9
10
VCL
Max. input signal handling
2
THD
Total Harmonic Distortion V = 1Vrms f = 1KHz
0.01
S/N
Signal to Noise Ratio
106
SC
Channel Separation f = 1KHz
103
Volume Control
1.25dB step
Bass and Treble Control
Balance Control
Mute Attenuation
2/12
2db step
1.25dB step
Unit
V
Vrms
0.1
%
dB
dB
-78.75
0
dB
-14
+14
dB
-38.75
0
100
dB
dB
TDA7315
TEST CIRCUIT
ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, VS = 9V, RL = 10KΩ, RG =
600Ω, all controls flat (G = 0), f = 1KHz unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY
VS
Supply Voltage
IS
SVR
Supply Current
Ripple Rejection
6
9
10
V
11
60
8
80
mA
dB
VOLUME CONTROL
R IV
Input Resistance
20
33
50
kΩ
C RANGE
AVMIN
AVMAX
Control Range
Min. Attenuation
Max. Attenuation
70
-1
70
75
0
75
80
1
80
dB
dB
dB
0.5
-1.25
-3
1.25
0
1.75
1.25
2
2
3
7.5
dB
dB
dB
dB
mV
mV
40
1.75
1.5
dB
dB
dB
ASTEP
EA
ET
VDC
Step Resolution
Attenuation Set Error
Tracking Error
DC Steps
Av = 0 to -20dB
Av = -20 to -60dB
adjacent attenuation steps
From 0dB to Av max
0
0.5
SPEAKER ATTENUATORS
Crange
SSTEP
EA
Control Range
Step Resolution
Attenuation set error
AMUTE
VDC
Output Mute Attenuation
DC Steps
35
0.5
37.5
1.25
80
100
0
1
3
10
dB
mV
mV
+12
1
+14
2
+16
3
dB
dB
34
44
58
KΩ
adjacent att. steps
from 0 to mute
BASS CONTROL (1)
Gb
BSTEP
RB
Control Range
Step Resolution
Internal Feedback Resistance
Max. Boost/cut
3/12
TDA7315
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
+13
+14
+15
dB
1
2
3
dB
2
2.5
TREBLE CONTROL (1)
Gt
TSTEP
Control Range
Max. Boost/cut
Step Resolution
AUDIO OUTPUTS
VOCL
Clipping Level
RL
Output Load Resistance
CL
Output Load Capacitance
d = 0.3%
Vrms
2
KΩ
10
nF
ROUT
Output resistance
30
75
120
Ω
VOUT
DC Voltage Level
4.2
4.5
4.8
V
2.5
5
15
µV
µV
GENERAL
e NO
Output Noise
BW = 20-20KHz, flat
output muted
all gains = 0dB
3
µV
Signal to Noise Ratio
all gains = 0dB; VO = 1Vrms
106
dB
d
Distortion
AV = 0, VIN = 1Vrms
AV = -20dB VIN = 1Vrms
V IN = 0.3Vrms
0.01
0.09
0.04
Sc
Channel Separation left/right
A curve all gains = 0dB
S/N
Total Tracking error
80
AV = 0 to -20dB
-20 to -60 dB
0.1
0.3
103
0
0
%
%
%
dB
1
2
dB
dB
1
V
+5
µA
0.4
V
BUS INPUTS
V IL
Input Low Voltage
VIH
Input High Voltage
3
IIN
Input Current
-5
VO
Output Voltage SDA
Acknowledge
IO = 1.6mA
V
Note:
(1) Bass and Treble response see attached diagram (fig.19). The center frequency and quality of the resonance behaviour can be choosen by
the external circuitry. A standard first order bass response can be realized by a standard feedback network.
Figure 1: Loudness versus Volume Attenuation
4/12
Figure 2: Loudnessversus Frequency
TDA7315
Figure 3: Loudness versus External Capacitors
LOUDNESS
VS = 9V
Volume = -40dB
All other control flat
C in = 2.2µF
C loud = 220nF, 100nF, 33nF, 10nF, Open, Shorter to Vref
Figure 4: Noise vs. Volume/Gain Settings
Figure 6: Distortion & Noise vs. Frequency
Figure 5: Signal to Noise Ratio vs. Volume
Setting
Figure 7: Distortion & Noise vs. Frequency
Figure 8: Distortion vs. Load Resistance
5/12
TDA7315
Figure 9: Channel Separation (L → R) vs.
Frequency
Figure 10: Supply Voltage Rejection vs.
Frequency
Figure 11: Output Clipping Level vs. Supply
Voltage
Figure 12: Quiescent Current vs. Supply Voltage
Figure 13: Supply Current vs. Temperature
Figure 14: Bass Resistance vs. Temperature
6/12
TDA7315
Figure 15: Typical Tone Response (with the ext.
components indicated in the test
circuit)
SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
A start condition (S)
A chip address byte, containing the TDA7315
address (the 8th bit of the byte must be 0). The
TDA7315 must always acknowledge at the end
of each transmitted byte.
A sequence of data (N-bytes + acknowledge)
A stop condition (P)
TDA7315 ADDRESS
S
MSB
first byte
1
0
0
0
LSB
0
0
0
MSB
LSB
DATA
0 ACK
MSB
LSB
DATA
ACK
ACK P
Data Transferred (N-bytes + Acknowledge)
ACK = Acknowledge
S = Start
P = Stop
MAX CLOCK SPEED 100kbits/s
SOFTWARE SPECIFICATION
Chip address = 80 Hex
1
MSB
0
0
0
0
0
0
0
LSB
DATA BYTES
MSB
0
1
1
0
0
0
LSB
0
0
0
1
1
1
B2
0
1
0
1
1
B1
B1
B1
X
0
1
B0
B0
B0
X
C3
C3
A2
A2
A2
L
C2
C2
A1
A1
A1
X
C1
C1
A0
A0
A0
X
C0
C0
FUNCTION
Volume control
Speaker ATT L
Speaker ATT R
Loudness
Bass control
Treble control
Ax = 1.25dB steps; Bx = 10dB steps; Cx = 2dB steps; X = don‘t care.
7/12
TDA7315
SOFTWARE SPECIFICATION (continued)
DATA BYTES (detailed description)
Volume
MSB
0
0
LSB
0
0
B2
B1
B0
B2
B1
B0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
A2
A1
A0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
A2
A1
A0
FUNCTION
Volume 1.25dB steps
0
-1.25
-2.5
-3.75
-5
-6.25
-7.5
-8.75
Volume 10dB steps
0
-10
-20
-30
-40
-50
-60
-70
For example a volume of -45dB is given by:
0 0 1 0 0 1 0 0
Speaker Attenuators
MSB
1
1
LSB
0
0
0
1
B1
B1
B0
B0
0
0
1
1
0
1
0
1
1
1
A2
A2
A1
A1
A0
A0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
-1.25
-2.5
-3.75
-5
-6.25
-7.5
-8.75
0
-10
-20
-30
1
For example attenuation of 25dB on speaker R is given by:
1 0 1 1 0 1 0 0
8/12
FUNCTION
Speaker L
Speaker R
1
1
Mute
TDA7315
Loudness
MSB
0
LSB
1
0
X
X
L
X
FUNCTION
X
0
1
LOUDNESS ON
LOUDNESS OFF
x = don‘t care
For examples Loudness Off can be programmed by the following 8 bit string:
0 1 0 0 0 1 0 0
Bass and Treble
0
0
1
1
1
1
0
1
C3
C3
C2
C2
0
0
0
0
1
1
1
1
C1
C1
0
0
1
1
0
0
1
1
C0
C0
0
1
0
1
0
1
0
1
Bass
Treble
-14
-12
-10
-8
-6
-4
-2
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
0
2
4
6
8
10
12
14
C3 = Sign
For example Bass at -10dB is obtained by the following 8 bit string:
0 1 1 0 0 0 1 0
9/12
TDA7315
SO20 PACKAGE MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.1
0.3
0.004
0.012
B
0.33
0.51
0.013
0.020
C
0.23
0.32
0.009
0.013
D
12.6
13
0.496
0.512
E
7.4
7.6
0.291
0.299
e
1.27
0.050
H
10
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.4
1.27
0.016
0.050
K
0 (min.)8 (max.)
L
h x 45°
A
B
e
A1
K
H
D
20
11
E
1
10
SO20MEC
10/12
C
TDA7315
DIP20 PACKAGE MECHANICAL DATA
mm
DIM.
MIN.
a1
0.254
B
1.39
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.010
1.65
0.055
0.065
b
0.45
0.018
b1
0.25
0.010
D
25.4
1.000
E
8.5
0.335
e
2.54
0.100
e3
22.86
0.900
F
7.1
0.280
I
3.93
0.155
L
Z
3.3
0.130
1.34
0.053
11/12
TDA7315
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1998 STMicroelectronics – Printed in Italy – All Rights Reserved
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