STMICROELECTRONICS TDA7469

TDA7469
LOW VOLTAGE ANALOG AUDIO PROCESSOR WITH
HEADPHONE POWER AMPLIFIER
1
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■
■
■
■
■
■
■
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2
FEATURES
Figure 1. Package
2 STEREO INPUT
1 STEREO OUTPUT
TREBLE BOOST
BASS CONTROL
BASS AUTOMATIC LEVEL CONTROL
VOLUME CONTROL IN 1dB STEPS
MUTE
STAND-BY FUNCTION SOFTWARE
CONTROLLED
ALL FUNCTION ARE PROGRAMMABLE VIA
SERIAL BUS
SSOP24
Table 1. Order Codes
DESCRIPTION
Part Number
Package
TDA7469
SSOP24
TDA746913TR
Tape & Reel
The AC signal setting is obtained by resistor networks and switches combined with operational amplifiers.
The TDA7469 is a volume tone (bass and treble) processor for quality audio applications in Low voltage
supply portable systems.
Thanks to the used BIPOLAR/CMOS Technology,
Low Distortion, Low Noise and DC stepping are obtained.
Bass ALC (Automatic Level Control) function can be
adjusted by a dedicated pin. The control of all the
functions is accomplished by serial bus.
Figure 2. Block Diagram
5.6K
3.3nF
MUX_R
0.47µF
68nF
68nF
BASSI-R
TREBLE-R
BASSO-R
IN1-R
25K
gm
RB
+6dB ÷
0dB
25K
16Ω or
32Ω
0.47µF
VOLUME
IN2-R
25K
BASS
TREBLE
OUT-R
x1
+6dB ÷
-63dB
220µF
PGND-R
SUPPLY
25K
PVS-R
BASS_ALC
CONTROL
0.47µF
ALC
HALF_WAVE
RECTIFIER
SCL
I2C BUS DECODER + LATCHES
SDA
IN1-L
0.47µF
PVS-L
SUPPLY
25K
PGND-L
25K
+6dB ÷
-63dB
220µF
x1
0.47µF
VOLUME
IN2-L
25K
TREBLE
16Ω or
32Ω
+6dB ÷
0dB
RB
gm
25K
D00AU1234
OUT-L
BASS
TREBLE-L
MUX_L
3.3nF
VREF
BASSI-L
68nF
68nF
BASSO-L
VS
SUPPLY
GND
CREF
22µF
5.6K
December 2004
REV. 3
1/13
TDA7469
Table 2. ABSOLUTE MAXIMUM RATINGS
Symbol
VS
Parameter
Operating Supply Voltage
Tamb
Operating Ambient Temperature
Tstg
Storage Temperature Range
ESD
Maximum ESD on PINS 11 and 12 (HBM)
Value
Unit
5.5
V
0 to 70
°C
-55 to 150
°C
500
V
Value
Unit
85
°C/W
Figure 3. PIN CONNECTIONS (Top view)
VS
1
24
CREF
IN1-L
2
23
IN1-R
IN2-L
3
22
IN2-R
MUX-L
4
21
MUX-R
TREBLE-L
5
20
TREBLE-R
BASSI-L
6
19
BASSI-R
BASSO-L
7
18
BASSO-R
PGND-L
8
17
PGND-R
OUT-L
9
16
OUT-R
PVS-L
10
15
PVS-R
SDA
11
14
ALC
SCL
12
13
GND
D01AU1246
Table 3. THERMAL DATA
Symbol
Rth j-pin
Parameter
Thermal Resistance Junction-pins
Table 4. QUICK REFERENCE DATA
Symbol
Parameter
Min.
Typ.
Max.
Unit
VS
Supply Voltage
1.8
2.4
5.0
V
Vps
Power Supply Voltage
1.5
2.4
5.0
V
5
10
Pomax
Maximum output power THD 10%
THD
Total Harmonic Distortion V = 0.1Vrms f = 1KHz
0.5
%
-63
6
dB
Treble Control
0
12
dB
Bass Control
0
14
dB
Volume Control (1dB step)
Mute Attenuation
2/13
0.1
mW
90
dB
TDA7469
Table 5.
ELECTRICAL CHARACTERISTICS (refer to the test circuit Tamb = 25°C, VS =2.4V, all controls flat (G =
0dB), f = 1KHz, unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY
VS
Supply Voltage
1.8
2.4
5.0
V
VPS
Supply Voltage
1.5
2.4
5.0
V
ISQ
Supply Current pin 1
All circuit stop
40
100
µA
IPSQ
Quiescent Current pin10 + pin15
Headphone Amp. OFF
1
10
µA
IS
Po = 0.5mW +0.5mW
8
mA
IPS
Po = 0.5mW +0.5mW
15
mA
INPUT STAGE
RIN
Input Resistance
35
65
KΩ
AIN
Input Attenuation Range
0
50
6
dB
-63
6
dB
VOLUME CONTROL
CRANGE
Control Range
AMAX
Max. Attenuation
61
63
65
dB
ASTEP
Step Resolution
0.5
1
1.5
dB
GMAX
Max. Gain
Gstep
Step Resolution
2
dB
Muxout Load Resistence
10
KΩ
14
dB
R1
6
dB
BASS CONTROL
Gb
Control Range
RB
Internal Feedback Resistance
Max. Boost/on
75.6
100.8
126
KΩ
TREBLE CONTROL
Gt
Control Range
Rt
Internal Resistance
Max. Boost
12
dB
25
KΩ
HEADPHONE OUTPUTS
Gout
Pomax
Output Gain
Max Output Power
0
dB
10
mW
All gains = 0dB
Output Muted
BW = 20Hz to 20KHz flat
5
10
µV
µV
Av = 0, Vin = 0.1Vrms
0.1
THD = 10%
5
GENERAL
ENO
THD
SC
Output Noise
Distortion
Channel Separation Left/Right
%
dB
dB
RR1
Ripple Rejection
VS, f = 100Hz
-70
RR2
Ripple Rejection
PVS, f = 100Hz
-75
Total Tracking Error
0.5
50
0
dB
1
dB
BUS INPUTS
VIL
Input Low Voltage
VIH
Input High Voltage
0.5
IIN
Input Current
VIN = 0.4V
VO
Output Voltage (ACK)
IO = 1.6mA
1.9
-5
V
V
5
µA
0.4
V
Note: 1. BASS and TREBLE response: The center frequency and the response quality can be chosen by the external circuitry.
3/13
TDA7469
3
DATA BYTES
Address = (HEX) 10001000
3.1 FUNCTION SELECTION:
The first byte (subaddress)
Table 6.
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
SUBADDRESS
X
X
X
B
0
0
0
0
VOLUME
X
X
X
B
0
0
0
1
TREBLE & BASS
X
X
X
B
0
0
1
0
INPUT & MUTE
X
X
X
B
0
0
1
1
STAND-BY & OTHERS
X
X
X
B
0
1
0
0
BASS ALC1
X
X
X
B
0
1
0
1
BASS ALC2
LSB
VOLUME
D1
D0
GAIN
0
0
6
0
1
4
1
0
2
1
1
0
B = 1 incremental bus; active
B = 0 no incremental bus
;X = indifferent 0,1
Table 7. VOLUME
MSB
D7
D6
D5
D4
D3
D2
1 dB STEPS
0
0
0
0
0
0
1
-1
0
1
0
-2
0
1
1
-3
1
0
0
-4
1
0
1
-5
1
1
0
-6
1
1
1
-7
8 dB STEPS
0
0
0
0
0
1
-8
0
1
0
-16
0
1
1
-24
1
0
0
-32
1
0
1
-40
1
1
0
-48
1
1
1
-56
VOLUME : +6 x -63dB
4/13
0
TDA7469
Table 8. TREBLE & BASS
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
TREBLE
0
0
12dB
0
1
8dB
1
0
4dB
1
1
0dB
BASS
0
0
0
14dB
0
0
1
12dB
0
1
0
10dB
0
1
1
8dB
1
0
0
6dB
1
0
1
4dB
1
1
0
2dB
1
1
1
0dB
BASS ALC
0
ALC: VOLUME mode
1
ALC: BASS mode
1
ALC: fc shift
0
ALC: fc nonshift
1
ALC: feedback gain x2
0
ALC: feedback gain x 1
Table 9. INPUT SELECT & MUTE
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
INPUT SELECT
0
0
IN1 (0dB)
0
1
IN1 (-6dB)
1
0
IN2 (0dB)
1
1
IN2 (-6dbB)
MUTE
1
Input Mute ON
0
Input Mute OFF
1
Output SoftMute ON
0
Output SoftMute OFF
1
Output Mute ON
0
Output Mute OFF
HEADPHONE AMP. ST-BY
1
Headphone Amp. OFF
0
Headphone Amp. ON
5/13
TDA7469
Table 10. STAND_BY & OTHERS
MSB
D7
D6
D5
D4
D3
D2
LSB
D0
D1
STAND-BY
ALL Circuits Stop
ALL Circuits Work
SOFT MUTE CAPACITOR
Independent Capacitor
Share ALC Capacitor
REFERENCE LEVEL
adaptive: (VDD-0.7)/2
1.10V
0.85V
0.55V
0.45V
ZEROCROSS MODE
ON
OFF
Zerocross Detect Point: Volume
Zerocross Detect Point: Bass
CREF STAND-BY
CREF Circuit Stop
CREF Circuit Work
1
0
1
0
0
0
1
1
1
0
0
0
0
0
1
0
1
1
0
1
0
1
0
Table 11. BASS ALC1
MSB
D7
D6
D5
D4
D3
D2
D1
LSB
D0
1
0
1
0
1
0
0
0
1
1
0
0
1
1
0
1
0
1
D4
D3
0
1
0
1
BASS ALC
ALC MODE
ON
OFF
DETECTOR
ON
OFF
RELEASE CURRENT CIRCUIT
ON
OFF
ATTACK TIME RESISTOR
12.5KΩ
25KΩ
50KΩ
100KΩ
THRESHOLD
THRESHOLD1
THRESHOLD2
THRESHOLD3
THRESHOLD4
Table 12. BASS ALC2
MSB
D7
D6
D5
D2
D1
LSB
D0
1
0
1
0
6/13
BASS ALC
ALC FULL FEEDBACK CURR.
ON
OFF
BIG RELEASE CURRENT
ON
OFF
TDA7469
Figure 4. Typical Application Circuit (SSO24)
VS
VS
C1
10µF
24
IN1-L
C4 0.47µF
IN2-L
C22
22µF
IN1-L
IN2-L
MUX-L
MUX-L
TREBLE-L
2
23
3
22
4
21
5
20
C8
10µF
IN1-R
C20 0.47µF
C6
BASSO-L
68nF
MUX-R
PGND-L
7
18
BASSO-R
17
8
5.6K
PGND-R
C15
0.1µF
PVS-R
14
R4
SDA
SCL
11
12
0.1µF
Jumper
J1
ALC
C14
0.47µF
13
GND
9
16
OUT-R
OUT-L
C10
C16
10µF
PVS-R
15
VDD
4.7
C18
68nF
R8
C17
68nF
10
R6
R9
10K
BASSI-R
PVS-L
SCL
MUX-R
TREBLE-R
C9
0.1µF
SDA
IN2-R
19
BASSI-L
PVS-L
R3
IN2-R
C21 0.47µF
C19
3.3nF
6
5.6K
IN1-R
C5
3.3nF
C6
68nF
R2
CREF
C2
0.1µF
C3 0.47µF
R1
10K
1
STEREO MINI JAC
C11
220µF
OUT-L
C12
220µF
Jumper
J2
C13
0.1µF
R7
4.7
OUT-R
D00AU1243
For listering tests
7/13
TDA7469
Figure 5. THD+Noise vs Amplitude @VCC 2.5V,
Rload 16Ω
THD
(%)
Figure 7. THD+Noise vs Amplitude @VCC 2.5V,
Rload 32Ω
THD
(%)
10
5
0.5
5
2
2
1
10
Vcc = 2.5V
Rload = 16ohm
f = 1KHz
1
0.5
0.2
0.2
Vcc = 2.5V
Rload = 32ohm
f = 1KHz
0.1
0.1
0.05
0.05
0.02
0.02
0.01
0.01
0.005
0.005
0.002
0.002
0.001
0.001
5m
10m
15m
20m
25m
2m
30m
4m
6m
8m
10m
12m
14m
16m
18m
20m
Pout (W)
Pout (W)
Figure 6. THD+Noise vs Amplitude @VCC 2.8V,
Rload 16Ω
Figure 8. THD+Noise vs Amplitude @VCC 2.8V,
Rload 32Ω
THD
(%)
THD
(%)
10
5
10
5
2
2
1
1
Vcc = 2.8V
Rload = 16ohm
f =1KHz
0.5
0.2
0.5
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
0.01
0.005
0.005
0.002
0.002
0.001
5m
10m
15m
Pout (W)
8/13
20m
25m
30m
35m
Vcc = 2.8V
Rload = 32ohm
f = 1KHz
0.001
5m
10m
15m
Pout (W)
20m
25m
30m
TDA7469
Figure 9. TDA7469 Components Layout
Figure 10. TDA7469 P.C. Board Layout (Top view)
9/13
TDA7469
Figure 11. TDA7469 P. C. Board (Backside view)
10/13
TDA7469
Figure 12. SSO24 Mechanical Data & Package Dimensions
mm
inch
OUTLINE AND
MECHANICAL DATA
DIM.
MIN.
TYP.
A
MAX.
MIN.
TYP.
2.00
A1
0.05
A2
1.65
B (2)
MAX.
0.079
0.002
1.85
0.060
0.079
0.22
0.38
0.009
0.015
C
0.09
0.25
0.003
0.01
D (1)
7.9
8.2
8.5
0.31
0.32
0.33
E
7.4
7.8
8.2
0.29
0.30
0.32
E1 (1)
5.0
5.3
5.6
0.20
0.21
0.22
e
L
1.75
0.65
0.55
L1
0.75
0.025
0.95
0.022
1.25
k
0.029
0.004
0.05
0˚ (min), 4˚ (typ), 8˚ (max)
ddd
0.1
0.004
(1) “D and E1” dimensions do not include mold flash or protusions, but do include mold mismatch and are mesaured at
datum plane “H”. Mold flash or protusions shall not exceed
0.20mm in total (both side).
(2) “B” dimension does not include dambar protusion/intrusion.
SSO24
Shrink Small Outline Package
DATUM
PLANE
H
0.25mm
SEATING
PLANE
C
GAGE PLANE
A2
A
K
B
e
A1
ddd
C
C
L
E1
L1
D
24
13
E
1
1
2
SSO24ME
0053237 C
11/13
TDA7469
Table 13. Revision History
Date
Revision
July 2001
1
First Issue
July 2004
2
Removed packages and new style-sheet
15 December 2004
3
Modified value Pomax typ. from 8 to 10mW and add. ESD in table 2
12/13
Description of Changes
TDA7469
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
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