STMICROELECTRONICS TDA7400

TDA7400

ADVANCED CAR SIGNAL PROCESSOR
FULLY INTEGRATED SIGNAL PROCESSOR
OPTIMIZED FOR CAR RADIO APPLICATIONS
FULLY PROGRAMMABLE BY I2C BUS
INCLUDES AUDIOPROCESSOR, STEREO DECODER WITH NOISE BLANKER AND
MULTIPATH DETECTOR
PROGRAMMABLE ROLL-OFF COMPENSATION
NO EXTERNAL COMPONENTS
TQFP44
ORDERING NUMBER: TDA7400
DESCRIPTION
The TDA7400D is the newcomer of the CSP family introduced by TDA7460/61. It uses the same
innovative concepts and design technologies 2allowing fully software programmability through I C
bus and overall cost optimisation for the system
designer.
The device includes an audioprocessor with configurable inputs and absence of external components for filter settings, a last generation
stereodecoder with multipath detector and a so-
phisticated stereoblend and noise cancellation
circuitry.
Strength points of the CSP approach are flexibility
and overall cost/room saving in the application,
combined with high performances.
AUDIO PROCESSOR PART
3
1
22
34
35
39
ACINLR
ACINLF
ACINRR
ACINRF
ACOUTR
SMUTE
CDL CDGND CDR
5
ACOUTL
BLOCK DIAGRAM
38
40
37
OUT LR
2
OUT LF
CDROUT
CDLOUT
AM
TAPE R
VOLUME
4
10
44
43
PH-
TREBLE
BASS
OUT RR
OUT RF
INPUT
MULTIPLEXER
+
AUTO ZERO
TAPE L
PH+
SOFT
MUTE
I C BUS
29
31
24
19
18
MUXL
7
32
23
2
DIGITAL CONTROL
MUXR
8
30
OUT LR
OUT LF
OUT RR
OUT RF
SCL
SDA
MUX R
MUX L
FM_R
FM_L
12
MPX
PILOT
CANCELLATION
80KHz
LP
DEMODULATOR
+ STEREO ADJUST
+ STEREO BLEND
25KHz
LP
S&H
HIGH
CUT
CONTROL
21
QUAL.
QUAL
27
VS
V REF
41
SUPPLY
26
GND
July 1999
PLL
42
CREF
D
PIL
DET
MULTIPATHDETECTOR
15
MPIN
NOISE
BLANKER
16
MPOUT
PULSE
FORMER
A
14
LEVEL
D98AU852B
1/28
TDA7400
ABSOLUTE MAXIMUM RATINGS
Symbol
VS
Parameter
Value
Operating Supply Voltage
Unit
10.5
V
Tamb
Operating Ambient Temperature Range
-40 to 85
°C
Tstg
Operating Storage Temperature Range
-55 to 150
°C
SUPPLY
Symbol
VS
IS
SVRR
Parameter
Test Condition
Supply Voltage
Min.
Typ.
Max.
Unit
7.5
9
10
V
35
mA
Supply Current
VS = 9V
25
30
Ripple Rejection @ 1KHz
Audioprocessor (all filters flat)
50
60
dB
Stereodecoder + Audioprocessor
45
55
dB
Value
Unit
65
°C/W
ESD
All pins are protected against ESD according to the MIL883 standard.
ACOUTR
38 37
ACOUTL
ACINRR
39
36 35
34
N.C.
ACINRF
41 40
ACINLR
ACINLF
43 42
VREF
TAPE L
44
CREF
TAPE R
PIN CONNECTION
CDR
1
33
N.C.
CDROUT
2
32
OUT LF
CDG
3
31
OUT RF
CDLOUT
4
30
OUT LR
CDL
5
29
OUT RR
N.C.
6
28
N.C.
N.C.
AM
10
24
SDA
N.C.
11
23
SCL
18 19
20 21
22
QUAL
17
MUXL
15 16
MPOUT
13 14
LEVEL
12
SMUTE
25
N.C.
9
MUXR
GND
N.C.
N.C.
VS
26
MPIN
27
8
N.C.
7
MPX
PHONEPHONE+
D98AU853
THERMAL DATA
Symbol
Rth-j pins
2/28
Parameter
Thermal Resistance Junction-pins
Max
TDA7400
PIN DESCRIPTION
N.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Name
VREF
CREF
TAPEL
TAPER
CDR
CDGND
CDL
PH PH +
AM
MPX
LEVEL
MPIN
MPOUT
MUXL
MUXR
QUAL
SMUTE
SCL
SDA
GND
VS
OUTRR
OUTLR
OUTRF
OUTLF
ACOUTR
ACOUTL
Function
Reference Voltage Output
Reference Capacitor Pin
Tape Input Left
Tape Input Right
CD Right Channel Input
CD Input Common Ground
CD Input Left Channel
Differential Phone Input Differential Phone Input +
AM Input
FM Stereodecoder Input
Level Input Stereodecoder
Multipath Input
Multipath Output
Multiplexer Output Left Channel
Multiplexer Output Right Channel
Stereodecoder Quality Output
Soft Mute Drive
I2C Clock Line
2
I C Data Line
Supply Ground
Supply Voltage
Right Rear Speaker Output
Left Rear Speaker Output
Right Front Spaeaker Output
Left Front Speaker Output
Pre-speaker AC Output Right Channel
Pre-speaker AC Output Left Channel
Type
I
S
I
I
I
I
I
I
I
I
I
I
I
O
O
O
O
I
I
I/O
S
S
O
O
O
O
O
O
Pin type legenda: I = Input O = Output I/O = Input/Output S = Supply nc = not connected
3/28
TDA7400
Input Multiplexer
Quasi-differential CD and cassette stereo input
AM mono input
Phone differential input
Multiplexer signal after In-Gain available at
separate pins
Treble Control
2nd order frequency response
Center frequency programmable in 4 steps
±15 x 1dB steps
Volume control
1dB attenuator
Max. gain 15dB
Max. attenuation 79dB
Speaker Control
4 independentspeaker controls in 1dB steps
max gain 15dB
max. attenuation 79dB
Bass Control
2nd order frequency response
Center frequency programmable in 4(5) steps
DC gain programmable
±15 x 1dB steps
Mute Functions
Direct mute
Digitally controlled softmute with 4 programmable
mute time
DESCRIPTION OF THE AUDIOPROCESSOR
PART
ELECTRICAL CHARACTERISTICS (VS = 9V; Tamb = 25°C; RL = 10KΩ; all gains = 0dB; f = 1KHz;
unless otherwise specified).
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
70
100
130
KΩ
INPUT SELECTOR
R in
Input Resistance
VCL
Clipping Level
2.2
2.6
SIN
Input Separation
80
100
GIN MIN
Min. Input Gain
-1
0
1
dB
GIN MAX
Max. Input Gain
13
15
17
dB
GSTEP
Step Resolution
VDC
DC Steps
all inputs except Phone
VRMS
dB
0.5
1
1.5
dB
Adjacent Gain Step
-5
0.5
5
mV
GMIN to GMAX
-10
5
10
mV
DIFFERENTIAL CD STEREO INPUT
R in
CMRR
eN
Input Resistance
Differential
70
100
130
KΩ
Common Mode
70
100
130
KΩ
Common Mode Rejection Ratio
VCM = 1VRMS @ 1KHz
45
70
VCM = 1VRMS @ 10KHz
45
60
Output Noise @ Speaker
Outputs
20Hz to 20KHz flat; all stages
0dB
6
dB
dB
15
µV
DIFFERENTIAL PHONE INPUT
R in
CMRR
4/28
Input Resistance
Differential
40
56
KΩ
Common Mode Rejection Ratio
VCM = 1VRMS @ 1KHz
40
70
dB
VCM = 1VRMS @ 10KHz
40
60
dB
TDA7400
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
17
Unit
VOLUME CONTROL
GMAX
Max Gain
13
15
AMAX
Max Attenuation
70
79
ASTEP
Step Resolution
EA
Attenuation Set Error
ET
Tracking Error
VDC
DC Steps
dB
dB
0.5
1
1.5
G = -20 to 20dB
-1.25
0
1.25
dB
dB
G = -60 to 20dB
-4
0
3
dB
2
dB
Adjacent Attenuation Steps
0.1
3
mV
From 0dB to GMIN
0.5
5
mV
1
ms
SOFT MUTE
AMUTE
TD
Mute Attenuation
Delay Time
80
T1
100
0.48
T2
dB
0.96
2
ms
T3
20
40.4
60
ms
T4
200
324
600
ms
1
V
VTHlow
Low Threshold for SM Pin1
VTHhigh
High Threshold for SM Pin
2.5
Internal Pull-up Resistor
70
100
130
KΩ
Control Range
±13
±15
±17
dB
Step Resolution
0.5
1
1.5
dB
fC1
54
60
66
Hz
fC2
63
70
77
Hz
fC3
72
80
88
Hz
fC4
90
100
(150)(2)
110
Hz
1.1
R PD
V
BASS CONTROL
C RANGE
ASTEP
fC
QBASS
DC GAIN
Center Frequency
Quality Factor
Bass-Dc-Gain
Q1
0.9
1
Q2
1.1
1.25
1.4
Q3
1.3
1.5
1.7
Q4
1.8
2
2.2
DC = off
-1
0
1
dB
DC = on
3.5
4.4
5.5
dB
±13
0.5
±15
1
±17
1.5
dB
fC1
8
10
12
KHz
TREBLE CONTROL
C RANGE
ASTEP
fC
Control Range
Step Resolution
Center Frequency
dB
fC2
10
12.5
15
KHz
fC3
12
15
18
KHz
fC4
14
17.5
21
KHz
1) The SM pin is active low (Mute = 0)
2) See Note in Programming Part
5/28
TDA7400
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
35
13
-70
0.5
80
50
15
-79
1
90
65
17
±2
5
KΩ
dB
dB
dB
dB
dB
mV
30
4.5
10
120
4.7
VRMS
KΩ
nF
Ω
V
3
15
µV
6.5
15
µV
SPEAKER ATTENUATORS
R IN
GMAX
AMAX
ASTEP
AMUTE
EE
VDC
Input Impedance
Max Gain
Max Attenuation
Step Resolution
Output Mute Attenuation
Attenuation Set Error
DC Steps
Adjacent Attenuation Steps
0.1
1.5
AUDIO OUTPUTS
VCLIP
RL
CL
ROUT
VDC
Clipping Level
Output Load Resistance
Output Load Capacitance
Output Impedance
DC Voltage Level
d = 0.3%
Output Noise
BW = 20 Hz to 20 KHz
output muted
BW = 20 Hz to 20 KHz
all gain = 0dB
all gain = 0dB flat; VO = 2VRMS
bass treble at 12dB;
a-weighted; VO = 2.6VRMS
VIN = 1VRMS; all stages 0dB
VIN = 1VRMS; Bass & Treble = 12dB
2.2
2
4.3
2.6
GENERAL
e NO
S/N
Signal to Noise Ratio
d
Distortion
SC
ET
Channel separation Left/Right
Total Tracking Error
AV = 0 to -20dB
AV = -20 to -60dB
102
96
110
100
80
-1
-2
0.002
0.05
100
0
0
dB
dB
0.1
0.1
1
2
%
%
dB
dB
dB
BUS INPUTS
V IL
VIH
IIN
VO
6/28
Input Low Voltage
Input High Voltage
Input Current
Output Voltage SDA
Acknowledge
d = 0.3%
VIN = 0.4V
IO = 1.6mA
0.8
2.5
-5
5
0.4
V
V
µA
V
TDA7400
Stereodecoder Part
ELECTRICAL CHARACTERISTICS (VS = 9V; deemphasis time constant = 50µs,
VMPX = 500mV(75KHz deviation), fm= 1KHz, Gv = 6dB, Tamb = 27°C; unless otherwise specified).
Symbol
Parameter
Vin
MPX Input Level
R in
Test Condition
Min.
Gv = 3.5dB
Typ.
Max.
Unit
0.5
1.25
VRMS
Input Resistance
70
100
130
KΩ
GMIN
Min. Input Gain
1.5
3.5
4.5
dB
GMAX
Max. Input Gain
8.5
11
12.5
dB
GSTEP
Step Resolution
1.75
2.5
3.25
dB
SVRR
Supply Voltage Ripple
Rejection
35
60
α
THD
Total Harmonic Distortion
S+N
N
Signal plus Noise to Noise
Ratio
Vripple = 100mV; f = 1KHz
Max. channel Separation
30
dB
50
0.02
A-weighted, S = 2Vrms
80
91
dB
0.3
%
dB
MONO/STEREO-SWITCH
VPTHST1
Pilot Threshold Voltage
for Stereo, PTH = 1
10
15
25
mV
VPTHST0
Pilot Threshold Voltage
for Stereo, PTH = 0
15
25
35
mV
VPTHMO1
Pilot Threshold Voltage
for Mono, PTH = 1
7
12
17
mV
VPTHMO0
Pilot Threshold Voltage
for Mono, PTH = 1
10
19
25
mV
PLL
∆f/f
Capture Range
0.5
%
DEEMPHASIS and HIGHCUT
τHC50
Deemphasis Time Constant
Bit 7, Subadr, 10 = 0,
VLEVEL >> VHCH
25
50
75
µs
τHC75
Deemphasis Time Constant
Bit 7, Subadr, 10 = 1,
VLEVEL >> VHCH
50
75
100
µs
τHC50
Highcut Time Constant
Bit 7, Subadr, 10 = 0,
VLEVEL >> VHCL
100
150
200
µs
τHC75
Highcut Time Constant
Bit 7, Subadr, 10 = 1,
VLEVEL >> VHCL
150
225
300
µs
5
5.3
STEREOBLEND-and HIGHCUT-CONTROL
REF5V
Internal Reference Voltage
TCREF5V
Temperature Coefficient
4.7
3300
V
ppm
LGmin
Min. LEVEL Gain
-1
0
1
dB
LGmax
Max. LEVEL Gain
8
10
12
dB
LGstep
LEVEL Gain Step Resolution
0.3
0.67
1
dB
VSBL min
Min. Voltage for Mono
25
29
33
%REF5V
VSBL max
Min. Voltage for Mono
54
58
62
%REF5V
VSBL step
Step Resolution
2.2
4.2
6.2
%REF5V
VHCHmin
Min. Voltage for NO Highcut
38
42
46
%REF5V
VHCHmax
Min. Voltage for NO Highcut
62
66
70
%REF5V
VHCHstep
Step Resolution
5
8.4
12
%REF5V
VHCLmin
Min. Voltage for FULL Highcut
12
17
22
%VHCH
VHCLmax
Max. Voltage for FULL Highcut
28
33
38
%VHCH
VHCLstep
Step Resolution
2.2
4.2
6.2
%VHCH
7/28
TDA7400
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
40
50
Max.
Unit
75
62
90
dB
dB
dB
dB
65
75
dB
dB
70
dB
75
dB
95
84
dB
dB
Carrier and harmonic suppression at the output
α19
α38
α57
α76
Pilot Signal f = 19KHz
Subcarrier f = 38KHz
Subcarrier f = 57KHz
Subcarrier f = 76KHz
Intermodulation (Note 1)
α2
α3
fmod = 10KHz, fspur = 1KHz
fmod = 13KHz, fspur = 1KHz
Traffic Ratio (Note 2)
α57
Signal f = 57KHz
SCA - Subsidiary Communications Authoorization (Note 3)
α67
Signal f = 67KHz
ACI - Adjacent Channel Interference (Note 4)
α114
α190
Signal f = 114KHz
Signal f = 190KHz
Notes to the characteristics:
1. Intermodulation Suppression:
α2 =
α3 =
VO(signal)(at1KHz)
VO(spurious)(at1KHz)
; fs = (2 x 10KHz) − 19KHz
VO(signal)(at1KHz)
; fs = (3 x 13KHz) − 38KHz
VO(spurious)(at1KHz)
measured with: 91% pilot signal; fm = 10kHz or 13kHz.
2. Traffic Radio (V.F.) Suppression: measured with: 91% stereo signal; 9% pilot signal; fm=1kHz; 5% subcarrier (f = 57kHz,
fm = 23Hz AM, m = 60%)
α57 (V.W>F.) =
VO(signal)(at1KHz)
VO(spurious)(at1KHz +⁄− 23KHz)
3. SCA ( Subsidiary Communications Authorization ) measured with: 81% mono signal; 9% pilot signal; fm = 1kHz; 10%SCA - subcarrier
( fs = 67kHz, unmodulated ).
α67 =
4. ACI ( Adjacent Channel Interference ):
VO(signal)(at1KHz)
; FS = (2 x 38KHz) −67KHz
VO(spurious)(at9KHz)
α114 =
α190 =
VO(signal)(at1KHz)
VO(spurious)(at4KHz)
VO(signal)(at1KHz)
VO(spurious)(at4KHz)
; FS = 110KHz − (3 x 38KHz)
; FS = 186KHz − (5 x 38KHz)
measured with: 90% mono signal; 9% pilot signal; fm =1kHz; 1% spurious signal ( fs = 110kHz or 186kHz, unmodulated).
8/28
TDA7400
NOISE BLANKER PART
internal 2nd order 140kHz high pass filter
programmable trigger threshold
trigger threshold dependent on high frequency
noise with programmable gain
additional circuits for deviation and fieldstrength dependent trigger adjustment
very low offset current during hold time due to
opamps wMOS inputs
four selectable pulse suppression times
programmable noise rectifier charge/discharge
current
ELECTRICAL CHARACTERISTICS (continued)
Symbol
VTR
Parameter
Trigger Threshold 0) 1)
Test Condition
meas. with VPEAK = 0.9V
VTRNOISE
Noise Controlled Trigger
Threshold 2)
meas. with VPEAK = 1.5V
Rectifier Voltage
VMPX = 0mV
VMPX = 50mV; f = 150KHz
VMPX = 200mV; f = 150KHz
OVD = 11
means. with
VMPX = 800mV
OVD = 10
(75KHz dev.)
OVD = 01
OVD = 00
FSC = 11
means. with
VMPX = 0mV
FSC = 10
VLEVEL << VSBL
FSC = 01
(fully mono)
FSC = 00
Signal HOLDN
BLT = 00
in Testmode
BLT = 10
BLT = 01
BLT = 00
Signal PEAK in
NRD = 00 6)
Testmode
NRD = 01 6)
NRD = 10 6)
NRD = 11 6)
Signal PEAK in
PCH = 0 7)
7)
Testmode
PCH = 1
VRECT
VRECT DEV
deviation dependent
rectifier Voltage 3)
VRECT FS
Fieldstrength Controlled
Rectifier Voltage 4)
TS
Suppression Pulse
Duration 5)
VRECTADJ
Noise Rectifier
discharge adjustment 6)
SR PEAK
Noise Rectifier Charge
NBT = 111
NBT = 110
NBT = 101
NBT = 100
NBT = 011
NBT = 010
NBT = 001
NBT = 000
NCT = 00
NCT = 01
NCT = 10
NCT = 11
NRD 6) = 00
Min.
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
0.5
1.5
2.2
0.5
0.9
1.7
2.5
0.5
0.9
1.7
2.1
TBD
TBD
TBD
TBD
(c)
(c)
(c)
(c)
(c)
(c)
Typ.
30
35
40
45
50
55
60
65
260
220
180
140
0.9
1.7
2.5
0.9(off)
1.2
2.0
2.8
0.9(off)
1.4
1.9
2.4
38
32
25.5
22
0.3
0.8
1.3
2.0
10
20
Max.
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
(c)
1.3
2.1
2.9
1.3
1.5
2.3
3.1
1.3
1.5
2.3
3.1
TBD
TBD
TBD
TBD
(c)
(c)
(c)
(c)
(c)
(c)
Unit
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
mVOP
V
V
V
VOP
VOP
VOP
VOP
V
V
V
V
µs
µs
µs
µs
V/ms
V/ms
V/ms
V/ms
mV/µs
mV/µs
(c) = by design/characterization functionally guaranteed through dedicated test mode structure
9/28
TDA7400
ELECTRICAL CHARACTERISTICS (continued)
Symbol
VADJMP
Parameter
Noise Rectifier adjustment
8)
through Multipath
Test Condition
Signal PEAK in
MPNB = 00 8)
Testmode
MPNB = 01 8)
MPNB = 10 8)
MPNB = 11 8)
Min.
(c)
(c)
(c)
(c)
Typ.
0.3
0.5
0.7
0.9
Max.
(c)
(c)
(c)
(c)
Unit
V/ms
V/ms
V/ms
V/ms
0) All Thresholds are measured using a pulse with TR =2µs, THIGH = 2µs and TF = 10µs. The repetition rate must not increase the PEAK voltage.
1) NBT represents the Noiseblanker Byte bits D2, D0 for the noise blanker trigger threshold
2) NAT represents the Noiseblanker Byte bit pair D 4, D3 for the noise controlled triggeradjustment
3) OVD represents the Noiseblanker Byte bit pair D 7, D6 for the over deviation detector
4) FSC represents the Fieldstrength Byte bit pair D 1, D0 for the fieldstrength control
5) BLT represents the Speaker RR Byte bit pair D7, D6 for the blanktime adjustment
6) NRD represents the Configuration-Byte bit pair D1, D0 for the noise rectifier discharge-adjustment
7) PCH represents the Stereodecoder-Byte bit D5 for the noise rectifier charge-current adjustment
8) MPNB represents the HighCut-Byte bit D 7 and the Fieldstrength-Byte D7 for the noise rectifier multipath adjustment
VIN
VOP
DC
TR
D97AU636
THIGH
Figure 1. Trigger Threshold vs.VPEAK
Time
TF
Figure 2. Deviation Controlled Trigger Adjustment
VTH
VPEAK
(VOP)
00
260mV(00)
220mV(01)
180mV(10)
2.8
01
140mV(11)
2.0
10
MIN. TRIG. THRESHOLD
NOISE CONTROLLED
TRIG. THRESHOLD
1.2
0.9
DETECTOR OFF (11)
65mV
8 STEPS
30mV
D97AU649
0.9V
10/28
D97AU648
1.5V
VPEAK(V)
20
32.5
45
75
DEVIATION(KHz)
TDA7400
Figure 3. Fieldstrength Controlled Trigger Adjustment
VPEAK
MONO
STEREO
»3V
2.4V(00)
1.9V(01)
1.4V(10)
NOISE
0.9V
ATC_SB OFF (11)
noisy signal
D97AU650
Multipath Detector
Internal 19kHz band pass filter
Programmable band pass and rectifier gain
good signal
E’
two pin solution fully independent usable for
external programming
selectable internal influence on Stereoblend
ELECTRICAL CHARACTERISTICS (continued)
Symbol
fCMP
GBPMP
GRECTMP
ICHMP
IDISMP
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Center Frequency of MultipathBandpass
stereodecoder locked on Pilottono
19
KHz
Bandpass Gain
bits D2, D1 configuration byte = 00
6
dB
bits D2, D1 configuration byte = 10
12
dB
bits D2, D1 configuration byte = 01
16
dB
bits D2, D1 configuration byte = 11
18
dB
bits D7, D6 configuration byte = 00
7.6
dB
bits D7, D6 configuration byte = 01
4.6
dB
bits D7, D6 configuration byte = 10
0
dB
bits D7, D6 configuration byte = 11
off
dB
bit D5 configuration byte = 0
0.5
µA
bit D5 configuration byte = 1
1.0
Rectifier Gain
Rectifier Charge Current
Rectifier Discharge Current
0.5
1
1.5
µA
mA
Min.
Typ.
Max.
Unit
Quality Detector
Symbol
A
Parameter
Multipath Influence Factor
Test Condition
bit D7 High-Cut byte +
bit D7 Fieldstrength byte +
00
01
10
11
0.7
0.85
1.00
1.15
11/28
TDA7400
erated through the leakage current of the coupling capacitors, are not cancelled).
The auto-zeroing is started every time the DATABYTE 0 is selected and takes a time of max.
0.3ms. To avoid audible clicks the audioprocessor is muted before the volume stage during this
time.
Input Multiplexer
CD quasi differential
Cassette stereo
Phone differential
AM mono
Stereodecoder input.
AutoZero Remain
In some cases, for example if the µP is executing
2
a refresh cycle of the I C bus programming, it is
not useful to start a new AutoZero action because
no new source is selected and an undesired mute
would appear at the outputs. For such applications the TDA7400D could be switched in the
”Auto Zero Remain mode” (Bit 6 of the subaddress byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the
AutoZero and the old adjustment value remains.
Input stages
Most of the input stages have remained the same
as in preceeding ST audioprocessors with exception of the CD inputs (see figure 4).
In the meantime there are some CD players in
the market having a significant high source impedance which affects strongly the commonmode rejection of the normal differential input
stage. The additional buffer of the CD input
avoids this drawback and offers the full commonmode rejection even with those CD players.
The output of the Cd stage is permanently available of the Cd out-pins
Multiplexer Output
The output signal of the Input Multiplexer is available at separate pins (please see the Blockdiagram). This signal represents the input signal amplifier by the In Gain stage and is also going into
the Mixer stage.
AutoZero
In order to reduce the number of pins there is no
AC coupling between the In-Gain and the following stage, so that any offset generated by or before the In-Gain stage would be transferred or
even amplified to the output.
To avoid that effect a special offset cancellation
stage called AutoZero is implemented.
This stage is located before the volume-block to
eliminate all offsets generated by the Stereodecoder, the Input Stage and the In-Gain (Please
notice that externally generated offsets, e.g. gen-
Softmute
The digitally controlled softmute stage allows
2
muting/demuting the signal with a I C bus programmable slope. The mute process can either
be activated by the softmute pin or by the I2C
bus. The slope is realized in a special S shaped
curve to mute slow in the critical regions (see figure 5).
For timing purposes the Bit 3 of the I2C bus output register is set to 1 from the start of muting un-
Figure 4. Input stages
15K
CD+
15K
1
100K
+
CD OUT
15K
15K
1
CD100K
15K
15K
PHONE+
+
15K
15K
IN GAIN
PHONECASSETTE
100K
AM
100K
STEREODECODER
MPX
100K
D98AU854A
12/28
TDA7400
Quality Factors
Figure 8 shows the four possible quality factors 1,
1.25, 1.5 and 2.
Figure 5. Softmute Timing
EXT.
MUTE
DC Mode
In this mode the DC gain is increased by 5.1dB.
In addition the programmed center frequency and
quality factor is decreased by 25% which can be
used to reach alternative center frequencies or
quality factors.
1
+SIGNAL
REF
-SIGNAL
TREBLE
There are two parameters programmable in the
treble stage (see figs 10, 11):
1
2
I C BUS
OUT
D97AU634
Time
Note: Please notice that a started Mute action is always terminated
and could not be interrupted by a change of the mute signal.
til the end of demuting.
Bass
There are four parameters programmable in the
bass stage: (see figs 6, 7, 8, 9):
Attenuation
Figure 10 shows the attenuation as a function of
frequency at a center frequency of 17.5KHz.
Center Frequency
Figure 11 shows the four possible Center Frequency (10, 12.5, 15 and 17.5kHz).
Central Frequency
Figure 7 shows the four possible center frequencies 60,70,80 and 100Hz.
Speaker Attenuator
The speaker attenuators have exactely the same
structure and range like the Volume stage.
FUNCTIONAL DESCRIPTION OF STEREODECODER
The stereodecoder part of the TDA7400D (see
Fig. 12) contains all functions necessary to demodulate the MPX signal like pilot tone dependent MONO/STEREO switching as well as
”stereoblend” and ”highcut” functions.
Figure 6. Bass Control @ fc = 80Hz, Q = 1
Figure 7. Bass Center @ Gain = 14dB, Q = 1
15.0
15.0
10.0
12.5
5.0
10.0
Attenuation
Figure 6 shows the attenuation as a function of
frequency at a center frequency at a center frequency of 80Hz.
7.5
0.0
5.0
-5.0
2.5
-10.0
0.0
-15.0
10.0
100.0
1.0K
10.0K
10.0
100.0
1.0K
10.0K
13/28
TDA7400
Figure 8. Bass Quality factors @ Gain = 14dB,
fc = 80Hz
Figure 9. Bass normal and DC Mode @ Gain =
14dB, fc = 80Hz
15.0
15.0
12.5
12.5
10.0
10.0
7.5
7.5
5.0
5.0
2.5
2.5
0.0
0.0
10.0
10.0
100.0
1.0K
100.0
1.0K
10.0K
10.0K
Figure 10. Treble Control @ fc = 17.5KHz
Note: In general the center frequency, Q and DC-mode can be set
independently. The exception from this rule is the mode (5/xx1111xx)
where the center frequency is set to 150Hz instead of 100Hz.
Figure 11. Treble Center Frequencies
@ Gain = 14dB
15.0
15.0
10.0
12.5
5.0
10.0
0.0
7.5
-5.0
5.0
-10.0
2.5
-15.0
10.0
0.0
100.0
1.0K
10.0K
Stereodecoder Mute
The TDA7400D has a fast and easy to control
RDS mute function which is a combination of the
14/28
10.0
100.0
1.0K
10.0K
audioprocessor’s softmute and the high-ohmic
mute of the stereodecoder. If the stereodecoder
is selected and a softmute command is sent (or
activated through the SM pin) the stereodecoder
TDA7400
will be set automatically to the high-ohmic mute
condition after the audio signal has been softmuted.
Hence a checking of alternate frequencies could
be performed. To release the system from the
mute condition simply the unmute command must
be sent: the stereodecoder is unmuted immediately and the audioprocessor is softly unmuted.
Fig. 13 shows the output signal VO as well as the
internal stereodecoder mute signal. This influence of Softmute on the stereodecoder mute can
be switched off by setting bit 3 of the Softmute
byte to ”0”. A stereodecoder mute command (bit
0, stereodecoder byte set to ”1”) will set the
stereodecoder in any case independently to the
high-ohmic mute state.
If any other source than the stereodecoder is selected the decoder remains muted and the MPX
pin is connected to Vref to avoid any discharge of
the coupling capacitor through leakage currents.
Ingain + Infilter
The Ingain stage allows to adjust the MPX signal
to a magnitude of about 1Vrms internally which is
the recommended value. The 4th order input filter
has a corner frequency of 80KHz and is used to
attenuate spikes and nose and acts as an anti allasing filter for the following switch capacitor filters.
Demodulator
In the demodulator block the left and the right
channel are separated from the MPX signal. In
this stage also the 19 kHz pilot tone is cancelled.
For reaching a high channel separation the
TDA7400D offers an I2C bus programmable rolloff adjustment which is able to compensate the
lowpass behaviour of the tuner section. If the
tuner attenuation at 38kHz is in a range from
13.8% to 24.6% the TDA7400D needs no external network in front of the MPX pin. Within this
range an adjustment to obtain at least 40dB
channel separation is possible.
The bits for this adjustment are located together
with the fieldstrength adjustment in one byte. This
gives the possibility to perform an optimization
step during the production of the carradio where
the channel separation and the fieldstrength control are trimmed.
The setup of the Stereoblend characteristics
which is programmable in a wide range is described in 2.8.
Figure 12. Block Diagram of the Stereodecoder
INGAIN
MPX
INFILTER
3.5 ... 11dB
STEP 2.5dB
LP 80KHz
4.th ORDER
100K
PLL +
PILOT-DET.
DEEMPHASIS
+ HIGHCUT
DEMODULATOR
- PLOT CANC
- ROLL-OFF COMP.
- LP 25KHz
t=50 or 75µs
REF 5V
SB CONTROL
VSBL
F19
FM_L
FM_R
HC
CONTROL
D
A
VHCCH
VHCCL
F38
STEREO
MPINFL
NOISE BLANKER
LEVEL INPUT
LEVEL INTERN
-
HOLDN
NOISE
MULTIPATH
DETECTOR
MPLEVELOUT
MP_OUT
MP_IN
LP 2.2KHZ
1.th ORDER
GAIN 0..10dB
LEVEL
QUALITY DETECTOR
+
QUAL
D98AU855
15/28
TDA7400
Figure 13. Signals During Stereodecoder’s
Softmute
Figure 14. Internal Stereoblend Characteristics
SOFTMUTE
COMMAND
t
STD MUTE
t
VO
D97AU638
t
Deemphasis and Highcut.
The lowpass filter for the deemphasis allows to
choose between a time constant of 50µs and
75µs (bit D7, Stereodecoder byte).
The highcut control range will be in both cases
τHC = 2 ⋅ τDeemp. Inside the highcut control range
(between VHCH and VHCL) the LEVEL signal
is converted into a 5 bit word which controls the
lowpass time constant between τDeemp...3⋅
τDeemp. There by the resolution will remain always
5 bits independently of the absolute voltage
range between the VHCH and VHCL values.
The highcut function can be switched off by I2C
bus (bit D7, Fieldstrength byte set to ”0”).
The setup of the highcut characteristics is described in 2.9.
LEVEL Input and Gain
To suppress undesired high frequency modulation on the highcut and stereoblend function the
LEVEL signal is lowpass filtered firstly.
The filter is a combination of a 1st order RC lowpass at 53kHz (working as anti-aliasing filter) and
a 1st-order switched capacitor lowpass at 2.2kHz.
The second stage is a programmable gain stage
to adapt the LEVEL signal internally to different IF
device (see Testmode section 5 LEVELINTERN).
The gain is widely programmable in 16 steps
from 0dB to 10dB (step = 0.67dB). These 4 bits
are located together with the Roll-Off bits in the
”Stereodecoder Adjustment” byte to simplify a
possible adaptation during the production of the
carradio.
PLL and Pilot Tone Detector
The PLL has the task to lock on the 19kHz pilotone during a stereo transmission to allow a correct demodulation. The included detector enables
the demodulation if the pilot tone reaches the selected pilot tone threshold VPTHST. Two different
thresholds are available. The detector output (signal STEREO, see block diagram) can be checked
by reading the status byte of the TDA7400D via
I2C bus.
Stereoblend Control
The stereoblend control block converts the internal LEVEL voltage (LEVEL INTERN) into an demodulator compatible analog signal which is used
to control the channel separation between 0dB
and the maximum separation. Internally this control range has a fixed upper limit which is the internal reference voltage REF5V. The lower limit
can be programmed between 29.2% and 58%, of
REF5V in 4.167% steps (see figs. 11, 12).
To adjust the external LEVEL voltage to the internal range two values must be defined: the LEVEL
gain LG and VSBL (see fig. 12). To adjust the
voltage where the full channel separation is
reached (VST) the LEVEL gain LG has to be defined. The following equation can be used to estimate the gain:
Fieldstrength Control
The fieldstrength input is used to control the high
cut and the stereoblend function. In addition the
signal can be also used to control the noiseblanker thresholds and as input for the multipath
detector. These additional functions are described in sections 3.3 and 4.
16/28
TDA7400
Figure 15. Relation Between Internal and External LEVEL Voltage and Setup of Stereoblend
INTERNAL
VOLTAGES
INTERNAL
VOLTAGES
SETUP OF VST
SETUP OF VMO
LEVEL INTERN
REF 5V
REF 5V
LEVEL
VSBL
VSBL
VMO
VST
LOWPASS
TIME CONSTANT
3•τDeemp
τDeemp
VHCL
VHCH
58%
50%
42%
33%
t
FIELDSTRENGHT VOLTAGE
Figure 16. Highcut Characteristics
FIELDSTRENGHT
D97AU640
LG =
LEVEL INTERN
REF5V
Fieldstrengthvoltage[STEREO]
The gain can be programmed through 4 bits in
the ”Stereodecoder-Adjustment”byte.
The MONO voltage VMO (0dB channel separation) can be choosen selecting VSBL
All necessary internal reference voltages like
REF5V are derived from a bandgap circuit.
Therefore they have a temperature coefficient
near zero. This is useful if the fieldstrength signal
is also temperature compensated.
But most IF devices apply a LEVEL voltage with a
TC of 3300ppm. The TDA7400D offers this TC
for the reference voltages, too. The TC is selectable with bit D7 of the ”stereodecoder adjustment”
byte.
Highcut Control
The highcut control setup is similar to the
D97AU639
VMO
VST
t
FIELDSTRENGHT VOLTAGE
stereoblend control setup : the starting point
VHCH can be set with 2 bits to be 42, 50, 58 or
66% of REF5V whereas the range can be set to
be 17, 22, 28 or 33% of VHCH (see fig. 21).
FUNCTIONAL DESCRIPTION OF THE NOISEBLANKER
In the automotive environment the MPX signal is
disturbed by spikes produced by the ignition and
for example the wiper motor. The aim of the
noiseblanker part is to cancel the audible influence of the spikes.
Therefore the output of the stereodecoder is held
at the actual voltage for a time between 22 and
38µs (programmable).
The block diagram of the noiseblanker is given in
fig.17.
In a first stage the spikes must be detected but to
avoid a wrong triggering on high frequency
(white) noise a complex trigger control is implemented. Behind the triggerstage a pulse former
generates the ”blanking” pulse. To avoid any
crosstalk to the signalpath the noiseblanker is
supplied by his own biasing circuit.
Trigger Path
The incoming MPX signal is highpass filtered,
amplified and rectified. This second order highpass-filter has a corner frequency of 140kHz.
The rectified signal, RECT, is lowpass filtered to
generate a signal called PEAK. Also noise with a
frequency 140kHz increases the PEAK voltage.
The resulting voltage can be adjusted by use of
the noise rectifier discharge current.
The PEAK voltage is fed to a threshold generator,
which adds to the PEAK voltage a DC dependent threshold VTH. Both signals, RECT and
17/28
TDA7400
PEAK+VTH are fed to a comparator which triggers a re-triggerable monoflop. The monoflop’s
output activates the sample-and-hold circuits in
the signalpath for selected duration.
noisy is fixed by the RF part. Therefore also the
starting point of the normal noise-controlled trigger adjustment is fixed (fig. 11). In some cases
the behaviour of the noiseblanker can be improved by increasing the threshold even in a region of higher fieldstrength. Sometimes a wrong
triggering occures for the MPX signal often shows
distortion in this range which can be avoided
even if using a low threshold.
Because of the overlap of this range and the
range of the stereo/mono transition it can be controlled by stereoblend. This threshold increase is
programmable in 3 steps or switched off with bits
D0 and D1 of the fieldstrength control byte.
Automatic Noise Controlled Threshold Adjustment (ATC)
There are mainly two independent possibilities for
programming the trigger threshold:
a the low threshold in 8 steps (bits D0 to D2 of
the noiseblanker byte)
b the noise adjusted threshold in 4 steps
(bits D3 and D4 of the noiseblanker byte,
see fig. 14).
The low threshold is active in combination with a
good MPX signal without any noise; the PEAK
voltage is less than 1V. The sensitivity in this operation is high.
If the MPX signal is noisy the PEAK voltage increases due to the higher noise, which is also
rectified. With increasing of the PEAK voltage the
trigger threshold increases, too. This particular
gain is programmable in 4 steps (see fig. ...).
Over Deviation Detector
If the system is tuned to stations with a high deviation the noiseblanker can trigger on the higher
frequencies of the modulation. To avoid this
wrong behaviour, which causes noise in the output signal, the noiseblanker offers a deviation dependent threshold adjustment.
By rectifying the MPX signal a further signal representing the actual deviation is obtained. It is
used to increase the PEAK voltage. Offset and
gain of this circuit are programmable in 3 steps
with the bits D6 and D7 of the stereodecoder byte
(the first step turns off the detector, see fig. 15).
AUTOMATIC THRESHOLD CONTROL MECHANISM
FUNCTIONAL DESCRIPTION OF THE MULTIPATH DETECTOR
Using the internal multipath detector the audible
effects of a multipath condition can be minimized.
A multipath condition is detected by rectifying the
19kHz spectrum in the fieldstrength signal.
An external capacitor is used to define the attack
and decay times (see block diagram fig. 23). the
Automatic Threshold Control
by the
Stereoblend Voltage
Besides the noise controlled threshold adjustment there is an additional possibility for influencing the trigger threshold. It is depending on the
stereoblend control.
The point where the MPX signal starts to become
Figure 17. Block Diagram of the Noiseblanker
MPX
RECTIFIER
RECT
+
MONOFLOP
-
+
VTH
PEAK
THRESHOLD
GENERATOR
LOWPASS
+
MPX
CONTROL
D98AU856
18/28
ADDITIONAL
THRESHOLD
CONTROL
HOLDN
TDA7400
Figure 18. Block Diagram of the Multipath Detector
LEVEL
to SB
VDD
int. INFLUENCE
CHARGE
1 bit
MP_IN
BANDPASS
19KHz
RECTIFIER
MPOUT
GAIN
2 BITS
GAIN
2 BITS
MPOUT pin is used as detector output connected
to a capacitor of about 47nF and additionally the
MPIN pin is selected to be the fieldstrength input.
Using the configuration an external adaptation to
the user’s requiremet is given in fig.25.
Selecting the ”internal influence” in the configuration byte, the channel separation is automatically
reduced during a multipath condition according to
the voltage appearing at the MP_OUT pin. A
possible application is shown in fig. 26.
Programming
To obtain a good multipath performance an adaptation is necessary. Therefore tha gain of the
19kHz bandpass is programmable in four steps
as well as the rectifier gain. The attack and decay
times can be set by the external capacitor value.
QUALITY DETECTOR
The TDA7400D offers a quality detector output
which gives a voltage representing the FM reception conditions. To calculate this voltage the MPX
noise and the multipath detector output are
summed according to the following formula:
47nF
D98AU857
tional influences. The factor ”a” can be programmed from 0.7 to 1.15. the output is a low impedance output able to drive external circuitry as
well as simply fed to an A/D converter for RDS
applications.
TEST MODE
During the test mode which can be activated by
setting bit D0 of the testing byte and bit D5 of the
subaddress byte to ”1” several internal signals
are available at the CASSR pin.
During this mode the input resistor of 100kOhm is
disconnected from the pin. The internal signals
available are shown in the software specification.
I2C BUS INTERFACE DESCRIPTION
Interface Protocol
The interface protocol comprises:
-a start condition (S)
-a chip address byte (the LSB bit determines read
/ write transmission)
-a subaddress byte
-a sequence of data (N-bytes + acknowledge)
-a stop condition (P)
Quality = 1.6 (Vnoise -0.8V)+ a (REF5V- VMPOUT)
The noise signal is the PEAK signal without addi-
19/28
TDA7400
CHIP ADDRESS
MSB
S
1
SUBADDRESS
LSB
0
0
0
1
1
DATA 1 to DATA n
MSB
0 R/W ACK
LSB
X AZ T
I A3 A2 A1 A0
MSB
LSB
ACK
DATA
ACK
P
D97AU627
S = Start
ACK = Acknowledge
AZ = AutoZero-Remain
T = Testing
I = Autoincrement
P = Stop
MAX CLOCK SPEED 500kbits/s
Auto increment
If bit I in the subaddress byte is set to ”1”, the
autoincrement of the subaddress is enabled.
The transmitted data is automatically updated after each ACK. Transmission can be repeated
without new chip address.
SM = 1 Soft mute activated
ST = 1 Stereo mode
X = Not Used
TRANSMITTED DATA (send mode)
MSB
X
LSB
X
X
X
ST
SM
SUBADDRESS (receive mode)
MSB
I3
LSB
I2
I1
I0
A3
A2
A1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
20/28
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
FUNCTION
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
AntiRadiation Filter
off
on
AutoZero Remain
off
on
Testmode
off
on
Auto Increment Mode
off
on
Databyte Addressing
Input Selector
Volume
Treble
Bass
Speaker attenuator LF
Speaker attenuator RF
Speaker attenuator LR
Speaker attenuator RR
SoftMute / Bass Prog.
Stereodecoder
Noiseblanker
High Cut Control
Fieldstrength & Quality
Configuration
Stereodecoder Adjustment
Testing
X
X
TDA7400
DATA BYTE SPECIFICATION
Input Selector (subaddress 0H)
MSB
D7
LSB
D6
0
0
:
1
1
D5
0
0
:
1
1
D4
0
0
:
1
1
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
FUNCTION
Source Selector
CD
Cassette
Phone
AM
Stereo Decoder
AC Inputs Front
Mute
AC inputs Rear
In-Gain
15dB
14dB
:
1 dB
0 dB
0
1
:
0
1
Coupl. Front Speaker
external
internal
0
1
Volume and Speaker Attenuation (subaddress 1H, 4H, 5H, 6H, 7H)
MSB
LSB
FUNCTION
D7
D6
D5
D4
D3
D2
D1
D0
1
:
1
1
0
:
0
0
0
:
0
0
1
:
1
1
1
:
0
0
1
:
0
0
1
:
0
0
1
:
1
0
1
:
1
0
0
0
:
0
0
:
0
0
0
:
0
0
0
0
:
0
0
:
1
1
0
:
0
0
0
0
:
0
0
:
0
0
0
:
0
0
0
0
:
0
1
:
0
0
1
:
0
0
0
0
:
1
0
:
1
1
1
:
0
0
0
0
:
1
0
:
1
1
1
:
0
0
0
0
:
1
0
:
1
1
1
:
1
0
0
1
:
1
0
:
0
1
+15dB
:
+1dB
0dB
0dB
-1dB
:
-15dB
-16dB
:
-78dB
-79dB
X
1
1
X
X
X
X
X
Mute
not used configurations
21/28
TDA7400
Treble Filter (subaddress 2H)
MSB
D7
LSB
D6
0
0
1
1
D5
D4
D3
D2
D1
D0
0
0
:
0
0
1
1
:
1
1
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
1
:
0
1
1
0
:
1
0
FUNCTION
Treble Steps
-15dB
-14dB
:
-1dB
0dB
0dB
+1dB
:
+14dB
+15dB
Treble Center Frequency
10.0KHz
12.5KHz
15.0KHz
17.5KHz
0
1
0
1
Coupl. Rear Speaker
external (AC)
internal
0
1
Bass Filter (subaddress 3H)
MSB
D7
LSB
D6
0
0
1
1
0
1
22/28
D5
0
1
0
1
D4
D3
D2
D1
D0
0
0
:
0
0
1
1
:
1
1
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
1
:
0
1
1
0
:
1
0
FUNCTION
Bass Steps
-15dB
-14dB
:
-1dB
0dB
0dB
+1dB
:
+14dB
+15dB
Bass Q-Factor
1.0
1.25
1.50
2.0
Bass DC Mode
off
on
TDA7400
Soft Mute and Bass Programming (subaddress 8H)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
1
1
0
1
0
1
0
1
0
0
1
1
1
0
0
1
1
FUNCTION
Mute
Enable Soft Mute
Disable Soft Mute
Mutetime = 0.48ms
Mutetime = 0.96ms
Mutetime = 40.4ms
Mutetime = 324ms
Stereodecoder Soft Mute Influence = on
Stereodecoder Soft Mute Influence = off
Bass Center Frequency
Center Frequency = 60 Hz
Center Frequency = 70 Hz
Center Frequency = 80 Hz
Center Frequency = 100Hz
Center Frequency = 150Hz (1)
0
1
0
1
1
Noise Blanker Time
Center Frequency = 38µs
Center Frequency = 25.5µs
Center Frequency = 32µs
Center Frequency = 22µs
0
1
0
1
(1) Only for Bass Q-Factor = 2.0
Stereodecoder (subaddress 9H)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
0
FUNCTION
D0
STD Unmuted
STD Muted
In Gain 8.5dB
In Gain 6dB
others combinations not used
must be ”1”
Forced Mono
Mono/Stereo switch automatically
Noiseblanker PEAK charge current low
Noiseblanker PEAK charge current high
Pilot Threshold HIGH
Pilot Threshold LOW
Deemphasis 50µs
Deemphasis 75µs
23/28
TDA7400
Noiseblanker (subaddress AH)
MSB
D7
LSB
D6
D5
D4
0
0
1
1
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Low
Low
Low
Low
Low
Low
Low
Low
Threshold 65mV
Threshold 60mV
Threshold 55mV
Threshold 50mV
Threshold 45mV
Threshold 40mV
Threshold 35mV
Threshold 30mV
Noise Controlled Threshold 320mV
Noise Controlled Threshold 260mV
Noise Controlled Threshold 200mV
Noise Controlled Threshold 140mV
0
1
0
1
0
1
0
0
1
1
FUNCTION
Noise blanker OFF
Noise blanker ON
Over
Over
Over
Over
0
1
0
1
deviation Adjust 2.8V
deviation Adjust 2.0V
deviation Adjust 1.2V
deviation Detector OFF
High Cut (subaddress BH)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
24/28
0
1
0
1
0
1
0
1
0
1
0
1
FUNCTION
D0
High Cut OFF
High Cut ON
Max.
Max.
Max.
Max.
High Cut 2dB
High Cut 5dB
High Cut 7dB
High Cut 10dB
VHCH at
VHCH at
VHCH at
VHCH at
VHCL
VHCL
VHCL
VHCL
42% REF 5V
50% REF 5V
58% REF 5V
66% REF 5V
at 16.7%
at 22.2%
at 27.8%
at 33.3%
VHCH
VHCH
VHCH
VHCH
Strong Multipath influence on PEAK 18K
OFF
ON (18K Discharge if VMPOUT <2.5V)
TDA7400
Fieldstrength Control (subaddress CH)
MSB
D7
LSB
D6
D5
D4
0
0
1
1
0
0
1
1
D3
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
FUNCTION
VSBL at 29%
VSBL at 33%
VSBL at 38%
VSBL at 42%
VSBL at 46%
VSBL at 50%
VSBL at 54%
VSBL at 58%
REF 5V
REF 5V
REF 5V
REF 5V
REF 5V
REF 5V
REF 5V
REF 5V
Noiseblanker Field
Noiseblanker Field
Noiseblanker Field
Noiseblanker Field
0
1
0
1
strength Adj
strength Adj
strength Adj
strength Adj
2.3V
1.8V
1.3V
OFF
Quality Detector Coefficient a = 0.7
Quality Detector Coefficient a = 0.85
Quality Detector Coefficient a = 1.0
Quality Detector Coefficient a = 1.15
0
1
0
1
0
1
Multipath off influence on PEAK discharge
-1V/ms (at MPout = 2.5V
Configuration (subaddress DH)
MSB
D7
LSB
D6
D5
D4
D3
0
1
0
1
0
1
0
1
0
0
1
1
0
1
0
1
D2
0
0
1
1
D1
D0
0
0
1
1
0
1
0
1
FUNCTION
Noise Rectifier Discharge Resistor
R = infinite
R = 56kΩ
R = 33kΩ
R =18kΩ
Multipath Detector Bandpass Gain
6dB
12dB
16dB
18dB
Multipath Detector internal influence
ON
OFF
Multipath Detector Charge Current 0.5µA
Multipath Detector Charge Current 1µA
Multipath Detector Reflection Gain
Gain = 7.6dB
Gain = 4.6dB
Gain = 0dB
disabled
25/28
TDA7400
Stereodecoder Adjustment (subaddress EH)
MSB
D7
LSB
D6
0
0
0
:
1
D5
D4
0
0
1
:
1
0
0
0
:
1
D3
D2
D1
D0
0
0
0
:
1
:
1
0
0
1
:
0
:
1
0
1
0
:
0
:
1
FUNCTION
Roll Off Compensation
not allowed
19.6%
21.5%
:
25.3%
:
31.0%
Level Gain
0dB
0.66dB
1.33dB
:
10dB
0
1
0
:
1
1
must be ”1”
Testing (subaddress FH)
MSB
D7
LSB
D6
D5
D4
D3
D2
D1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
FUNCTION
D0
Stereodecoder test signals
OFF
Test signals enabled if bit D5 of the subaddress
(test mode bit) is set to ”1”, too
External Clock
Internal Clock
Testsignals at CASS_R
VHCCH
Level intern
Pilot magnitude
VCOCON; VCO Control Voltage
Pilot threshold
HOLDN
NB threshold
F228
VHCCL
VSBL
not used
not used
PEAK
not used
REF5V
not used
VCO
OFF
ON
Audioprocessor test mode
enabled if bit D5 of the subaddress
(test mode bit) is set to ”1”
OFF
Note : This byte is used fortesting or evaluation purposes only and must not be set to other values than the default ”11111110” in the application!
26/28
TDA7400
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
1.60
A1
0.05
A2
1.35
B
0.30
C
0.09
0.063
0.15
0.002
1.40
1.45
0.053
0.055
0.057
0.37
0.45
0.012
0.014
0.018
0.20
0.004
0.006
0.008
D
12.00
0.472
D1
10.00
0.394
D3
8.00
0.315
e
0.80
0.031
E
12.00
0.472
E1
10.00
0.394
E3
8.00
0.315
L
0.45
0.60
0.75
OUTLINE AND
MECHANICAL DATA
MAX.
0.018
0.024
L1
1.00
K
0°(min.), 3.5°(typ.), 7°(max.)
0.030
0.039
TQFP44 (10 x 10)
D
D1
A
A2
A1
33
23
34
22
0.10mm
.004
B
E
B
E1
Seating Plane
12
44
11
1
C
L
e
K
TQFP4410
27/28
TDA7400
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www.st.com
28/28