TDA7513T SINGLE-CHIP FM/AM TUNER WITH STEREO DECODER AND AUDIO PROCESSOR 1 ■ ■ ■ ■ ■ ■ 2 FEATURES Figure 1. Package AM/FM TUNER FOR CAR-RADIO INTEGRATED TUNING PLL VARIABLE-BANDWITH FM IF FILTER (ISS) FULLY INTEGRATED FM STEREO DECODER FULLY INTEGRATED FM NOISE BLANKER HIGHLY INTEGRATED AUDIO PROCESSOR TQFP80 Table 1. Order Codes Part Number Package TDA7513T TQFP80 DESCRIPTION The TDA7513T is the first device for car-radio applications that combines full RF front-end functions with audio-processing capabilities. lectors for two quasi-differential external sources, volume control, tone control (bass, mid and treble), balance and fading control to drive four output channels. A soft mute function and an RDS mute function are included to handle source change as well as RDS AF search without abrupt changes in the audio level. Most of the parameters in the front-end section are I2Cbus-driven and therefore under the control of the car-radio maker. The I2C bus allows furthermore the user to realize the full electric alignment of all the external coils, therefore removing the need for hand-made or mechanical adjustments. As far as FM and AM functions are concerned , the TDA7513T features front-end processing, including the digital tuning PLL, IF processing with demodulation and variable-bandwidth IF filtering (ISS), stop station and quality detection functions, FM stereo decoding by means of a fully-integrated, adjustment-free dedicated PLL and, finally, FM noise blanking. The FM stereo decoder and noise blanker functions are realized entirely without external components. The audio processor section comprises input se- FMDEMREF DEMGND SMETERTC AMIF2AMPREF AMIF2AMPIN AMAGC2TC AMMIX2OUT FMMIX2IN2 FMMIX2IN1 FMIFAMP2IN FMIFAMP2OUT TUNVCC FMIFAMPREF FMIFAMP1OUT FMIFAMP1IN FMNAGCIN IFGND MIX1OUT2 MIX1OUT1 IFVCC Figure 2. Pins Connection 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 VREF5V 1 60 MULTIPATHTC TUNGND 2 59 RDSMUTE AMMIX1IN1 3 58 AUDIOMUTE AMMIX1IN2 4 57 QUALITY AMAGC1TC 5 56 SMETER AMAGC1IOUT 6 55 SD AMAGC1VOUT 7 54 SCL FMMIX1IN1 8 53 SDA RFGND 9 52 FMMUTETC FMMIX1IN2 10 51 FMAGCIOUT 11 50 TUNERIN FMWAGCIN 12 49 IN1L FMAGCVOUT TUNEROUT 13 48 IN1COM FMANTADJ 14 47 IN1R FMRFANDJ 15 46 IN2R OSCGND 16 45 IN2COM VCOE 17 44 IN2L VCOB 18 43 ACLOUT OSCVCC 19 42 ACLIN LFOUT 20 41 ACROUT June 2004 ACRIN OUTFL OUTRL OUTFR OUTRR APVCC APGND VREF3V ISSTC DEVTC TUNQUALITY DIGVCC DIGGND XTALD XTALG PLLVCC PLLGND LFIN LFHC LFREF 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 D03AU1527 REV. 1 1/59 TDA7513T 3 BLOCK DIAGRAM fFS IFT1ADJ FMAGCIOUT FMAGCVOUT FMWAGCIN FMMIX1IN+ FMMIX1IN- SMETER FILTER fFS FM AGC AMP1 AMP2 FM FM FM MIX2 FM MIX1 TUNGND TUNVCC SMETER SMETERTC FMMIX2IN- FMMIX2IN+ FMIFAMP2OUT IF1VCC IF1GND FMIFAMP2IN FMIFAMP1OUT FMIFAMPREF/ AMIF2REF FMIFAMP1IN/ AMMIX2IN MIX1OUT- MIX1OUT+ FMNAGCIN Figure 3. Tuner Section sfFS SMETER SLIDER 5V REF VREF5V ISSTC DEVTC ufFS TUNQUALITY ISS RFGND VCOB VCOE VCO ufFS OSCVCC OSCGND 10.7M AMMIX1IN+ AMMIX1IN- AMAGC1IOUT AMAGC1VOUT AdjChDet 450K DIV 4,6,8,10 + MPathDet AM/ FM FS METER AM MIX1 AM AGC1 AdjChDet OverDevDet SoftMute QUALITY fFS MUTE fFS 450K FMMUTETC AMP FM DEMOD ufFS TUNEROUT AUDIO DEMGND AMAG1CTC FMDEMREF LFREF PLL LFHC IFC 400K 450K 10.25M LFIN LFOUT fFS 10.25M SD SD ufFS DIGVCC FM FE ADJ AM AM MIX2 SDAint I2C BUS SCLint ACKint AMAGC2TC AMIF2AMPREF AMIF2AMPIN AMMIX2OUT XTALG XTALD IFT2ADJ PLLGND FMRFADJ XTAL OSC PLLVCC FMANTADJ AM AGC2 AM DEM AMP2 DIGGND Figure 4. Stereo Decoder / Audio Processor Section AM/FM L PILOT CANC IN TUNERIN GAIN ROLL-OFF COMP HIGH CUT DEMOD ST. BLEND AM/FM R RDSMUTE PILOT DETECTOR PLL RDSMUTE stereo RDSMUTE sfFS SDA SCL I2C BUS ST. BLEND/HI CUT CONTROL LEVEL ADJUST SDAint Level Det SCLint ACKint DevDet Noise Det NOISE BLANKER MPATHTC MPATH DET Disch Time Const ufFS QUALITY DET IN1L QUALITY ACLOUT ACLIN IN1COM AUTO ZERO IN IN1R GAIN IN2L SOFT MUTE IN2COM IN IN2R AM/FM L AUTO ZERO GAIN AM/FM R mute AUDIOMUTE VREF3V APGND APVCC 3V REF 2/59 VOL TREBLE MID SPKR OUTRL SPKR OUTFL SPKR OUTFR SPKR OUTRR ACRIN ACROUT BASS TDA7513T Table 2. Pin Description PIN PIN NAME PIN FUNCTION 1 VREF5V 5V reference 2 TUNGND tuner general ground 3 AMMIX1IN1 am mix1 input 4 AMMIX1IN2 am mix1 input 5 AMAGC1TC am agc1 filter capacitor 6 AMAGC1IOUT am agc1 current output 7 AMAGC1VOUT am agc1 voltage output 8 FMMIX1IN1 fm mix1 input 9 RFGND rf ground 10 FMMIX1IN2 fm mix1 input 11 FMAGCIOUT fm agc current output 12 FMWAGCIN fm agc RF input 13 FMAGCVOUT fm agc voltage output 14 FMANTADJ fm antenna filter adjustment 15 FMRFANDJ fm rf filter adjustment 16 OSCGND vco ground 17 VCOE am/fm vco emitter 18 VCOB am/fm vco base 19 OSCVCC vco supply (8V) 20 LFOUT PLL loop filter output 21 LFREF PLL loop filter reference 22 LFIN PLL loop filter input 23 LFHC PLL loop filter high-current input 24 PLLVCC PLL back-end supply 25 PLLGND PLL back-end ground 26 XTALG ref osc gate 27 XTALD ref osc drain 28 DIGVCC digital dirty supply (8V) 29 DIGGND digital ground 30 TUNQUALITY tuner combined output of multipath and adjacent channel detectors 31 ISSTC ISS time constant 32 DEVTC deviation detector time constant 33 VREF3V 3V reference 34 APGND audio processor/stereo decoder ground 35 APVCC audio processor/stereo decoder supply (8V) 36 OUTRR audio out 37 OUTRL audio out 38 OUTFR audio out 39 OUTFL audio out 40 ACRIN ac coupling right input 3/59 TDA7513T Table 2. Pin Description (continued) PIN 4/59 PIN NAME PIN FUNCTION 41 ACROUT ac coupling right output 42 ACLIN ac coupling left input 43 ACLOUT ac coupling left output 44 IN2L audio in2 left 45 IN2COM audio in2 common 46 IN2R audio in2 right 47 IN1R audio in1 right 48 IN1COM audio in1 common 49 IN1L audio in1 left 50 TUNERIN am audio/fm mpx input 51 TUNEROUT am audio/fm mpx output 52 FMMUTETC fm muting time constant capacitor 53 SDA I2C bus data 54 SCL I2C bus clock 55 SD am/fm station detector output 56 SMETER am/fm smeter output 57 QUALITY quality output 58 AUDIOMUTE audio mute control 59 RDSMUTE rds mute control 60 MULTIPATHTC multipath detector time constant 61 FMDEMREF fm demodulator reference capacitor 62 DEMGND fm demodulator ground 63 SMETERTC am/fm smeter filtering capacitor 64 AMIF2AMPREF am if2 amp feedback capacitor 65 AMIF2AMPIN am if2 amp input 66 AMAGC2TC am agc2 filter capacitor 67 AMMIX2OUT am mix2 single-ended output 68 FMMIX2IN2 fm mix2 input 69 FMMIX2IN1 fm mix2 input 70 FMIFAMP2OUT fm if1 amp2 output 71 FMIFAMP2IN fm if1 amp2 input 72 TUNVCC tuner general supply (8V) 73 FMIFAMPREF fm if1 amps reference capacitor 74 FMIFAMP1OUT fm if1 amp1 output 75 FMIFAMP1IN fm if1 amp1 input 76 FMNAGCIN fm agc IF input 77 IFGND if1 ground 78 MIX1OUT2 am/fm mix1 output 79 MIX1OUT1 am/fm mix1 output 80 IFVCC if1 supply (8V) TDA7513T 4 ELECTRICAL CHARACTERISTCS 4.1 FM (VCC = 8V; Tamb = 25°C; Vsg = 60dBµV; fc = 98.1MHz; fdev = 40kHz; fmod = 1kHz unless otherwise specified) Table 3. General (audioprocessor all flat and stereo decoder input gain = 4dB ) Symbol US SNR LS THD Vout ISN IFCS Icc Parameter Useable sensitivity Test Condition Min SNR = 40dB Typ Max 0 Signal to Noise ratio Unit dBµV 66 dB -4 dBµV Limiting Sensitivity Soft Mute OFF; @ ∆Vout = -3dB Total Harmonic Distortion fdev = 40kHz 0.1 0.3 % fdev = 75kHz 0.15 0.5 % Audio output level rms 375 Interstation noise ∆Vout @ RF OFF; Soft Mute OFF -13 IF Counter sensitivity DC current 2 mV dB 10 dBµV OSCVcc 5.7 mA PLLVcc 1.9 mA DIGVcc 9.8 mA TUNVcc 50 mA IF1Vcc 13.4 mA APVcc 27.3 mA Table 4. Mixer1 Symbol Parameter Test Condition Gv conversion gain from RFT secondary to IFT1 secondary loaded with 330Ω IIP3 3rd order intercept point referred to RFT secondary IFT1 adjustment capacitor Between MIXOUT+ and MIXOUT- CIFT1 Rin min Min Typ Max 9 Unit dB dBµV 0 pF max 8.25 pF step 0.55 pF 10 Ω input resistance (single ended) FMMIX1IN+ and FMMIX1IN- w.r.t. gnd Table 5. Front-end Adjustment (VRFadj and VANTadj referred to VLFOUT) Symbol Vantadj VRFadj Parameter Test Condition Min Typ Max Unit min -40 % max 40 % step 1.29 % min -40 % max 40 % step 1.29 % 5/59 TDA7513T Table 6. AGC (wide AGC input connected to RFT primary through 10pF and 1KΩ) Symbol Parameter WAGCsp Wide AGC starting point WAGCRin FMWAGCIN input resistance NAGCsp KNAGCsp Unit 84 dBµV 125 Ω dBµV Keyed narrow AGC starting point (min sensitivity) VRFTprimary @ I(FMAGCOUT) = 5µA; Keyed AGC ON; V(SMETERTC)<0.9V 109 dBµV 10 KΩ V(SMETERTC) @ narrow AGC starting point = NAGCsp 0.9 V 2.5 V 1.6 V 3.2 V FMNAGCIN input resistance AGCVRout Max 95 Smeter for Keyed narrow AGC maximum sensitivity Vout VRFTprimary @ I(FMAGCOUT) = 5µA Typ VRFTprimary @ I(FMAGCOUT) = 5µA; Keyed AGC OFF KAGCTH high Iout Min Narrow AGC starting point (max sensitivity) NAGCRin KAGCTH low Test Condition Smeter for Keyed narrow AGC minimum sensitivity minimum programming maximum programming minimum programming V(SMETERTC) @ narrow AGC starting point = KNAGCsp maximum programming min AGC OFF max AGC ON min AGC ON max AGC OFF 0.1 8 mA 0.1 0.5 Vcc0.5 FMAGCVOUT output resistance µA V V 100 KΩ Table 7. IF Amplifier 1 (Input at FMIFAMP1IN, fc = 10.7MHz, no mod) (Output at FMIFAMP1OUT loaded with 330Ω) (antenna level = FMIFAMP1IN – 31dB) Symbol G Parameter Test Condition Min Gain Typ Max Unit 18 dB IIP3 3rd order intercept point referred to FMIFAMP1IN 126 dBµV Rin input resistance (single-ended) FMIFAMP1IN w.r.t. gnd 330 Ω 330 Ω Rout output resistance Table 8. IF Amplifier 2 (Input at FMIFAMP2IN, fc = 10.7MHz, no mod) (Output at FMIFAMP2OUT loaded with 330Ω) (antenna level = FMIFAMP2IN – 45dB) Gain MUST BE SET to 14dB for ISS operation. Symbol G Parameter minimum gain Test Condition programmable gain maximum gain IIP3 6/59 Input 3rd order intercept point referred to FMIFAMP2IN, G = 8dB Min Typ Max Unit 6 dB 8 dB 10 dB 14 dB 134 dBµV TDA7513T Symbol Rin Rout Parameter input resistance (single-ended) Test Condition Min Typ FMIFAMP2IN to gnd output resistance Max Unit 330 Ω 330 Ω Table 9. Field-strength Meter (Input at FMMIX2IN; fc = 10.7MHz, no mod) (antenna level = V67 – 49dB) Symbol Parameter Test Condition Min Typ Max Unit FS1 FSmeter1 V(FMMIX2IN+) = 50 dBµV 1.4 dBµV FS2 FSmeter2 V(FMMIX2IN+) = 70 dBµV 2.7 dBµV FS3 FSmeter3 V(FMMIX2IN+) = 90 dBµV 4.4 dBµV FSR FSmeter filtering resistor SMETERTC pin 10.7 kΩ FFSS Filtered FSmeter Slider min 0 V max 1.5 V step 50 mV Table 10. MPX output (output at TUNEROUT) Symbol Gc Vaudio Parameter Test Condition Min conversion gain audio level peak, 40kHz deviation Typ Max Unit 5.42 mV/kHz 217 mVp Table 11. Field-strength Stop Station (Input at FMMIX2IN – fc = 10.7MHz, no mod) (antenna level = V69 – 49dB) Symbol Parameter Test Condition Min Typ Max Unit FSSSmin minimum threshold Vthr = 0.4V 50 dBµV FSSSmax maximum threshold Vthr = 3.4V 78 dBµV FSSSstep threshold step ∆Vthr = 200mV 3 dB Table 12. Soft Mute Symbol SMD Parameter Test Condition Soft Mute Depth min max 13.4 dB 16 dB 19.5 dB V V(FMMUTETC) @ Max mute attenuation 2 V Max V(FMMUTETC) in Adjacent Channel conditions 500 mV 2000 mV 100 mV MCVhigh Mute control voltage high Adjacent channel mute clamp voltage step Unit dB V(FMMUTETC) @ No mute attenuation max Max 24 Mute control voltage low min Typ 0.2 MCVlow ACMcl Min 7/59 TDA7513T Table 13. ISS Filter (FMIF1AMP1 gain MUST be set to 14dB) * Symbol Parameter BW1 Wide bandwidth BW2 BWwb Test Condition Min Full bandwidth @ -3dB Typ Max Unit 120 kHz Narrow bandwidth 80 kHz Weather Band bandwidth 30 kHz * if ISS function is not used, SEEK must be set to “ON” in FM AM (VCC = 8V; Tamb =25°C; Vsg = 74dBµV,emf; fc = 999kHz; 30% modulation; fmod = 400Hz unless otherwise specified). Table 14. General (with 20pF/65pF dummy antenna; input levels @ SG,emf; output @ audioprocessor output; audioprocessor all flat; stereo decoder input gain = 5.75dB) Symbol US Parameter Useable sensitivity Test Condition Min SNR = 20dB SNR Signal to Noise ratio MS Maximum Sensitivity @ ∆Vout = -10dB THD Total Harmonic Distortion Typ Max 26 56 Unit dBµV 60 dB 20 dBµV mod =30%, Vsg = 74dBµV 0.59 % mod =80%, Vsg = 74dBµV 1.48 % mod =30%, Vsg = 120dBµV 1.88 % mod =80%, Vsg = 120dBµV 3 % THD @ low frequency mod =30%, Vsg = 74dBµV, fmod=100Hz 2 % Vout Audio output level rms 266 mV ISN Interstation noise level ∆Vout @ RF OFF -35 -31 dB IFCS IF Counter sensitivity 10 20 dBµV THDLF Icc 8/59 DC current 8 OSCVcc 5.6 mA PLLVcc 1.9 mA DIGVcc 12.1 mA TUNVcc 68 mA IF1Vcc 7.8 mA APVcc 27 mA TDA7513T Table 15. Mixer1 (Input at AMMIX1IN+, no mod) Symbol Parameter Test Condition Min Typ Max Unit Gv conversion gain from AMMIX1IN+to IFT1 secondary loaded with 330 Ω 13 dB IIP3 Input 3rd order intercept point referred to AMMIX1IN+ 130 dBµV Rin input resistance (differential) AMMIX1IN+ w.r.t. AMMIX1IN- 1.2 kΩ IFT1 min Between MIXOUT+ and MIXOUT- 0 pF adjustment max 8.25 pF capacitor step 0.55 pF CIFT1 Table 16. AGC1 (Wide AGC input = AM Mixer1 input; Narrow AGC input = AM Mixer2 input; Ultra Narrow AGC input = AM IF2 Amp input; fWAGCin = 999kHz, fNAGCIN = 10.7MHz, fUNAGCin = 450kHz) Symbol WAGCsp NAGCsp UNAGCsp AGC1R Iout Vout AGC1VRout Parameter Wide AGC min starting point max NarrowAGC min starting point max Ultra Narrow AGC min starting point max Test Condition Min AMMIX1IN+ @ I(AMAGC1VOUT) = 1 uA Typ Max 85 Unit dBµV 104 dBµV 79 dBµV 97 dBµV AMMIX1IN+ @ I(AMAGC1VOUT) = 1 uA 50 dBµV 97 dBµV AGC1 filtering resistor AMAGC1TC pin 100 min AGC OFF AMMIX1IN+ @ I(AMAGC1VOUT) = 1 uA max AGC ON min AGC ON max AGC OFF KΩ 1 0.4 mA 0.5 AMAGC1VOUT output resistance µA V 3.38 V 23 KΩ Table 17. Mixer2 (Input at AMMIX2IN, fc = 10.7MHz, no mod) Symbol Parameter Test Condition Min Typ Max Unit Gv, max conversion gain, no AGC from AMMIX2IN to IFT2 secondary loaded with 2k Ω 15 dB Gv, min conversion gain, full AGC from AMMIX2IN to IFT2 secondary loaded with 2kΩ -7 dB IIP3 Input 3rd order intercept point referred to AMMIX2IN, no AGC 120 dBµV Rin input resistance AMMIX2IN w.r.t. ground 330 Ω 0 pF CIFT2 IFT2 min Between AMMIX2OUT and gnd adjustment max 24 pF capacitor step 1.6 pF 9/59 TDA7513T Table 18. IF2 amplifier (Input at AMIF2AMPIN, fc = 450kHz, no mod) Symbol Gv, max Parameter gain, no AGC Test Condition Min max prog Typ Max 64.8 Unit dB 62.8 61.7 60.2 58.3 55.8 min prog 53.2 ∆Gv gain decrease in full AGC w.r.t. Gv, max Rin input resistance AMMIX2IN w.r.t. ground -40 dB 2 kΩ Table 19. AGC2 Symbol AGC2R Parameter AGC2 filtering resistor Test Condition Min reception seek Typ Max Unit 150 kΩ 5 kΩ Table 20. Audio output (output at TUNEROUT, 2.7k Ω load) Symbol Vaudio Parameter audio level Test Condition Min rms, 30% modulation Typ Max 305 Unit mV Table 21. Field-strength Meter (Input at AMIF2AMPIN; fc = 450 kHz, no mod) (SG,emf level = V65 – 29dB) Symbol Parameter Test Condition Min Typ Max Unit FS1 FSmeter1 V(AMIF2AMPIN) = 50 dBµV 0.7 dBµV FS2 FSmeter2 V(AMIF2AMPIN) = 70 dBµV 2.1 dBµV FS3 FSmeter3 V(AMIF2AMPIN) = 90 dBµV 4.2 dBµV FSR FSmeter filter resistor SMETERTC pin 16.5 kΩ max 75 kΩ min 0 V max 1.5 V step 48.4 mV FFSS 10/59 Filtered FSmeter Slider min TDA7513T 4.2 OSCILLATORS (VCC = 8V; Tamb =25°C) Table 22. VCO Symbol Parameter Test Condition Vvco Oscillation level Tuning Voltage = 4V C/N Carrier to Noise ratio ∆f = 1kHz Min Typ 106 Max Unit 108 dBµV 85 dBc/Hz Table 23. XTAL Symbol Parameter Vxtal FXTAL Test Condition Oscillation level @ XTAL gate Adjustment min frequency range max referred to 10.25 MHz centered condition Min step Typ Max Unit 131 dBµV -4 kHz +4 kHz 238 Hz Table 24. Audio Processor (VS = 8V; Tamb = 25°C; RL = 10kΩ; all gains = 0dB; f = 1kHz; unless otherwise specified) Symbol Parameter Test Condition Min. Typ. Max. Unit INPUT GAIN GIN MIN Min. Input Gain -1 0 1 dB GIN MAX Max. Input Gain 13 15 17 dB GSTEP Step Resolution 0.5 1 1.5 dB 130 kΩ QUASI DIFFERENTIAL STEREO INPUT 1&2 Rin CMRR Input Resistance Any input pin to gnd 70 100 Common Mode Rejection Ratio VCM = 1VRMS @ 1kHz 45 70 dB VCM = 1VRMS @ 10kHz 45 60 dB VOLUME CONTROL GMAX Max Gain 13 15 17 dB ASTEP Step Resolution 0.5 1 1.5 dB G = -20 to 20dB -1.25 0 1.25 dB G = -60 to 20dB -4 0 3 dB 2 dB EA Attenuation Set Error ET Tracking Error VDC DC Steps Adjacent Attenuation Steps mV From 0dB to GMIN mV SOFT MUTE/AFS AMUTE TD VTH low Mute Attenuation Delay Time 100 dB T1 0.48 ms T2 0.96 ms T3 20.2 ms T4 40.4 ms Low Threshold for SM-/AFS- Pin 1 80 1 V 11/59 TDA7513T Table 24. Audio Processor (continued) (VS = 8V; Tamb = 25°C; RL = 10kΩ; all gains = 0dB; f = 1kHz; unless otherwise specified) Symbol VTH high Parameter Test Condition High Threshold for SM-/AFS-Pin Min. Typ. Max. 4 Unit V BASS CONTROL CRANGE ASTEP fC QBASS DCGAIN ±13 Control Range Step Resolution Center Frequency Quality Factor Bass-Dc-Gain ±15 ±17 dB 0.5 1 1.5 dB fC1 54 60 66 Hz fC2 63 70 77 Hz fC3 72 80 88 Hz fC4 90 100 (150)2 110 Hz Q1 0.9 1 1.1 Q2 1.1 1.25 1.4 Q3 1.3 1.5 1.7 Q4 1.8 2 2.2 DC = off -1 0 1 dB DC = on 3.5 4.4 5.5 dB Control Range ±13 ±15 ±17 dB Step Resolution 0.5 1 1.5 dB fC1 450 500 550 Hz fC2 0.9 1 1.1 kHz fC3 1.35 1.5 1.65 kHz fC4 1.8 2 2.2 kHz Q1 0.9 1 1.1 Q2 1.8 2 2.2 Control Range ±13 ±15 ±17 dB Step Resolution 0.5 1 1.5 dB MID CONTROL CRANGE ASTEP fC QBASS Center Frequency Quality Factor TREBLE CONTROL CRANGE ASTEP fC Center Frequency fC1 8 10 12 kHz fC2 10 12.5 15 kHz fC3 12 15 18 kHz fC4 14 17.5 21 kHz SPEAKER ATTENUATORS 17.5 25 32.5 kΩ GMAX Max Gain 13 15 17 dB AMAX Max Attenuation -70 -79 ASTEP Step Resolution 0.5 1 AMUTE Output Mute Attenuation 80 90 RIN EE VDC 12/59 Input Impedance 1.5 Adjacent Attenuation Steps dB dB ±2 Attenuation Set Error DC Steps dB dB mV TDA7513T Table 24. Audio Processor (continued) (VS = 8V; Tamb = 25°C; RL = 10kΩ; all gains = 0dB; f = 1kHz; unless otherwise specified) AUDIO OUTPUTS Symbol VCLIP Parameter Clipping Level RL Output Load Resistance CL Output Load Capacitance Test Condition THD = 0.3% Min. Typ. 2.2 2.6 Max. Unit VRMS 2 kΩ 10 nF 120 Ω ROUT Output Impedance 30 VDC DC Voltage Level 3.9 V Quasi-differential Input 0.5 dB 7.5 GENERAL Gqd Gain (QDin) Gstd Gain (Tuner) Tuner Input (STD InGain=4dB) eNO Output Noise (QDin) BW = 20 Hz to 20 kHz output muted; all flat S/N d Signal to Noise Ratio (QDin) Distortion (QDin) SC Channel separation Left/Right (QDin) ET Total Tracking Error dB 15 µV µV BW = 20 Hz to 20 kHz all gain = 0dB 20 all gain = 0dB flat; VO = 2VRMS 100 dB bass treble at 12dB; A-weighted; VO = 2.6VRMS 96 dB VIN = 1VRMS; all stages 0dB 0.012 0.1 % VIN = 1VRMS; Bass & Treble = 12dB 0.05 0.1 % 80 dB AV = 0 to -20dB -1 0 1 dB AV = -20 to -60dB -2 0 2 dB 0.8 V BUS INPUTS VIL Input Low Voltage VIH Input High Voltage IIN Input Current VIN = 0.4V VO Output Voltage SDA Acknowledge IO = 1.6mA 2.5 -5 V 5 µA 0.4 V 1) The SM pin is active low (Mute = 0) 2) See note in Programming Part 13/59 TDA7513T 4.3 STEREO DECODER. Table 25. Stereo Decoder (Vcc = 8V; deemphasis time constant = 50µs, VMPX = 305mVrms (75kHz deviation), fm= 1kHz, Gv = 4dB, Tamb = 27°C; unless otherwise specified) Symbol Rin GV Parameter Input Resistance Stereo decoder input gain Min. Typ. Max. Unit FM Test Condition 70 100 130 kΩ AM 1.4 2 2.6 kΩ min max SVRR a THD (S+N)/N Supply Voltage Ripple Rejection Vripple = 100mV; f = 1KHz Max. channel Separation dB dB 4.0 dB 5.75 dB 35 60 dB 30 45 dB Total Harmonic Distortion Signal plus Noise to Noise Ratio 0.5 2.25 0.02 A-weighted, S = 2Vrms @ APout 80 0.3 % 91 dB 15 mV MONO/STEREO-SWITCH VPTHST1 Pilot Threshold Voltage for Stereo, PTH = 1 VPTHST0 Pilot Threshold Voltage for Stereo, PTH = 0 25 mV VPTHMO1 Pilot Threshold Voltage for Mono, PTH = 1 12 mV VPTHMOO Pilot Threshold Voltage for Mono, PTH = 0 19 mV PLL ∆f/f f0 PILmax Lock Range Center frequency range -6 min max VCO Vtuning fixed to reference voltage step Maximum input pilot voltage @TUNERIN 276 +6 % 328 kHz 619 kHz 9.4 kHz mV DEEMPHASIS and HIGHCUT τHC50 Deemphasis Time Constant Bit 7, Subadr, 10 = 0, VLEVEL >> VHCH 25 50 75 µs τHC75 Deemphasis Time Constant Bit 7, Subadr, 10 = 1, VLEVEL >> VHCH 50 75 100 µs τHC50 Highcut Time Constant Bit 7, Subadr, 10 = 0, VLEVEL >> VHCL 100 150 200 µs τHC75 Highcut Time Constant Bit 7, Subadr, 10 = 1, VLEVEL >> VHCL 150 225 300 µs Internal Reference Voltage 4.7 5 5.3 V STEREOBLEND- and HIGHCUT-CONTROL REF5V LGmin Min. LEVEL Gain -1 0 1 dB LGmax Max. LEVEL Gain 8 10 12 dB LGstep LEVEL Gain Step Resolution 0.3 0.67 1 dB VSBLmin Min. Voltage for Mono 25 29 33 %REF5V VSBLmax Max. Voltage for Mono 54 58 62 %REF5V VSBLstep Step Resolution 2.2 4.2 6.2 %REF5V VHCHmin Min. Voltage for NO Highcut 38 42 46 %REF5V VHCHmax Max. Voltage for NO Highcut 62 66 70 %REF5V VHCHstep Step Resolution 5 8.4 12 %REF5V 14/59 TDA7513T Table 25. Stereo Decoder (continued) (Vcc = 8V; deemphasis time constant = 50µs, VMPX = 305mVrms (75kHz deviation), fm= 1kHz, Gv = 4dB, Tamb = 27°C; unless otherwise specified) Min. Typ. Max. Unit VHCLmin Symbol Min. Voltage for FULL Highcut Parameter Test Condition 12 17 22 %VHCH VHCLmax Max. Voltage for FULL Highcut 28 33 38 %VHCH VHCLstep Step Resolution 2.2 4.2 6.2 %VHCH 40 50 Carrier and harmonic suppression at the output α19 Pilot Signal f = 19KHz α38 Subcarrier f = 38KHz 75 dB α57 Subcarrier f = 57KHz 62 dB α76 Subcarrier f = 76KHz 90 dB dB 4.4 NOISE BLANKER Table 26. Noise Blanker Symbol VTR Parameter Trigger Threshold 0) 1) VTRNOISE Noise Controlled Trigger threshold 2) VRECT Rectifier Voltage VRECT DEV deviation dependent rectifier Voltage 3) Test Condition Min. Typ. Max. Unit NBT = 111 (c) 30 (c) mV NBT = 110 (c) 35 (c) mV NBT = 101 (c) 40 (c) mV NBT = 100 (c) 45 (c) mV NBT = 011 (c) 50 (c) mV NBT = 010 (c) 55 (c) mV NBT = 001 (c) 60 (c) mV NBT = 000 (c) 65 (c) mV meas. with VPEAK = 1.5V NCT = 00 (c) 260 (c) mV NCT = 01 (c) 220 (c) mV NCT = 10 (c) 180 (c) mV NCT = 11 (c) 140 (c) mV NRD 6) = 00 0.5 0.9 1.3 V VMPX = 50mV; f = 150KHz 1.5 1.7 2.1 V VMPX = 200mV; f = 150KHz 2.2 2.5 2.9 V meas. with VMPX = 800mV (75KHz dev.) OVD = 11 0.5 0.9 1.3 V OVD = 10 0.9 1.2 1.5 V OVD = 01 1.7 2 2.3 V OVD = 00 2.5 2.8 3.1 V FSC = 11 0.5 0.9 1.3 V FSC = 10 0.9 1.4 1.5 V FSC = 01 1.7 1.9 2.3 V FSC = 00 2.1 2.4 3.1 V meas. with VPEAK = 0.9V VMPX = 0mV VRECT FS Fieldstrength Controlled Rectifier Voltage 4) Rectifier Voltage 4) TS Suppression Pulse Duration 5) VMPX = 0mV VLEVEL << VSBL (fully mono) Signal HOLDN in Testmode 38 µs BLT = 10 32 µs BLT = 01 25.5 µs BLT = 00 22 µs BLT = 00 15/59 TDA7513T Table 26. Noise Blanker (continued) Symbol Parameter Test Condition VRECTADJ Noise Rectifier Signal PEAK in discharge adjustment 6) Testmode SRPEAK VADJMP Noise Rectifier Charge Noise Rectifier adjustment through Multipath 8) Signal PEAK in Testmode Signal PEAK in Testmode Min. Typ. Max. Unit NRD = 00 6) (c) 0.3 (c) V/ms NRD = 01 6) (c) 0.8 (c) V/ms NRD = 10 6) (c) 1.3 (c) V/ms NRD = 11 6) (c) 2 (c) V/ms PCH = 0 7) (c) 10 (c) mV/µs PCH = 1 7) (c) 20 (c) mV/µs MPNB = 00 8) (c) 0.3 (c) V/ms MPNB = 00 8) (c) 0.5 (c) V/ms MPNB = 00 8) (c) 0.7 (c) V/ms MPNB = 00 8) (c) 0.9 (c) V/ms (c) = by design/characterization functionally guaranteed through dedicated test mode structure (0) = All Thresholds are measured using a pulse with TR =2ms,THIGH = 2ms and TF = 10ms. The repetition rate must not icrease the PEAK voltage. 1) NBT represents the Noiseblanker Byte bits D2, D0 for the noise blanker trigger threshold 2) NAT represents the Noiseblanker Byte bit pair D4, D3 for the noise controlled triggeradjustment 3) OVD represents the Noiseblanker Byte bit pair D7, D6 for the over deviation detector 4) FSC represents the Fieldstrength Byte bit pair D1, D0 for the fieldstrength control 5) BLT represents the Speaker RR Byte bit pair D7, D6 for the blanktime adjustment 6) NRD represents the Configuration-Byte bit pair D1, D0 for the noise rectifier discharge-adjustment 7) PCH represents the Stereodecoder-Byte bit D5 for the noise rectifier charge-current adjustment 8) MPNB represents the HighCut-Byte bit D7 and the Fieldstrength-Byte D7 for the noise rectifier multipath adjustment 4.5 MULTIPATH AND QUALITY DETECTORS Table 27. Multipath And Quality Detectors Symbol Parameter Test Condition fCMP Center Frequency of MultipathBandpass Stereodecoder locked on Pilottone 19 kHz Bandpass Gain bits D2, D1 configuration byte = 00 6 dB bits D2, D1 configuration byte = 10 12 dB bits D2, D1 configuration byte = 01 16 dB bits D2, D1 configuration byte = 11 18 dB bits D7, D6 configuration byte = 00 7.6 dB bits D7, D6 configuration byte = 01 4.6 dB bits D7, D6 configuration byte = 10 0 dB bits D7, D6 configuration byte = 11 off bit D5 configuration byte = 0 0.5 µA bit D5 configuration byte = 1 1 µA GBPMP GRECTMP Rectifier Gain ICHMP IDISMP 16/59 Rectifier Charge Current Rectifier Discharge Current Min. 0.5 Typ. 1 Max. 1.5 Unit mA TDA7513T Table 27. Multipath And Quality Detectors Symbol A B 5 Parameter Multipath Influence Factor Noise Influence Factor Test Condition Addr. 12 / Bit 5+6 Addr. 16 / Bit 1+2 Min. Typ. Max. Unit 00 0.7 dB 01 0.85 dB 10 1 dB 11 1.15 dB 00 15 dB 01 12 dB 10 9 dB 11 6 dB FUNCTIONAL DESCRIPTION 5.1 FM Section 5.1.1 Mixer1, AGC and 1st IF Mixer1 is a wide dynamic range stage with low noise and large input signal performance. The mixer1 tank center frequency can be adjusted by software (IF1T). The AGC operates on different sensitivities and bandwidths (FMAGC) in order to improve the input sensitivity and dynamic range (keyed AGC). The output signals of AGC are controlled voltage and current for preamplifier and prestage P-I-N diode attenuator (see Figure 5). Two 10.7MHz amplifiers (IFG1 - fixed gain - and IFG2 - programmable) correct the IF ceramic insertion loss. 5.1.2 Mixer2, Limiter and Demodulator In this 2nd mixer stage the first 10.7MHz IF is converted into the second 450kHz IF. A multi-stage limiter generates signals for the complete integrated demodulator without external tank. MPX output DC offset compensation is possible via software. 5.1.3 Quality Detection and ISS (see Figure 3) Fieldstrength Parallel to the mixer2 input a 10.7MHz limiter generates a signal for the digital IF counter and a fieldstrength output signal. This internal unfiltered fieldstrength is used for adjacent channel and multipath detection. The behaviour of this output signal can be corrected for DC offset (SL). The internally generated unfiltered fieldstrength is filtered at pin #SMETERTC and used for softmute function, FM AGC keying and generation of ISS filter switching signal for weak input level (sm). 5.1.4 Adjacent Channel Detector The input of the adjacent channel detector is AC coupled to the internal unfiltered fieldstrength. A programmable and configurable highpass or bandpass filter (ACF) and amplifier (ACG) followed by a rectifier measure the adjacent channel content. This voltage is compared with an adjustable threshold (ACWTH, ACNTH) comparator (comparator1). The output signal of this comparator generates a DC level at PIN15 with a programmable time constant. Time constant control (TISS) for the adjacent channel is made by linearly charging and discharging an external capacitor following. The charge current is fixed and the discharge current is controlled by I2C bus. This level produces digital signals (ac, ac+) after comparing by the following comparator4. The adjacent channel information after filtering and rectification is available as analog output on pin #TUNQUALITY (the gain can be selected via I2C bus) in combination with multipath content information. It is possible to enable adjacent channel content information output only via I2C bus control. 17/59 TDA7513T 5.1.5 Multipath Detector The input of the multipath detector is AC coupled to the internal unfiltered fieldstrength. A programmable band-pass filter (MPF) and amplifier (MPG) followed by a rectifier measures the multipath content. This voltage is compared with an adjustable threshold (MPTH) comparator (comparator2). The output signal of this comparator2 is used to disable the adjacent channel detector control of the ISS filter in case of strong multipath, which would otherwise result in bandwidth reduction because of the multipath-induced high-frequency content of the fieldstrength signal. The multipath detector influence on the adjacent channel detector is selectable by I2C bus (MPOFF). The multipath information after filtering and rectification is available as analog output on pin #TUNQUALITY (the gain can be selected via I2C bus) in combination with the adjacent channel content information. It is possible to enable multipath content information output only via I2C bus control. 5.1.6 450kHz IF Narrow Bandpass Filter (ISS filter) The device features an additional automatically selectable IF narrow bandpass filter for suppression noise and adjacent channel signals. This narrow filter has three switchable bandwidth positions: narrow range (80kHz), mid range (120kHz) and weather band (30kHz). WHen the ISS filter is not inserted the IF bandwidth (wide range) is defined only by the ceramic filter chain. The filter is switched in after mixer2 before the 450kHz limiter stage. The centre frequency can be finely adjusted (AISS) by software. 5.1.7 Deviation Detector In order to avoid excessive audio distortion the narrow ISS filter is switched OFF when overdeviation of the incoming signal is detected. The demodulator output signal is low-pass filtered and rectified to generate a DC level in an external capacitor through a software-controlled current (TDEV). This level is compared with a programmable threshold (DWTH, DTH) comparator (comparator3) to generate two digital signals (dev, dev+). 5.1.8 ISS Switch Logic All digital signals coming from adjacent channel detector, deviation detector and softmute are combined in a decision matrix to generate the control signals for the ISS filter switch. The IF bandpass switch mode can be also controlled by software (ISSON, ISS30, ISS80, ISSCTL). The switch-on of the IF bandpass can be further controlled from the outside by manipulation of the voltage at pin #ISSTC. Two application modes are available (APPM). The conditions are described in table 1. 5.1.9 Soft Mute Control The external fieldstrength signal at pin #SMETERTC is the reference for MPX mute control. The start point and mute depth are programmable over a wide range. The time constant is defined by the external capacitor connected to pin #FMMUTETC. Additionally adjacent channel mute function is supported. A software-configurable highpass / bandpass filter centered at about 100kHz followed by an amplifier and a peak rectifier generates adjacent noise information starting from the MPX output; the information is acted upon with the same time constant as the softmute by the MPX muting circuit. The adjacent channel mute starting point, slope and depth are I2C bus programmable. 5.1.10Station Detector and Seek Stop A station detection function is provided for easy seek stop operation. The unfiltered fieldstrength signal is compared with a programmable threshold and the result (logic '1' if the current station strength is higher than the threshold) is combined by an AND gate with the IF counter output (logic '1' if the current channel is centered within a programmable window around the desired frequency). The result is available on pin #SD for direct connection to the microprocessor. Channel quality assessment for RDS Alternate Frequency operation makes use of the SD signal in conjunction with analog information on adjacent channel and multipath content on pin #TUNQUALITY and channel noise (furtherly combined with multipath content information) on pin #QUALITY. 18/59 TDA7513T 5.2 AM Section The upconversion mixer1 is combined with a gain control circuit 1 sensing three input signals: ultra-narrow band information (from the IF2 amplifier input - pin #AMIF2AMPIN), narrow-band information (from the mixer2 input - pin #AMMIX2IN) and wide band information (from the mixer1 input - pins #AMMIX1IN+ and #AMMIX1IN-). This gain control circuit generates two output signals: a current for P-I-N diode attenuation and a voltage for the external preamplifier cascode upper base. It is possible to put in a separate narrow bandpass filter before mixer2 at PIN 58. The intervention point for first AGC on all three bands is programmable by software. The oscillator frequency for mixer1 is generated by dividing the FM VCO frequency (AMD) by 6, 8 and 10 (6 for Japan applications, 8 for Eastern European applications, 10 for Western European and North American operation). In mixer2 the IF1 is downconverted into the 450kHz IF2. The gain of mixer2 is reduced by the 2nd AGC after the gain of the subsequent IF2 amplifier has been reduced by 30dB. The mixer2 tank center frequency is software-adjustable (IF2T). After channel selection is done by the ceramic filter, a 450kHz amplifier with a gain control is included. The gain is controlled by the AGC2 loop over a 30dB range; the full gain with no AGC applied is programmable. The AM demodulation is made by multiplication of the IF2 amplifier output by the amplified and limited signal coming from the IF2 amplifier input, thus making the demodulation process inherently linear. The demodulated audio signal is low-passed by the capacitor at pin #AMAGC2TC to produce the DC AGC2 voltage. The low-pass time constant is switchable by a ratio of 30 in order to reduce the settling time of the AGC2 in 'seek' mode (AMSEEK). The FM 450kHz limiter is used to generate the square wave needed by the AM demodulator, a fieldstrength indication and to feed the AM IF counter. The fieldstrength information is generated mainly from the narrow-band signal at the input of the IF2 amplifier; since the dynamic range at that input is limited by the AGC2 action, a fieldstrength extension is made adding the contribution of the signal at the input of mixer2. Since the bandwidth there is very large, though, the latter contribution is enabled only if the strength of the narrow-band signal is higher than an internally defined threshold. The fieldstrength signal must be low-passed to remove audio content and this is done by use of the capacitor at pin #SMETERTC with an I2C bus programmable internal resistor. The value of the capacitor is determined for correct FM operation; the value of the internal resistor for AM is selectable in order to make the AM time constant suitable for AM operation. A station detection function is provided for easy seek stop operation. The fieldstrength signal is compared with a programmable threshold and the result (logic '1' if the current station strength is higher than the threshold) is combined by an AND gate with the IF counter output (logic '1' if the current channel is centered within a programmable window around the desired frequency). The result is available on pin #SD for direct connection to the microprocessor. 5.3 PLL and IF Counter Section The IC contains a frequency synthesizer and a loop filter for the radio tuning system. Only one VCO is required to build a complete PLL system for FM and AM upconversion. For auto search stop operation an IF counter system is available. 5.3.1 PLL Frequency Synthesizer Block The counter works in a two stages configuration. The first stage is a swallow counter with a two-modulus (32/33) precounter. The second stage is an 11-bit programmable counter. The circuit receives the scaling factors for the programmable counters and the values of the reference frequency via I2C bus. The reference frequency is generated by an adjustable internal (XTAL) oscillator followed by the reference divider. The reference and step-frequencies are independently selectable (RC, PC). The phase-frequency detector outputs switches the programmable current source. The loop filter integrates the latter to a DC voltage. The current source values is programmable with 6 bits received via I2C bus (A, B, CURRH, LPF). To minimize the noise induced by the digital part of the system, a special guard area is implemented. The loop gain can be adjusted for different conditions by setting the current values of the chargepump generator. 19/59 TDA7513T 5.3.2 Frequency Generation for Phase Comparison The VCO signal is fed to a two-modulus counter (32/33) prescaler, which is controlled by a 5-bit divider (A). A 5-bit register (PC0 to PC4) controls this divider. The output of the prescaler is connected to an 11bit divider (B), controlled by an 11-bit PC register (PC5 to PC15). The following expressions relate the divider output frequency (fSYN, forced by the loop to equal the reference frequency at the phase comparator input fREF) to the VCO frequency (fVCO) and to the crystal oscillator frequency (fXTAL): fXTAL = (R+1) x fREF fVCO = [33 x A + (B + 1 - A) x 32] x fREF fVCO = (32 x B + A + 32) x fREF Important: For correct operation: A ≤32; B ≥A 5.3.3 Three State Phase Comparator The phase comparator generates a phase error signal according to phase difference between fSYN and fREF. This phase error signal drives the charge pump current generator. 5.3.4 Charge Pump Current Generator This system generates correction current pulses with a polarity and a duration dictated by the phase error signal. The current absolute values are programmable through register A for high current and register B for low current. The charge pump operates in high current mode when the phase difference between between fSYN and fREF is high. The switch back to low current mode can be done either automatically as a function of the inlock detector output (setting bit LDENA to "1") or via software. After reaching a phase difference equivalent to 10-40 ns (programmable) and a delay multiple of 1/fREF, the chargepump is forced in low current mode. A new PLL divider programming by I2C bus will switch the chargepump into high current mode. A few programmable phase errors (D0, D1) are available for inlock detection. The count of detected inlock informations to release the inlock signal is adjustable (D2, D3), to avoid switching to low current during a frequency jump. 5.3.5 Low Noise CMOS Op-amp An internal voltage divider at pin #LFREF is connected to the positive input of the low noise op-amp. The charge pump output is connected to the negative input. This internal amplifier in cooperation with external components provides the active loop filter. Only one loop filter connection is provided because the same reference frequency is used for both AM and FM operation. The pin #LFHC is connected in such a way as to partially shunt the loop filter in order to decrease the time constant of the filter itself during jumps with high current mode activated. 5.3.6 IF Counter Block The input signal for FM and AM has the same structure although FM IF is measured at IF1 (10.7MHz) and AM IF is measured at IF2 (450kHz). The degree of integration is adjustable to up to eight different measuring cycle times. The tolerance of the accepted count value is adjustable to reach the optimum compromise between search speed and evaluation precision. T center frequency of the measured count value is adjustable to fit the IF-filter tolerance. 5.3.7 The IF-Counter Mode The IF counter works in 2 modes controlled by the IFCM register. 5.3.8 Sampling Timer A 14-bit programmable (IRC) sampling timer generates the gate signal for the main counter. In FM mode a 6.25kHz frequency reference is generated for this purpose, whereas in AM mode this reference becomes 1kHz. These reference frequencies are further divided to generate the measurement time windows 20/59 TDA7513T (160us - 320µs ... 20.48ms for FM, 1ms - 2ms … 128ms for AM). 5.3.9 Intermediate Frequency Main Counter This counter is a 11 - 21-bit synchronous autoreload down counter. Five bits (CF) are programmable to allow the adjustment to the peak of the IF-filter response. The counter length is automatically adjusted to the chosen sampling time and counter mode (FM, AM). The IF counter is also used to automatically perform the stereo decoder 456kHz VCO frequency adjustment. At the start the counter will be loaded with a value equivalent to the expected number of zero-crossing in the sampling time window (tSample x fIF ). If the correct frequency is applied to the IF counter input, at the end of the sampling time the main counter will have either a 0h state or a 1FFFFFh state stored. A deviation from the expected IF will result in a difference of the counter final state from either of these values. The counter final state is then compared to either 0h or 1FFFFFh minus a number of LSB's determined by the acceptable frequency window programming (EW). If the comparison result is good the IF counter output changes from LOW to HIGH and is made available outside at the pin #SD (after a NAND operation with the signal strength evaluation circuit). The following relationships apply: tTIM = (IRC + 1) / fOSC tCNT = (CF + 1697) / fIF (FM mode) tCNT = (CF + 448) / fIF (AM mode) where tTIM = IF timer cycle time (sampling time) tCNT = IF counter cycle time Counting succesful: tCNT - tERR = tTIM = tCNT + tERR Count failed: tTIM > tCNT + tERR tTIM < tCNT - tERR where tERR = discrimination window (controlled by the EW registers) The IF counter can be started only by inlock information from the PLL, and it is enabled by software (IFENA). 5.3.10Adjustment of the Measurement Time and Frequency window The measurement precision is adjustable by controlling the width of the frequency discrimination window through control registers EW0 to EW2. The center frequency of the discrimination window is adjustable by the control register CF0 to CF4. The measurement time per cycle is adjustable by setting the registers 21/59 TDA7513T IFS0 - IFS2. 5.4 AUDIO PROCESSOR 5.4.1 Input Multiplexer CD quasi differential 1 CD quasi differential 2 Stereodecoder input (for both FM and AM signals). 5.4.2 Input stages The quasi-differential input stages (see figure 4) have been designed to cope with some CD players in the market having a significant high source impedance which affects strongly the common-mode rejection of "normal" differential input stages. The additional buffer of the CD input avoids this drawback and offers the full common-mode rejection even with those CD players. The quasi-differential input can also be used with normal stereo single-ended output signal sources such as TAPEOUT. 5.4.3 AutoZero In order to reduce the number of pins there is no AC coupling between the In-Gain and the following stage, so that in theory any offset generated by or before the In-Gain stage would be transferred or even amplified to the output. To avoid this undesired situation a special offset cancellation stage called AutoZero is implemented. This stage is located before the Volume block to eliminate all offsets generated by the Stereodecoder, the Input Stage and the In-Gain stage (please note that externally generated offsets, e.g. those generated because of leakage current into the coupling capacitors, are not cancelled). The auto-zeroing is started every time the APSD data byte 0 is selected and takes a maximum time of 0.6ms. The rationale behind this choice is that the APSD byte encodes the signal source selection, and auto-zero ought to be performed every time a new source is selected. To avoid audible clicks the audioprocessor is muted before the volume stage during this time. 5.4.4 AutoZero Remain In some cases, for example if the uP is executing a refresh cycle of the I2C bus programming, it is not necessary to start a new AutoZero action because no new source is selected and an undesired mute would appear at the outputs. For such applications the device can be switched in the "AutoZero Remain mode" (Bit 6 of the APSD subaddress byte). If this bit is set to high, the APSD data byte 0 can be loaded without invoking the AutoZero and the old adjustment value remains. 5.4.5 Softmute The digitally controlled softmute stage allows signal muting and unmuting with a I2C bus programmable slope. The mute process can either be activated by pin #AUDIOMUTE or I2C bus. The slope is realized in a special S-shaped curve so as to slowly mute in the critical regions (see figure 5). For timing purposes the Bit 3 of the I2C bus output register is set to 1 from the start of muting until the end of unmuting. 5.4.6 BASS There are four parameters programmable in the bass filter stage: (see figs 6, 7, 8, 9): 5.4.7 Attenuation Figure 6 shows the attenuation as a function of frequency at a center frequency at a center frequency of 80Hz. 5.4.8 Center Frequency Figure 7 shows the four possible center frequencies: 60,70,80 and 100Hz. 5.4.9 Quality Factors Figure 8 shows the four possible quality factors: 1, 1.25, 1.5 and 2. 22/59 TDA7513T 5.4.10DC Mode In this mode the DC gain is increased by 5.1dB. In addition the programmed center frequency and quality factor is decreased by 25%: this can be used to realize different center frequencies or quality factors with respect to the values listed in the "BASS" section. 5.4.11MID There are 3 parameters programmable in the mid filter stage (see figs. 10, 11 & 12): 5.4.12Attenuation Figure 10 shows the attenuation as a function of frequency at a center frequency of 1kHz. 5.4.13Center Frequency Figure 11 shows the four possible center frequencies: 500Hz, 1kHz, 1.5kHz and 2kHz. 5.4.14Quality Factor Figure 12 shows the two possible quality factors (1 and 2) at a center frequency of 1kHz. 5.4.15TREBLE There are two parameters programmable in the treble filter stage (see figs 13, 14): 5.4.16Attenuation Figure 13 shows the attenuation as a function of frequency at a center frequency of 17.5kHz. 5.4.17Center Frequency Figure 14 shows the four possible Center Fre-quencies: 10, 12.5, 15 and 17.5kHz. 5.4.18AC Coupling In some applications additional signal manipulations are desired such as surround-sound processing or more extensive band equalizing. For this purpose a AC-Coupling is placed before the Speaker-attenuators, which can be activated or internally shorted by Bit7 in the APSD data byte 0. The input impedance of the AC Inputs is 25kΩ. The external AC coupling is advised for those applications where very low-level "pop" performance is a must. 5.4.19Speaker Attenuator The speaker attenuators have exactly the same structure and range as the Volume stage. 5.5 STEREODECODER The stereodecoder part of the present device (see Fig. 15) contains all functions necessary to demodulate the MPX signal such as pilot tone-dependent MONO/STEREO switch as well as "stereoblend" and "highcut" functions. Stereodecoder Mute The device has a fast and easy-to-control RDS mute function meant for "freezing" the stereo decoder status during the RDS AF check time period. When this function is invoked three effects take place: •1 the stereo decoder input impedance changes to infinity (condition known as high-ohmic input); this prevents the decoupling capacitor between the pins #TUNER_OUT (tuner output) and #TUNER_IN (stereo decoder input) to be discharged by a channel with a potentially different DC output for the duration of the AF check; •2 the stereo decoder PLL pilot detector is held at the current value; •3 the external capacitor of the multipath detector used inside the stereo decoder for quality control is disconnected from the dection circuit in order to make quality checking the AF faster. 23/59 TDA7513T The RDS mute is activated from pin #RDSMUTE in AND with Bit 0 of APSD data byte 9. 5.5.1 Stereo Decoder Input stage, Ingain + Infilter The stereo decoder is crossed by both the FM and the AM signal: the input impedance of the pin #TUNER_IN is different between the two modes in order to allow the same external coupling components between #TUNER_OUT and #TUNER_IN to realize different filtering functions. Whilst the input impedence in FM is 100k , in AM the input impedance is decreased to 2kΩ: this allows the realization of typical high-pass filters with a corner frequency of 70Hz for AM and less than 5Hz for FM. The low-pass section of the typical AM transfer function is realized by use of the internal FM High-Cut filter. The Ingain stage allows to adjust the MPX signal to a magnitude of about 1Vrms internally which is the recommended value. The 4th order input filter has a corner frequency of 80kHz and is used to attenuate spikes and nose and acts as an anti aliasing filter for the following switch capacitor filters. 5.5.2 Demodulator In the demodulator block the left and the right channel are separated from the MPX signal. In this stage the 19 kHz pilot tone is cancelled. To reach a good channel separation the device offers an I2C bus programmable roll-off adjustment which is able to finely compensate for the low-pass behaviour of the tuner section. An adjustment to better than 40dB channel separation is possible. The bits for this adjustment are located ogether with the fieldstrength adjustment in one byte. This gives the possibility to perform an optimization step during the production of the carradio where the channel separation in relation to the fieldstrength control are trimmed. The setup of the Stereoblend characteristics, which is programmable in a wide range, is de-scribed in 2.8. 5.5.3 De-emphasis and Highcut. One filter is provided to realize de-emphasis and High-Cut filtering. The lowpass filter for the de-emphasis allows to choose between a time constant of 50µs and 75µs. The filter time constant can further be controlled in both cases over the range = 2 DEEMPH. The control is automatically performed as a function of the filtered field strength level: inside the highcut control range (between VHCH and VHCL) the level is converted into a 5 bit word which drives the lowpass time constant. The FM highcut function can be switched off by I2C bus (bit 0,of APSD data byte 11). The setup of the highcut characteristics is described in 2.9. In AM the high-cut filter can be programmed (bit 3 to 7 of APSD data byte 16) to a fixed value (inside the above-mentioned programmable range) in order to provide the desired lowpass characteristic of the AM signal. 5.5.4 PLL and Pilot Tone Detector The PLL is tasked with locking on the 19kHz pilot tone during a stereo transmission to allow the correct demodulation. The detector enables the stereo demodulation if the pilot tone reaches the selected pilot tone threshold VPTHST. Two different thresholds are available. The detector output can be checked by reading the status byte of the TDA7407 via I2C bus. 5.5.5 Fieldstrength Control The filtered field strength signal is fed to the stereo decoder where it can be finely adjusted and normalized so that it can be used to control the highcut and stereoblend functions. Furthermore the adjusted signal can also be used to control the noise-blanker thresholds. The unfiltered field strength meter, on the other hand, is used as input for the stereo decoder multipath detector. These additional functions are described in sections 3.3 and 4. 5.5.6 LEVEL Input and Gain To help suppress undesired high frequency modulation of the highcut and stereoblend functions the tuner filtered field strength signal (LEVEL) is lowpassed by a combination of a 1st order RC low-pass at 53kHz (working as anti-aliasing filter) and a 1st-order switched capacitor lowpass at 2.2kHz. The second stage is a programmable gain stage to finely adapt the LEVEL signal internally against tuner 24/59 TDA7513T spread (see Testmode section 5 LEVELINTERN). The gain is widely programmable in 16 steps from 0dB to 10dB (step = 0.67dB). 5.5.7 Stereoblend Control The stereoblend control block converts the internal LEVEL voltage (LEVELINTERN) into a demodulatorcompatible analog signal which is used to control the channel separation between 0dB and the maximum separation. This control range has a fixed upper limit which is the in-ternal reference voltage REF5V. The lower limit can be programmed between 29.2% and 58% of REF5V in 4.167% steps (see figs. 14, 15). To adjust the LEVEL voltage to the proper range two values must be defined: the LEVEL gain LG and VSBL (see fig. 15). To adjust the voltage where the full channel separation is reached (VST) the LEVEL gain LG has to be defined. The following equation can be used to estimate the gain: REF5V L G = ---------------------------------------------------------------------------------------------Fieldstrengthvoltage [ STEREO ] The gain LG can be programmed with 4 bits. The MONO voltage VMO (0dB channel separation) can be chosen selecting VSBL. All the necessary internal reference voltages like REF5V are derived from a bandgap circuit, therefore they have a temperature coefficient which is practically zero. 5.5.8 Highcut Control The highcut control setup is similar to the stereoblend control setup : the starting point VHCH can be set with 2 bits to be 42, 50, 58 or 66% of REF5V whereas the range can be set to be 17, 22, 28 or 33% of VHCH (see fig. 19). 5.6 NOISE-BLANKER In the automotive environment the MPX signal is disturbed by spikes produced for example by the ignition and by the wiper motor. The aim of the noiseblanker part is to cancel the audible influence of these spikes. To perform this function the output of the stereodecoder is held at the curent voltage for a time between 22 and 38µs (programmable). The block diagram of the noiseblanker is shown in fig.20. In the first stage the spikes are detected but to avoid a wrong triggering on high frequency (white) noise a complex trigger desensitization control is implemented. Behind the trigger stage a pulse former generates the "blanking" pulse 5.6.1 Trigger Path The incoming MPX signal is highpassed by a filter with a corner frequency of 140kHz, amplified and rectified. The rectified signal (RECT) is lowpassed to generate the signal PEAK. Also noise at a frequency higher than 140kHz increases PEAK. The lowpass output voltage can be adjusted by changing the noise rectifier discharge current. The PEAK voltage is fed to a threshold generator which adds to the PEAK voltage a constant voltage VTH, thus producing the trigger threshold PEAK+VTH. Both RECT and PEAK+VTH are fed to a comparator which trig-gers a re-triggerable monoflop. The monoflop output activates the sample-and-hold circuits in the signalpath for a selectable duration. 5.6.2 Automatic Noise Controlled Threshold Adjustment (ATC) There are mainly two independent possibilities to program the trigger threshold: a programming the so-called "low threshold" in 8 steps; b programming the so-called "noise-adjusted threshold" in 4 steps The "low threshold" is active in combination with a good MPX signal without any noise; the PEAK voltage is less than 1V. The sensitivity in this operating mode is high. If the MPX signal is noisy the PEAK voltage increases due to the higher noise, which is also rectified. With increasing of the PEAK voltage the trigger threshold increases, too. This particular mechanism ("noiseadjusted threshold") is programmable in 4 steps. 25/59 TDA7513T 5.7 AUTOMATIC THRESHOLD CONTROL MECHANISM 5.7.1 Automatic Threshold Control by the Stereoblend Voltage Besides the noise-controlled threshold adjustment there is an additional possibility to influence the trigger threshold which depends on the stereoblend control. The point where the MPX signal starts to become noisy is fixed by the RF part. Therefore also the starting point of the normal noise-controlled trigger adjustment is fixed. In some cases the behavior of the noiseblanker can be improved by increasing the threshold even in a region of higher fieldstrength. Sometimes a wrong triggering occures for the MPX signal often shows distortion in this range which can be avoided even if using a low threshold. Because of the overlap of this range and the range of the stereo/mono transition it can be controlled by stereoblend. This threshold increase is programmable in 3 steps or switched off. 5.7.2 Over Deviation Detector If the system is tuned to stations with a high de-viation the noiseblanker might be erroneously triggered on the higher frequencies of the modulation. To avoid this unnecessary muting of the signal, the noiseblanker offers a deviation-dependent threshold adjustment. By rectifying the MPX signal a further signal representing the actual deviation is obtained. This is used to increase the PEAK voltage. The circuit offset, gain (and enabling) are programmable in 3 steps. 5.8 MULTIPATH DETECTOR Using the stereo decoder multipath detector the audible effects of a multipath condition can be minimized. A multipath condition is detected by rectifying the 19kHz spectrum in the fieldstrength signal. An external capacitor is used to define the attack and decay times (see block diagram fig. 21). The pin #MULTIPATHTC is externally connected to a capacitor of about 47nF and the MPIN signal is internally connected to the unfiltered field strength. To avoid losing the information stored in the external capacitor during AF checks but at the same time to allow some fast multipath detection capability during the same AF check period, the external capacitor is disconnected by the MP-Hold switch. This switch is controlled directly by the pin #RDSMUTE. Moreover, selecting the "internal influence" in the configuration byte, the channel separation is automatically reduced during a multipath condition according to the voltage appearing at the pin #MULTIPATHTC. 5.8.1 Programming To obtain a good multipath performance an adaptation is necessary. Therefore tha gain of the 19kHz bandpass is programmable in four steps as well as the rectifier gain. The attack and decay times can be set by properly choosing the value of the external capacitor. 5.9 QUALITY DETECTOR The device offers a quality detector output voltage representing the quality of the FM reception conditions. This voltage is derived from MPX noise information and multipath information according to the following formula: Quality = 1.6 (Vnoise -0.8V)+ a (REF5V- VMPOUT) The noise signal is the PEAK signal of the noise blanker without additional influences. The multipath information weight "a" can be programmed between 0.7 and 1.15. The circuit output pin #QUALITY is a low impedance output able to drive external circuitry as well as suitable to be simply fed to an A/D converter for RDS applications. 5.9.1 AF Search Control The device is supplied with several functionality to support AF-checks using the stereodecoder. As already mentioned before the high ohmic mute feature at the stereo decoder input avoids any clicks during the jump condition. It is possible at the same time to evaluate the noise- and multipath-content of the alternate frequency by 26/59 TDA7513T using the Quality detector output. During this time the multipath detector is automatically switched to a small time constant. One dedicated pin (#RDSMUTE) is provided in order to separate the audioprocessor-mute and stereodecoder AF-functions. 5.10 I2C-Bus Interface I2C bus protocol is supported. This protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device that controls the transfer is a master and device being controlled is the slave. The master will always initiate data transfer and provide the clock to transmit or receive operations. The present device always acts as slave, both in transmission and in reception mode. 5.10.1Data Transition Data transition on the SDA line must only occur when the clock SCL is LOW. SDA transitions while SCL is HIGH will be interpreted as START or STOP condition. 5.10.2Start Condition A start condition is defined by a HIGH to LOW transition of the SDA line while SCL is at a stable HIGH level. This "START" condition must precede any command and initiate a data transfer onto the bus. The device continuously monitors the SDA and SCL lines for a valid START and will not response to any command if this condition has not been met. 5.10.3Stop Condition A STOP condition is defined by a LOW to HIGH transition of the SDA while the SCL line is at a stable HIGH level. This condition terminates the communication between the devices and forces the bus interface of the device into the initial condition. 5.10.4Acknowledge Indicates a successful data transfer. The transmitter will release the bus after sending 8 bits of data. During the 9th clock cycle the receiver will pull the SDA line to LOW level to indicate it received the eight bits of data. 5.10.5Data Transfer During data transfer the device samples the SDA line on the leading edge of the SCL clock. Therefore, for proper device operation the SDA line must be stable during the SCL LOW to HIGH transition. 5.10.6Device Addressing To start the communication between two devices, the bus master must initiate a start instruction sequence, followed by an eight bit word corresponding to the address of the device. The device recognizes the following two addresses: 1100010d tuner part address 1000110d stereo decoder / audio processor address (APSD) The last bit of the start instruction defines the type of operation to be performed: – when set to "1", a read operation is selected (data are transferred from the device to the master) – when set to "0", a write operation is selected (data are transferred from the master to the device) The device connected to the bus will compare its own hardwired addresses with the slave address being transmitted after detecting a START condition. After this comparison, the device will generate an "acknowledge" on the SDA line and will perform either a read or a write operation according to the state of the R/W bit. 27/59 TDA7513T 5.10.7Write Operation Following a START condition the master sends a slave address word with the R/W bit set to "0". The device will generate an "acknowledge" after this first transmission and will wait for a second word (the subaddress field). This 8-bit address field provides an access to any of the 64 internal addresses (32 corresponding to the tuner address and 32 corresponding to the stereo decoder / audio processor address). Upon receipt of the subaddress the device will respond with an "acknowledge". At this time, all the following words transmitted to the device will be considered as Data. The internal address may be automatically incremented if the auto-increment mode is selected (bit S5 of the subaddress word) . After each word has been received the device will answer with an "acknowledge". 5.10.8Read Operation IF the master sends a slave address word with the R/W bit set to "1", the device will transmit one 8-bit data word. This data word content changes according to the address corresponding to the tuner or to the stereo decoder / audio processor. The information are the following: – tuner bit0: ISS filter, 1 = ON, 0 = OFF bit1: ISS filter bandwidth, 1 = 80kHz, 0 = 120kHz bit2: MPOUT,1 = multipath present, 0 = no multipath bit3: 1 = PLL is locked in , 0 = PLL is locked out bit4: fieldstrength indicator, 1 = lower as softmute threshold, 0 = higher as softmute threshold bit5: adjacent channel indicator, 1 = adjacent channel present, 0 = no adjacent channel bit6: deviation indicator, 1 = strong overdeviation present, 0 = no strong overdeviation bit7: deviation indicator, 1 = overdeviation present, 0 = no overdeviation – stereo decoder / audio processor bit2: Soft Mute status, 1 = ON, 0 = OFF bit3: Stereo mode, 1 = stereo, 0 = mono Table 28. ISS Modes MODE 1 28/59 sm ac ac+ dev dev+ ISSon 80KHz 0 0 0 0 0 0 0 0 1 X 0 0 1 1 0 1 X 1 X 1 0 1 X X 0 0 1 1 1 0 0 1 X 0 0 1 1 X 1 X 1 0 TDA7513T MODE 2 sm ac ac+ dev dev+ ISSon 80KHz 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 1 1 X X 1 1 0 1 0 1 X 1 0 1 X X 0 0 1 1 1 0 0 1 X 0 0 1 1 0 1 X 1 0 1 1 1 1 X 1 1 Figure 5. Softmute Timing Figure 7. Bass center @Gain = 14dB, Q = 1 15.0 EXT. MUTE 12.5 1 10.0 +SIGNAL 7.5 REF 5.0 -SIGNAL 2.5 1 2 I C BUS OUT 0.0 D97AU634 10.0 Time Figure 6. Bass Control @ Fc = 80Hz, Q = 1 15.0 100.0 1.0K 10.0K Figure 8. Bass Quality factors @ Gain = 14dB, fc = 80Hz 15.0 10.0 12.5 5.0 10.0 0.0 7.5 5.0 -5.0 2.5 -10.0 0.0 -15.0 10.0 100.0 1.0K 10.0K 10.0 100.0 1.0K 10.0K Figure 9. Bass normal and DC Mode@ Gain = 29/59 TDA7513T 14dB, fc = 80Hz Figure 12. Mid Q factor@ fc=1KHz,Gain =14dB 15.0 15.0 12.5 12.5 10.0 10.0 7.5 7. 5 5.0 5. 0 2.5 2. 5 0.0 10.0 100.0 1.0K 10.0K 0. 0 10.0 100. 0 1.0K 10.0K Figure 10. Mid Control @ fc = 1KHz, Q = 1 15.0 Figure 13. Treble Control @ fc = 17.5KHz 10.0 15.0 5. 0 10.0 0. 0 5.0 5.0 0.0 -10.0 -5.0 -15.0 10.0 100. 0 1.0K 10.0K -10.0 -15.0 Figure 11. Mid Center Frequency@ Gain =14dB, Q = 1 10.0 100.0 1.0K 10.0K Figure 14. Treble Center Frequencies@ Gain = 14dB 15.0 12.5 15.0 10.0 12.5 7. 5 10.0 5. 0 7.5 2. 5 5.0 0. 0 2.5 10.0 100. 0 1.0K 10.0K 0.0 10.0 30/59 100.0 1.0K 10.0K TDA7513T Figure 15. Block Diagram of the Stereodecoder Figure 16. Signal During Stereodecoder’s Softmute SOFTMUTE COMMAND t STD MUTE t VO D97AU638 t Figure 17. Internal stereobland Characteristics 31/59 TDA7513T Figure 18. Relationship between unadjusted (LEVEL) and adjusted (LEVELITERN) filtered field strength signals INTERNAL VOLTAGES INTERNAL VOLTAGES SETUP OF VST SETUP OF VMO LEVEL INTERN LEVEL INTERN REF 5V REF 5V 58% LEVEL VSBL VSBL VMO VST 29% t FIELDSTRENGHT VOLTAGE modAU639 VMO VST Figure 19. Highcut Characteristics LOWPASS TIME CONSTANT 3•τDeemp τDeemp VHCL VHCH FIELDSTRENGHT D97AU640 Figure 20. MPX RECTIFIER RECT + - + VTH PEAK LOWPASS MPOUT THRESHOLD GENERATOR + CONTROL modAU856 Figure 21. Block diagram of the Multipath Detector 32/59 MONOFLOP ADDITIONAL THRESHOLD CONTROL HOLDN t FIELDSTRENGHT VOLTAGE TDA7513T 6 SOFTWARE SPECIFICATIONS 6.1 ADDRESS ORGANIZATION (TUNER SECTION) MSB LSB Subaddr. D7 D6 0 STBY Current select 1 Lock detenable D5 D4 D3 D2 Low current Function D0 Charge Pump Control and STBY High current Phase difference threshold activation delay D1 fref VCOadj PLL Lock Detector,FM mode and BYPASS clockenab tests AM/FM 2 counter LSB 3 counter MSB PLL Counter 2 (MSB) 4 counter LSB PLL Reference Counter 2 (LSB) 5 counter MSB PLL Reference Counter 2 (MSB) 6 7 FM ISS DD FM audio amp. mute disable thr depth @ weak FS SEEK 8 FM antenna adjustment FM Antenna Adjustment and FM Mute Depth FM RF adjustment FM RF Adjustment, AM prescaler and Seek AM prescaler IFC enable AM stop station tSAMPLE 9 IF Counter Control 2 (central frequency and sampling time) counter LSB IFC AM/FM IF Counter Reference (LSB) IF Counter Reference (MSB) and IF Counter Mode Select counter MSB AMIF2amp 12 AMUNAGC test ACmute FM demodulator Adjust, FM demod noise blanker and MPtest MPQUAL test 14 ISS AC narrowband threshold 15 ISS MP defeat AC ISS mode ISS MP threshold 16 0 ISS DD off threshold ISS DD narrow/wide threshold ISS center 18 SO mode 21 22 23 FM demodulator fine adjust AM Smeter extens 17 ISS AC wideband threshold ISS time constant ISS MP gain Manual/ auto 20 ISS AC gain ISS AC HP/BP Quality Detection Adjacent ISS 30KHz on Channel test Smet unfiltered ISS MP center ISS MP Quality Detection Multipath ctrl on ISS DD time constant ISS 80/ 120 VCO adj start AdjChan mute clamp AM Smeter filter TC IFT2 adjust ISS on ISS enable man SET 456 man ENIFC FM soft mute AdjChan mute gain FMSmslider IFT1 adjust Quality Detection Deviation Quality ISS Filter PLL test, 456KHz VCO adiustment start (auto mode) test PLL Manual VCO frequency FM stop station AC QUAL test AM Ultra Narrow AGC Thresh., FM SMut AM IF2 Amplifier Gain, FM enable SoftMute Enable and AC test FM demod noise blanker 13 19 IF Counter Control 1 and AM S.S. Threshold ∆f tCENTER 10 11 PLL Counter 1 (LSB) 456KHz VCO adjustment (manual mode) FM Stop Station and soft Mute Thresholds Adjacent mute gain, clamping threshold and test FM Smeter slider and AM Smeter filter Time Constant IFT1 adjust 33/59 TDA7513T MSB Subaddr. LSB D7 24 D6 D5 FMIFamp2 D4 D3 Clksep D2 D1 XTAL adjustment and FM IF Amp2 XTAL adjustment 25 AMWAGC FMNAGCkey 26 AMNAGC FM demod ref frequency divider 27 ISS filter test 29 Smeter pin test test ISS MP/AC AdjChan mute disable AdjChan mute BP/HP @low FS 31 Turner quality AdjChan gain AM NAGC an FMdemod ref frequency divider ISS testing Test ISS Tuner and Smeter test test TURNER 30 AM WAGC an FM MAGC keying ISS testing test ISS 28 Function D0 Turner quality multipath gain AdiChan mute threshold AdjChan mute disable, filtering and threshold FS ISS activation Tuner Quality AdjChannel and Multipath gain, FS ISS Activation ADDRESS MSB D7 1 D6 1 D5 0 D4 0 D3 0 D2 1 D1 0 LSB D0 R/W S6 X S5 autoincr S4 S3 S2 subaddress S1 LSB S0 S4 FS S3 INLOCK S2 MP S1 BW LSB S0 ON SUBADDRESS MSB S7 X READ MODE: ISS OUTPUTS MSB S7 DEV+ S6 DEV S5 AC 6.2 SUBADDRESS ORGANIZATION (TUNER SECTION) MSB D7 D6 D5 0 0 1 1 D4 D3 D2 D1 LSB D0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 1 1 1 1 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 34/59 FUNCTION CHARGE PUMP High current = 0mA High current = 0.5mA High current = 1mA High current = 1.5mA High current = 7.5mA Low current = 0µA Low current = 50µA Low current = 100µA Low current = 150µA Select low current Select high current TURNER STAND-BY Turner StandBy OFF Turner StandBy ON TDA7513T SUBADDRESS 1: PLL Lock detector, FM mode and test MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 FUNCTION CHARGE PUMP VCO adjust lock Disable VCO adjust lock Enable fref BYPASS Disable fref BYPASS Enable TURNER/PLL AM/FM MODE Select AM mode Select FM mode LOCK DETECTOR CONTROL PD phase difference threshold 10ns PD phase difference threshold 20ns PD phase difference threshold 30ns PD phase difference threshold 40ns Not valid Activation delay 4x1/fREF Activation delay 6x1/fREF Activation delay 8x1/fREF Lock detector doesn’t control charge pump Lock detector controls charge pump SUBADDRESS 2: PLL Counter 1 (LSB) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 LSB = 0 0 0 0 0 0 0 0 1 LSB = 1 0 0 0 0 0 0 1 0 LSB = 2 - - - - - - - - - 1 1 1 1 1 1 0 0 LSB = 252 1 1 1 1 1 1 0 1 LSB = 253 1 1 1 1 1 1 1 0 LSB = 254 1 1 1 1 1 1 1 1 LSB = 255 SUBADDRESS 3: PLL Counter 2 (MSB) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 MSB = 0 0 0 0 0 0 0 0 1 MSB = 256 0 0 0 0 0 0 1 0 MSB = 512 - - - - - - - - - 1 1 1 1 1 1 0 0 MSB = 64768 1 1 1 1 1 1 0 1 MSB = 65024 1 1 1 1 1 1 1 0 MSB = 65280 1 1 1 1 1 1 1 1 MSB = 65536 Note: 1 Swallow mode:fVCO/fSYN = LSB + MSB + 32 35/59 TDA7513T SUBADDRESS 4: Reference Counter 1 (LSB) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 LSB = 0 0 0 0 0 0 0 0 1 LSB = 1 0 0 0 0 0 0 1 0 LSB = 2 - - - - - - - - - 1 1 1 1 1 1 0 0 LSB = 252 1 1 1 1 1 1 0 1 LSB = 253 1 1 1 1 1 1 1 0 LSB = 254 1 1 1 1 1 1 1 1 LSB = 255 SUBADDRESS 5: Reference Counter 2 (MSB) MSB LSB FUNCTION D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 MSB = 0 0 0 0 0 0 0 0 1 MSB = 256 0 0 0 0 0 0 1 0 MSB = 512 - - - - - - - - - 1 1 1 1 1 1 0 0 MSB = 64768 1 1 1 1 1 1 0 1 MSB = 65024 1 1 1 1 1 1 1 0 MSB = 65280 1 1 1 1 1 1 1 1 MSB = 65536 Note: 1 fVCO/fSYN = LSB + MSB + 1 SUBADDRESS 6: FM Antenna Adjustment and FM Mute Depth MSB D7 D6 D5 - - - - - - 0 1 0 1 0 0 1 1 0 1 36/59 D4 D3 D2 D1 LSB D0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 1 0 0 1 0 1 FUNCTION FM antenna adj (proportional to Vtuning) -30% -28% -2% -0% +0% +2% +28% +30% FM Soft Mute Depth 25dB 20dB 16dB 13.5dB ISS deviation detector disabling threshold relative to weak fild ISS activation threshold (byte 31 bit 3-00 -100mV +100mV TDA7513T SUBADDRESS 7: FM RF Adjustment AM Prescaler and Seek MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 FM RF adj (proportional to Vtuning) - - - - - - 0 1 1 1 1 -30% 0 1 1 1 0 -28% - - - - - - 0 0 0 0 1 -2% 0 0 0 0 0 -0% 1 0 0 0 0 +0% 1 0 0 0 1 +2% - - - - - - 1 1 1 1 0 +28% 1 1 1 1 1 +30% AM VCO divider ratio 0 0 10 0 1 8 1 0 6 1 1 4 SEEK MODE 0 Seek OFF 1 Seek ON SUBADDRESS 8 : IF Counter Control 1 and AM S.S. Threshold MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 IF COUNTER CONTROL 0 0 0 Not valid 0 0 1 Not valid 0 1 0 Not valid 0 1 1 ∆f = 6.25kHz (FM) 1kHz (AM UPC) 1 0 0 ∆f = 12.5kHz (FM) 2kHz (AM UPC) 1 0 1 ∆f = 25kHz (FM) 4kHz (AM UPC) 1 1 0 ∆f = 50kHz (FM) 8kHz (AM UPC) 1 1 1 ∆f = 100kHz (FM) 16kHz (AM UPC) 0 IF counter disable/stand by 1 IF counter enable AM Stop Station Threshold 0 0 0 0 0mV 0 0 0 1 150mV - - - - 1 1 1 0 - - - - 2100mV 1 1 1 1 2250mV 37/59 TDA7513T SUBADDRESS 9: If Counter Control 2 MSB D7 D6 D5 - - - - - - 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D4 D3 D2 D1 LSB D0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 1 1 1 1 0 0 1 0 0 0 0 1 1 1 1 0 0 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 1 FUNCTION FM antenna adj (proportional to Vtuning) fcenter = 10.60625MHz (FM) 449KHz (AM) fcenter = 10.61250MHz (FM) 450KHz (AM) fcenter = 10.66875MHz (FM) 459KHz (AM) fcenter = 10.67500MHz (FM) 460KHz (AM) fcenter = 10.68125MHz (FM) 461KHz (AM) fcenter = 10.68750MHz (FM) 462KHz (AM) fcenter = 10.69375MHz (FM) 463KHz (AM) fcenter = 10.70000MHz (FM) 464KHz (AM) fcenter = 10.70625MHz (FM) 465KHz (AM) fcenter = 10.71250MHz (FM) 466KHz (AM) fcenter = 10.80000MHz (FM) 480KHz (AM) tsample = 20.48ms (FM) 128ms (AM) tsample = 10.24ms (FM) 64ms (AM) tsample = 5.12ms (FM) 32ms (AM) tsample = 2.568ms (FM) 16ms (AM) tsample = 1.28ms (FM) 8ms (AM) tsample = 640µs (FM) 4ms (AM) tsample = 320µs (FM) 2ms (AM) tsample = 160µs (FM) 1ms (AM) SUBADDRESS 10: IF Counter Reference (LSB) MSB D7 0 0 0 1 1 1 1 D6 0 0 0 1 1 1 1 D5 0 0 0 1 1 1 1 D4 0 0 0 1 1 1 1 D3 0 0 0 1 1 1 1 D2 0 0 0 1 1 1 1 D1 0 0 1 0 0 1 1 LSB D0 0 1 0 0 1 0 1 FUNCTION LSB = 0 LSB = 1 LSB = 2 LSB = 252 LSB = 253 LSB = 254 LSB = 255 SUBADDRESS 11: IF Counter Reference (MSB) and IF Counter Mode select MSB D7 D6 - - 0 0 1 0 0 1 0 0 D5 0 0 0 1 1 1 D4 0 0 0 1 1 1 Note: 1 fOSC/fTIM = LSB + MSB + 1 38/59 D3 0 0 0 1 1 1 D2 0 0 0 1 1 1 D1 0 0 1 0 1 1 LSB D0 0 1 0 1 0 1 FUNCTION MSB = 0 MSB = 256 MSB = 512 MSB = 15616 MSB = 15872 MSB = 16128 IF COUNTER MODE not valid IF counter FM mode (10.7KHz) IF counter AM mode (450KHz) not valid TDA7513T SUBADDRESS 12: AM IF Amplifier gain and Ultra Narrow Band AGC Threshold, FM Smeter and AC test MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 test FM FS soft mute enable (FM mode) [bit shared with AM IF AMP Gain] 0 FS Soft mute disabled 1 FS Soft mute enabled test AC mute (FM mode) [bit shared with AM IF AMP Gain] 0 test mode FM demod Vout is disconnected from users 1 no test (std) AM IF AMP Gain (am mode) 0 0 0 Not used 0 0 1 53.2dB 0 1 0 55.8dB 0 1 1 60.2dB 1 0 0 58.3dB 1 0 1 61.7dB 1 1 0 62.8dB 1 1 1 64.8dB AM UNAGC enable 1 Enable AM UNAGC 0 Disable AM UNAGC AM Ultra Narrow Band AGC Threshold 0 0 0 0 74.4dBµV @SG 0 0 0 1 78.8dBµV @SG 0 0 1 0 80.0dBµV @SG 0 0 1 1 80.7dBµV @SG 119.5dBµV @ IF2AMPOUT 0 1 0 0 53.2dBµV @SG 0 1 0 1 77.1dBµV @SG 0 1 1 0 78.5dBµV @SG 0 1 1 1 79.4dBµV @SG 1 0 0 0 42.7dBµV @SG 1 0 0 1 65.8dBµV @SG 1 0 1 0 77.6dBµV @SG 1 0 1 1 78.5dBµV @SG 1 1 0 0 32.6dBµV @SG 113.5dBµV @ IF2AMPOUT 1 1 0 1 55.0dBµV @SG 1 1 1 0 73.3dBµV @SG 1 1 1 1 77.6dBµV @SG 39/59 TDA7513T SUBADDRESS 13: Demodulator Fine Adjust and Noise Blanker, MP Qual test MSB D7 D6 0 0 1 1 D5 D4 D3 D2 D1 LSB D0 0 0 0 1 0 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 1 0 1 1 FUNCTION Fm audio demodulator current adjust 0µA 0.167µA 2.51µA 0µA 0.167µA 2.51µA Demodulator Noise Blanker AM Smeter extension NB1&2 on (impvic&lontmas) old (10.7MHz) NB1 on (impvicmas) old (10.7MHz) NB2 on (implontmas0 new (450kHz) NB1&2 off new (450kHz) Multipath (ISS) test MP test OFF MP test ON (ISS quality detector MP input from #ACinL, ISS MP filter+rect output to Smeter test muxer if input 12 is selected 0 1 0 1 SUBADDRESS 14: Quality Detection Adjacent Channel MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 ISS Filter for WB 0 ISS filter 30KHz OFF 1 ISS filter 30KHz ON ISS Adjacent Channel filter configuration 0 AC highpass frequency 100KHz 1 AC bandpass frequency 100KHz AC gain 0 32dB 1 38dB ISS Adjacent Channel threshold 0 0 0 AC wide band threshold 0.25V 0 0 1 AC wide band threshold 0.35V 0 1 0 AC wide band threshold 0.45V - - -- 1 1 1 - - 0 0 AC narrow band threshold 0V 0 1 AC narrow band threshold 0.1V 1 0 AC narrow band threshold 0.2V 1 1 AC narrow band threshold 0.3V 40/59 - - - AC wide band threshold 0.95V TDA7513T SUBADDRESS 15: Quality Detection Multipath and Smeter test MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 ISS Multipath control enabling 0 Multipath control ON 1 Multipath control OFF ISS Multipath filter center frequncy 0 MP Bandpass frequency 19KHz 1 MP Bandpass frequency 31KHz ISS Multipath filter input selector (test mode) 0 Smeter unfilt test OFF 1 Smeter unfilt test ON ISS Multipath threshold 0 0 0.5V 0 1 0.75V 1 0 1V 1 1 1.25V ISS mode 0 0 Application mode 1 0 1 Application mode 2 ISS Multipath control mode 0 MP control AC+ detection 1 MP control the AC and AC+ detection SUBADDRESS 16: Quality Detection Deviation MSB D7 LSB D6 D5 D4 D3 D2 D1 D0 0 0 0 FUNCTION ISS deviation detector ime constant charge current 34µA; discharge current 6µA 0 0 1 charge current 32µA; discharge current 8µA 0 1 0 charge current 30µA; discharge curren10µA 1 0 0 charge current 26µA; discharge current 14µA 1 1 1 charge current 20µA; discharge current 20µA ISS deviation detector thresholds 0 0 DEV Threshold for ISS narrow-wide 30KHz 0 1 DEV Threshold for ISS narrow-wide 45KHz 1 0 DEV Threshold for ISS narrow-wide 60KHz 1 1 DEV Threshold for ISS narrow-wide 75KHz 0 0 DEV Threshold for ISS filter OFF ratio 1 0 1 DEV Threshold for ISS filter OFF ratio 1.3 1 0 DEV Threshold for ISS filter OFF ratio 1.4 1 1 DEV Threshold for ISS filter OFF ratio 1.5 0 not used 1 AUX set int80 41/59 TDA7513T SUBADDRESS 17: Quality ISS Filter MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION FUNCTION FUNCTION FUNCTION D0 ISS automatic control fron AC detector 0 1 ON (AC drives ISSTC) OFF (AC has no influence on ISSTC) ISS manual control 0 automatic control only 1 manual force filter ON 0 manual force BW 120KHz 1 manual force BW 80KHz ISS time constant current: 0 0 discharge 0 1µA chrg mid chrg narrow 74µA 124µA 0 0 1 3µA 72µA 122µA 0 1 0 5µA 70µA 120µA 1 0 0 9µA 66µA 116µA 1 1 1 15µA 60µA 110µA ISS filter center frequency 0 0 shift from 450kHz -20KHz 0 1 1 0 -10KHz 0KHz 1 1 10KHz SUBADDRESS 18: PLL rest, 456KHz VCO adjust start, ISS MP Gain and SD out mode MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 FUNCTION PLL TEST MODE 0 1 0 0 1 0 0 1 1 42/59 0 1 0 1 0 1 0 Automatic 456KHz VCO adjustment Waiting START ISS Multipath filter gain ISS MP Gain 2dB ISS MP Gain 13dB ISS MP Gain 16dB SD pin configuration ISS (IFC and FM SM Stop) IF Counter out FM Smeter Stop Logic 1 TDA7513T SUBADDRESS 19: 456KHz VCO adjustment (manual mode) MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 1 0 0 0 1 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 0 1 0 1 1 0 1 1 0 0 1 FUNCTION Enable IFC (I2CBUS) OFF Enable IFC (I2CBUS) ON Enable 456KHz VCO adj procedure (I2CBUS) OFF Enable 456KHz VCO adj procedure (I2CBUS) ON VCO 456KHz frequency adjust (I2CBUS) minfreq VCO 456KHz frequency adjust (I2CBUS) maxfreq Manual adjustment procedure (I2CBUS) Automatic adjustment procedure (State Machine) 0 1 SUBADDRESS 20: FM Stop Station and Soft Mute Threshold MSB D7 0 0 1 1 D6 D5 0 0 1 1 D4 0 0 1 1 D3 D2 D1 LSB D0 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 FUNCTION Soft Mute Threshold on Smeter 0mV 100mV 1.4V 1.5V FM Stop Station Threshold on Smeter 400mV 800mV 3.2V 3.6V SUBADDRESS 21: Adjacent Channel Mute MSB D7 D6 0 0 1 1 1 D5 0 0 0 1 1 D4 0 0 0 1 1 D3 0 1 0 0 1 D2 D1 LSB D0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 FUNCTION Adj Channel Mute Gain 10.4dB 11.4dB 12.4dB 13.4dB 14.4dB 15.4dB 16.4dB 17.4dB Adj Channel Mute Clamp 500mV 600mV 1.3V 1.9V 2V Adjacent Channel (ISS) test 43/59 TDA7513T MSB 0 1 LSB FUNCTION AC test OFF AC test ON (ISS qualitydetector AC input from #ACinL, ISS AC filter+rect output to Smeter test muxer if input 12 is selected) SUBADDRESS 22: FM Smeter Sider and AM Smeter Time Constant MSB D7 0 1 0 1 0 D6 0 0 1 1 0 D5 D4 D3 D2 D1 LSB D0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 D3 D2 D1 LSB D0 0 0 0 0 1 FUNCTION FM Smeter Sider 0V 0.48V 1.45V 1.5V AM Smeter Filter TC (resistor value) 75KΩ 50KΩ 35KΩ 24KΩ 16KΩ SUBADDRESS 23: IFT Adjust MSB D7 D6 D5 D4 0 0 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 1 1 0 0 1 1 FUNCTION IFT1 Adjust 0pF 0.55pF 7.7pF 8.25pF IFT2 Adjust 75pF 50pF 22.4pF 24pF SUBADDRESS 24: XTAL and FM IF AMP 2 Gain MSB D7 D6 D5 0 1 44/59 D4 D3 D2 D1 LSB D0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 FUNCTION XTAL adjust Cload 0pF 0.625pF 1.25pF 2.5pF 5pF 10pF 10.4pF XTAL TEST) xtal clock clocksep (testing) FM IF Amp2 Gain TDA7513T MSB 0 0 1 1 LSB 0 1 0 1 FUNCTION 6dB 8dB 10dB not used SUBADDRESS 25: FM NAGC key and AM WAGC MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 FM Narrow ACGC key IF input 0 0 0 36dB 0 0 1 42dB 0 1 0 48dB 0 1 1 54dB 1 0 0 60dB 1 0 1 66dB 1 1 0 72dB 1 1 1 keying OFF AM WAGC starting point @ MIX1IN 0 0 0 0 0 88dBµV - - - - - - 1 1 1 1 1 106dBµV SUBADDRESS 26: AM NAGC key and FM demod ref frequency test MSB D7 LSB D6 D5 D4 D3 D2 D1 D0 1 1 0 FUNCTION test for FM demod ref freq divider (standard configuration) AM WAGC starting point @ MIX2IN 0 0 0 0 0 85dBµV - - - - - - 1 1 1 1 1 103dBµV SUBADDRESS 27: ISS tests MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 ISS test multiplexer (1) 0 0 0 0 0 0 0 0 no test 0 0 0 0 0 0 0 1 test MP thresholds 0 0 0 0 0 0 1 0 test ACN thresholds 0 0 0 0 0 1 0 0 test DW thresholds 0 0 0 0 1 0 0 0 test D thresholds 0 0 0 1 0 0 0 0 test ACW thresholds 0 0 1 0 0 0 0 0 test ac 45/59 TDA7513T MSB LSB FUNCTION 0 1 0 0 0 0 0 0 test MDSCO 1 0 0 0 0 0 0 0 test ISSout SUBADDRESS 28: ISS tests MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 0 1 FUNCTION ISS test multiplexer (2) no test test dev+ test dev+ test ref dev test dem Vout test ISS in test ISSC ik Enble ISS test in test in ISS disable test in ISS enable ISS test clock test ISS clock disable test ISS clock enable SUBADDRESS 29: Tuner and Smeter tests MSB D7 LSB D6 FUNCTION D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 test off 0 0 0 0 0 1 test AMAGC1W 0 0 0 0 1 0 test AMAGC1N 0 0 0 0 1 1 test AMAGC1UN 0 0 0 1 0 0 test FM Smute Threshold 0 1 0 1 0 1 test FMSMStop 0 0 0 1 1 0 test AMIF2Amp 0 0 0 1 1 1 test AMSDDAC 0 0 1 0 0 0 test FMKAGC 0 0 1 0 0 1 test FMACMDisable 0 0 1 0 1 0 test FMDemodAdjON 0 0 1 0 1 1 test FMDemodAdjONMute 0 0 1 1 0 0 test FMACMuteRct 0 0 1 1 0 1 test FSISSONThreshold 0 0 1 1 1 0 test FSISSON 0 0 1 1 1 1 test ISSInput SMETER test multiplexer 46/59 0 Smeter OUT ACD enable 1 test Smete IN TDA7513T MSB LSB FUNCTION 0 Smeter filter force enable 1 test TMODE1OUT (byte 27/28) SUBADDRESS 30: Adjacent channel mute MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 0 1 1 1 0 0 0 1 1 0 0 0 1 1 0 1 0 0 1 0 1 - - 0 0 1 1 0 1 0 1 0 1 FUNCTION Adjacent channel mute threshold 0mV 28.7mV 229.3mV 401.3mV 430mV Adjacent channel mute filter configuration AdjChannel Mute HighPass filter 1 AdjChannel Mute BandPass filter 1 AdjChannel Mute HighPass filter 2 AdjChannel Mute BandPass filter 2 Adjacent channel mute disable @ low FS threshold 1V threshold 1.33V threshold 1.66V threshold 2V SUBADDRESS 31: Adjacent channel and Multipath gain, weak field ISS threshold MSB D7 D6 D5 D4 D3 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D2 0 0 1 0 0 1 1 D1 0 0 1 0 0 1 1 LSB D0 0 1 1 0 1 0 1 FUNCTION Weak field ISS activation threshold -450mV -385.7mV -0mV +0mV 64.28mV 385.7mV 450mV Turner Quality Multipath gain 0 (OFF) dB -4dB 0dB 4dB Turner Quality Adjacent channel gain (OFF) -4dB 0dB 4dB 47/59 TDA7513T 6.3 ADDRESS ORGANIZATION (STEREODECODER AND AUDIOPROCESSOR SECTION) MSB Subaddr. LSB D7 0 D6 D5 spkr coupl D4 D3 D2 D0 source selector in gain 1 D1 Function volume steps Source selector, in gain, peaker coupling Volume 2 not used treble center freq treble steps 3 bass DC mode bass Q factor bass steps Treble Bass 4 volume steps Speaker attenuator Left Front 5 volume steps Speaker attenuator Right Front 6 volume steps Speaker attenuator Left Read 7 volume steps Speaker attenuator Right Rear 8 bass center frequency NB time 9 deemph. 10 pilot thr. overdev. adj NB peak dis NB on force mono not used soft mute time I2C soft Soft mute, soft mute time, Bass, mute off Noise blanker time auto zero status std in gain Stereo decoder mute, st dec instd mute gain, mono, NB PEAK disch curr., disable pilot thresh, deemph. noise contr.thresh. low threshold high cut High cut, multipath influence on 11 mpath. infl. VHCL VHCH max high out 12 mpath. infl. Quality del. coeff. NB field strength gain NB field strength threshold mpath. det. Reflect. Gain 13 roll-off compens. 14 15 mpath.int. infl mpath.det gain level gain AP test ON 400K ON 16 17 mpath. charge not used noise rect.disch, R roll-off compensation Itest SC OFF test signal selection AM high cut control corner frequency mid Qfactor mid center frequency 18 Noise Blanker quality noise gain Noise rectifier disch. resistor, Multipath del. bandpass gain, multipath internal influence, reflection gain Roll-off compensation, level gain SID test TEST BYTE ON mpath test AMHCC, Quality noise gain, test mid steps not used Fieldstrength control Mid Stereo blend VSBL SUBADDRESS MSB D7 testcon D6 azhold D5 autoincr D4 D3 D2 subaddress D1 LSB D0 S6 S5 S4 S3 STEREO S2 SMON S1 LSB S0 S6 0 S5 0 S4 0 S3 1 S2 1 S1 0 LSB S0 R/W READ MODE MSB S7 ADDRESS MSB S7 1 48/59 TDA7513T 6.4 SUBADDRESS ORGANIZATION (STEREODECODER AND AUDIOPROCESSOR SECTION) SUBADDRESS 0: Source selector, in-gain, Speaker coupling MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 Source Selector 0 0 0 Quasi-differential input 1 0 0 1 Quasi-differential input 2 0 1 0 not used (mute) 0 1 1 Turner input (AM mode) 1 0 0 Turner input (FM mode) 1 0 1 not used (mute) 1 1 0 not used (mute) 1 1 1 not used (mute) In-Gain 0 0 0 0 0dB 0 0 0 1 1dB - - - - - 1 1 1 0 14dB 1 1 1 1 15dB Speaker Coupling 0 AC (external) 1 DC (internal) Subaddress 1,4,5,6,7: Volume Spkr atten. LF, RF, LR, RR MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 Volume steps 1 0 0 0 1 1 1 1 15dB - - - - - - - - - 1 0 0 0 0 0 0 1 1dB 0 0 0 0 0 0 0 0 0dB 0 0 0 0 0 0 0 1 -1dB - - - - - - - - - 0 0 0 0 1 1 1 1 -15dB 0 0 0 1 0 0 0 0 -15dB - - - - - - - - - 0 1 0 0 1 1 1 0 -78dB 0 1 0 0 1 1 1 1 -79dB X 1 1 X X X X X mute all other combinations not allowed 49/59 TDA7513T Subaddress 2: Treble MSB D7 LSB D6 D5 FUNCTION D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 1 -14dB - - - - - - 0 1 1 1 0 -1dB 0 1 1 1 1 0dB 1 1 1 1 1 0dB 1 1 1 1 0 1dB Treble filter steps -15dB - - - - - - 1 0 0 0 1 -14dB 1 0 0 0 0 -15dB Treble filter center frequency 0 0 10.0kHz 0 1 12.5kHz 1 0 15kHz 1 1 17.5kHz Subaddress 3: Bass MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 Bass filter steps 0 0 0 0 0 -15dB 0 0 0 0 1 -14dB - - - - - - 0 1 1 1 0 -1dB 0 1 1 1 1 0dB 1 1 1 1 1 0dB 1 1 1 1 0 1dB - - - - - - 1 0 0 0 1 -14dB 1 0 0 0 0 -15dB Bass filter Q-factor 0 0 1.00 0 1 1.25 1 0 1.50 1 1 2 (makes cent. freq. = 150Hz when programmed to 100Hz) Bass filter DC mode 0 off 1 on 50/59 TDA7513T Subaddress 4: Speaker attenuator Left Front MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 Volume steps 1 0 0 0 1 1 1 1 15dB - - - - - - - - - 1 0 0 0 0 0 0 1 1dB 0 0 0 0 0 0 0 0 0dB 0 0 0 0 0 0 0 1 -1dB - - - - - - - - - 0 0 0 0 1 1 1 1 -15dB 0 0 0 1 0 0 0 0 -15dB - - - - - - - - - 0 1 0 0 1 1 1 0 -78dB 0 1 0 0 1 1 1 1 -79dB X 1 1 X X X X X mute all other combinations not allowed Subaddress 8: Soft mute, Bass, Noise blanker time MSB D7 LSB D6 D5 D4 D3 D2 D1 FUNCTION D0 Soft mute activation control 0 I2C bus Audio Processor mute ON (independently of pin Audio Mute) 1 I2C bus Audio Processor mute OFF (pin Audio Mute controls muting: pin=0 ≥ mute ON, pin=1 ≥ mute OFF) 0 0 Soft mute transition time = 0.48ms 0 1 Soft mute transition time = 0.96ms 1 0 Soft mute transition time = 20.2ms 1 1 Soft mute transition time = 40.4ms Base filter center frequency 0 0 60Hz 0 1 70Hz 1 0 80Hz 1 1 100Hz (if bass DC mode OFF) 1 1 150Hz (if bass DC mode ON) Noise Blanker time 0 0 38µs 0 1 25.5µs 1 0 32µs 1 1 22µs 51/59 TDA7513T Subaddress 9: Stereo decoder mute, st. dec. in-gain, mono, NB PEAK disch, Curr., pilot thresh, deemph MSB D7 D6 D5 D4 D3 D2 LSB D0 D1 0 1 1 1 0 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 FUNCTION Stereo Decoder Mute high-ohmic mute, pilot hold, multipath time constant short ENABLED (mute set by pin RDS mute LOW) high-ohmic mute, pilot hold, multipath time constant short DISABLED (regardless of pin RDS mute) Stereo Decoder In-gain 0dB 2.5dB 4dB 5.5dB Auto Zero Status disabled enabled; trans. 0 ≥ 1 performs Autozero sequence Force MONO ON OFF (automatic MONO/STEREO switch) Noise PEAK discharge current low High Pilot Threshold low High Demphasis 50µs 75µs Subaddress 10: Noise blanker MSB D7 D6 D5 D4 0 0 1 1 0 1 0 0 1 1 52/59 0 1 0 1 D3 0 1 0 1 D2 D1 LSB D0 0 0 1 0 0 1 0 1 1 FUNCTION Low threshold 65mV 60mV 30mV Noise controlled threshold 320mV 260mV 200mV 140mV Noise Blanker operation OFF ON Overdeviation adjustment 2.8V 2.0V 1.2V OFF TDA7513T Subaddress 11: High cut, multipath influence MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 D2 D1 0 1 0 1 0 1 0 1 0 1 FUNCTION High cut operation OFF ON Max high cut 2dB 5db 7dB 10dB VHCH 42% REF 5V 50% REF 5V 58% REF 5V 66% REF 5V VHCL 16.7% VHCH 22.2% VHCH 27.8% VHCH 33.3% VHCH Strong Multipath influence on PEAK 18K OFF ON (18K discharge if VMPOUT <2.5V) Subaddress 12: Fieldstrength control MSB D7 LSB D6 D5 D4 D3 FUNCTION D0 Noise Blanker Fieldstrength threshold 0 0 1 0 0 1 1 1 min max Noise Blanker Fieldstrength Gain 0 0 2.3V 1 0 1.8V 0 1 1.3V 1 1 OFF Quality detector coefficient a 0 0 a = 0.7 0 1 a = 0.85 1 0 a = 1.0 1 1 a = 1.15 Multipath influence on PEAK discharge 0 OFF 1 ON 53/59 TDA7513T Subaddress 13: Noise rectifierdisch, resistor, Multipath del. bandpass gain, multipath internal influence, reflection gain MSB D7 D6 D5 D4 D3 0 0 1 1 D2 D1 LSB D0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 1 0 1 FUNCTION Noise Rectifier Discharge Resistor R = infinite R = 56K R = 33K R = 18K Multipath Detector Bandpass Gain 6dB 12dB 16dB 18dB Multipath Detector Internal Influence ON OFF Multipath Detector Change Current 0.5µA 1µA Multipath Detector Reflection Gain Gain = 7.6dB Gain = 4.6dB Gain = 0dB disabled Subaddress 14: Roll-off compensation, level gain MSB D7 D6 D5 D4 D3 0 0 0 D2 D1 LSB D0 0 0 0 0 0 1 0 1 0 - - - - 0 1 0 0 - - - - 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 - - - - 1 1 0 0 - - - - 1 1 1 1 0 0 0 1 54/59 0 0 0 1 0 0 1 1 0 1 0 1 FUNCTION Roll-off compensation not allowed 7.2% 9.4% 13.7% 20.2% not allowed 19.6% 21.5% 25.3% 31.0% Level gain 0dB 0.66dB 1.33dB 10dB TDA7513T Subaddress 15: TEST BYTE MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FUNCTION Stereo Decoder test signals enabling test signal disabled test signal enabled (if S6=1) on ACinR Stereo Decoder test signals selection VHCCH LEVELINTERN PILOT VCOCON (VCO tuning violtage) PIL_VTH HOLDN NB_VTH F228 VHCCL VSBL state machine enable ifc state machine set456 PEAK state machine check REF 5V SBPWM Test SC filter Fast test enabled (2-phase 200KHz clock) Test disabled (4-phase 200KHz clock) 400 KHz VCO OFF OFF ON Audio processor test enabling Test disabled Test enabled (if S6=1) Subaddress 16: Multipath test, AMHCC D7 D6 D5 D4 D3 D2 D1 D0 Multipath test enable 0 Multipath Detector test input disabled 1 Multipath Detector test input enabled Quality detector noise gain 0 0 15dB 0 1 12dB 1 0 9dB 1 1 6dB AM High-cut control corner frequency 0 0 0 0 0 0 0 0 0 1 - - - - - 1 1 1 1 0 1 1 1 1 1 55/59 TDA7513T Subaddress 17: Mid MSB D7 D6 D5 D4 0 0 - 0 0 1 1 D3 0 0 D2 0 0 D1 0 0 LSB D0 0 1 - - - - - 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 - - - - - 1 1 0 0 0 0 0 0 1 0 D3 D2 D1 LSB D0 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 FUNCTION Mid Filter steps -15dB -14dB -1db 0dB 0dB 1dB 14dB 15dB Mid Filter center frequency 500Hz 1.0KHz 1.5KHz 2.0KHz Mid Filter Q factor 1.0 2.0 Subaddress 18: Stereo blend MSB D7 - 56/59 D6 D5 D4 FUNCTION VSBL VSBL at 29% REF 5V VSBL at 33% REF 5V VSBL at 38% REF 5V VSBL at 42% REF 5V VSBL at 46% REF 5V VSBL at 29% REF 5V VSBL at 50% REF 5V VSBL at 54% REF 5V VSBL at 58% REF 5V TDA7513T Figure 22. TQFP80 Mechanical Data & Package Dimensions mm DIM. MIN. inch TYP. A MAX. MIN. TYP. 1.60 A1 0.05 A2 1.35 B 0.22 C 0.09 0.063 0.15 0.002 0.006 1.40 1.45 0.053 0.055 0.057 0.32 0.38 0.009 0.013 0.015 0.20 0.003 0.008 D 16.00 0.630 D1 14.00 0.551 D3 12.35 0.295 e 0.65 0.0256 E 16.00 0.630 E1 14.00 0.551 E3 12.35 0.486 L 0.45 L1 0.60 0.75 0.018 1.00 K OUTLINE AND MECHANICAL DATA MAX. 0.024 0.030 TQFP80 (14x14x1.40mm) 0.0393 3.5°(min.), 7°(max.) D A D1 A2 D3 A1 41 60 40 61 0.10mm .004 Seating Plane e E3 E1 E B Gage plane PIN 1 IDENTIFICATION 0.25mm 21 80 1 20 K TQFP80L C L L1 57/59 TDA7513T Table 29. Revision History 58/59 Date Revision June 2004 1 Description of Changes First Issue TDA7513T Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com 59/59