TDA8143 HORIZONTAL DEFLECTION POWER DRIVER . . . .. . .. . CONTROLLED DRIVING OF THE POWER TRANSISTOR DURING TURN ON AND OFF PHASE FOR MINIMUM POWER DISSIPATION AND HIGH RELIABILITY HIGH SOURCE AND SINK CURRENT CAPABILITY DISCHARGE CURRENT DERIVED FROM PEAK CHARGE CURRENT CONTROLLED DISCHARGE TIMING DISABLE FUNCTION FOR SUPPLY UNDER VOLTAGE AND NONSYNCHRONOUS OPERATION PROTECTION FUNCTION WITH HYSTERESIS FOR OVERTEMPERATURE OUTPUT DIODE CLAMPING LIMITING OF THE COLLECTOR PEAK CURRENT OF THE DEFLECTION POWER TRANSISTOR DURING TURN ON PERIOD SPECIAL REMOTE FUNCTION WITH DELAY TIME TO SWITCH THE OUTPUT ON SIP9 (Plastic Package) ORDER CODE : TDA8143 DESCRIPTION The TDA8143 is a monolithic integrated circuit designed to drive the horizontal deflection power tran-sistor. The current source characteristic of this device is adapted to the non-linear current gain behaviour of the power transistor providing a minimum power dissipation. The TDA8143 is internally protected against short circuits and thermal overload. PIN CONNECTIONS September 1993 PROTECTION AND REMOTE STANDBY INPUT CONTROL INPUT SPECIAL REMOTE STANDBY CT GROUND SENSE-IN VCC+ OUTPUT GROUND 8143-01.EPS 9 8 7 6 5 4 3 2 1 1/9 TDA8143 Pin 1 2 3 4 5 6 Name Power Ground Ouptut VCC Sense Input Sense GND CEXT 7 Special Remote/Standby 8 9 Control Input Protection and Remote Standby Input Function Common Ground Device Output Supply Voltage Input voltage that determines output current. Reference Ground for Input Voltage at SENSE INPUT. Capacitor between this terminal and SENSE GROUND determines the current slope dIO/dt during OFF phase. Low level at this input sets the device after a delay time tdr in the standby mode independent from CONTROL INPUT (2nd priority). High level at this input switches the BU508 off, low level switches the BU508 on. A high level at this input switches the BU508 off independent from all other inputs (1st priority). 8143-01.TBL PIN FUNCTIONS BLOCK DIAGRAM VC C + VH 100kΩ PROTECTION AND REMOTE STANBY INPUT 9 TDA8143 3 SYNC. DET. IB 1 THERMAL VS PROTECTION 27Ω 10µH BU508 2 OUT SPECIAL 4 REMOTE 7 STANDBY I B2 220µF SENSE IN 4.7Ω RS VC & 0.15Ω 8 22nF CONTROL IN 5 GND 8143-02.EPS 1 6 C 1nF Parameter DC Supply Voltage Output Current Power Dissipation Storage and Junction Temperature Operating Temperature Value 18 Internally Limited Internally Limited – 40, + 150 0, + 70 Unit V °C °C 8143-02.TBL Symbol VCC Id Ptot Tstg, Tj Toper Value 70 10 Unit °C/W °C/W 8143-03.TBL ABSOLUTE MAXIMUM RATINGS THERMAL DATA Symbol Rth (j–a) Rth (j–c) 2/9 Parameter Thermal Resistance Junction-ambient Thermal Resistance Junction–case Max. Max. TDA8143 ELECTRICAL CHARACTERISTICS (VCC = 12 V, Tamb = 25oC unless otherwise specified) Symbol Parameter Test Conditions Min. Supply Voltage VCC Typ. Max. 7 IQ Quiescent Current All Inputs Open 10 15 Ip0 Positive Output Current (source) In0 Negative Output Current (sink) Io0 Positive quiescent output current forcing the output to 6 V and the sense input to ground output externally forced to 6 V. Remote Input1 Remote Input0 120 50 150 80 Unit 18 V 25 mA 1.5 A 2 A 200 100 mA mA Transconductance ON Phase (1) See Figure 1 1.8 2.0 2.2 A/V Transconductance OFF Phase (2) See Figure 1 1.8 2.0 2.2 A/V GREMOTE Transconductance Standby Mode Remote Input0 0.675 0.75 0.825 A/V Current Source Pin 6 V7 = 500 mV 135 165 200 µA RINS Sense Input Resistance VS > 0 VS < 0 0.7 0.35 1 0.5 1.3 0.7 kΩ kΩ IINS Sense Input Bias Current VS = 0 Remote Input = 1 – 200 – 300 – 400 µA RSYN Synchronous Detection Input Resistance VSYN < 7 V VSYN > 7 V 30 7 60 10 150 15 kΩ kΩ VTHS Threshold Voltage of the Synchronous Detection Input 1 1.8 2.8 V VSYN SYNC DETECT Input Voltage 30 V VTHA Threshold Voltage of Control Input I5 Pull up Current of Control Input IINA 1.5 2 2.5 V 0 < VIN < VTHA VIN > VTHA + 0.5 V – 50 –1 – 100 0 – 160 +1 µA µA 1.5 2 2.5 V 0 < VIN < VTHB VIN > VTHB + 0.5 V – 50 –1 – 100 0 – 160 +1 µA µA 190 250 300 µs 3 4.5 µs 2.8 3 V Threshold Voltage Remote Input VTHB IINB Pull-up Current of the Remote Input tdr Remote Delay Time (3) tdon On Delay Time VCC–VOUT Output Voltage Drop for Ip0 = 1 A VCC ON Supply Voltage for Device "ON" 5.8 6.4 7.0 V VCC OFF Supply Voltage for Device "OFF" (output internally switched to ground) 5.6 VCC ON – 0.2 V 6.8 V Sense Limit Voltage (4) 0.8 0.9 1 V VS limit Notes : 1. 2. 3. 4. 2 I0 ≥ 0 8143-04.TBL GON GOFF GON is measured with V4 varying from 150mV to 350mV (Pin 6 is grounded) GOFF is measured with V6 varying from 150mV to 350mV (Pin 4 is grounded) When the remote input goes from HIGH to LOW the BU508 is switched off and it remains in this condition for the time tdr. The sense input voltage VS is internally limited and results in a limited positive output current Ip0 = g. VS limit. Note that due to the storage time tS of the BU508 limiting of VS leads to a reduced base current of the BU508 and the output current I0 is going to the positive quiescent current Io0. TRUTH TABLE Floating or 1 Floating or 1 I0 > 0 I0 < 0 (5) BU508 ON BU508 OFF X 0 I0 < 0 (5) 0 < t < tdr BU508 OFF X 0 I0 > 0 t > tdr BU508 ON 0 Floating or 1 Note : Output I0 Remote/Standby Mode Normal Function Remote/Standby Function 8143-05.TBL Logics Inputs Control Input 5. IO < 0 means that the sink current flows into the output to ground. 3/9 TDA8143 Figure 1 : GON |GOFF| and VPin5 VPin3 G ON (A/V) or G OFF (A/V) 2.2 2.1 2.0 1.9 V Pin3 (mV) or V Pin5 (mV) 1.7 0 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 8143-03.EPS 1.8 Figure 2 : Large Screen Application Rf +12V Ca STANDBY D1 3 9 OUT RO 8 BU508 2 LO CO 4 TDA8143 Rb R S Cb 5 6 8143-04.EPS 1 CS 4/9 CRT 22"/26" 100° 14"/20" 90° CRT 22"/26" 100° 14"/20" 90° Ca Ro Co Lo 47 µF 27 Ω 2W 220 µF 10 µH 47 µF 27 Ω 1 W 220 µF 10 µH Rb Cb Rs Cs 4.7 Ω 47 nF 0.15 Ω 1 nF 4.7 Ω 47 nF 0.1 Ω 1 nF 8143-06.TBL COMPONENTS LIST FOR TYPICAL APPLICATION TDA8143 system. The new approach, using the TDA8143, overcomes these restrictions by means of a feedback principle. As shown in Figure 4, at each instant of time the ideal base current of the power transistor results from its collector current divided by such current gain which ensure the saturation ; thus the required base current Ib can be easily generated by a feedback transconductance amplifier gm which senses the deflection current across the resistor Rs at the emitter of the power transistor and delivers : Ib = RS • gm • Ie The transconductance must only fulfill the condition : 1 1 1 ⋅ < gm < 1 + βmin RS RS where β is the minimum current gain of the transitor. This method always ensures the correct base current and acts time independent on principle. For the turn-OFF, the base of the power transistor must be discharged by a quasi linear time decreasing current as given in Figure 5. Conventional driver systems inherently result into a stable condition with a constant peak current magnitude. APPLICATION INFORMATION The conventional deflection system is shown in Figure 3. The driving circuit consists of a bipolar power transistor driven by a transformer and a medium power element plus some passive components. During the active deflection phase the collector current of the power transistor is linearly rising and the driving circuitry must be adapted to the required base current in order to ensure the power transistor saturation. According to the limited components number the typical approach of the present TVs provides only a rough approximation of this objective ; in Figure 4 we give a comparison between the typical real base current and the ideal base current waveform and the collector waveform. The marked area represents a useless base current which gives an additional power dissipation on the power transistor. Furthermore during the turn-ON and turn-OFF transient phase of the chassis the power transistor is extremely stressed when the convenctional network cannot guarantee the saturation ; for this reason, generally, the driving circuit must be carefully designed and is different for each deflection Figure 3 : Conventional Horizontal Deflection System for TVs VCC + DRIVING CIRCUIT IC IB ID HORIZONTAL TRANSFORMER YOKE DEFLECTION CIRCUIT 8143-05.EPS V IN 5/9 TDA8143 Figure 4 : IC Waveforms of Collector and Base Current Off Phase On Phase Off Phase Real Base Current Ideal Base Current t I BIAS Base Bias Current IC 8143-06.EPS t tS ID This is due to the constant base charge in the turn-ON phase independent from the collector current ; hence a high peak current results into a low storage time of the transistor because the excess base charge is a minimum and vice versa. In the active deflection the required function, high peak current-fast switch-OFF and low peak current-slow switch-OFF, is obtained by a controlled base discharge current for the power transistor ; the negative slope of this ramp is proportional to the actual sensed current. As a result, the active driving system even improves the sharpness of vertical lines on the screen compared with the traditional solution due to the increased stability factor of the loop represented as the variation of the storage time versus the collector peak current. Figure 5 I0 dI 0 dt t don = IS0 tS Ip0 I0 IS0 ON PHASE OFF PHASE t In0 t CIRCUIT DESCRIPTION Figure 6 shows the block diagram of the TDA8143, the circuit consists of an input transconductance amplifier composed by Q1, Q2, Q3 and Q4. The symmetrical output current is fed into the load resistor R1 and R2 ; the two amplifiers V1 and V2 realize a floating voltage to current converter which can drive 1.2A sink current and 2A source current for a wide common output range. So, the overall transconductance results into : R1 + R2 1 ⋅ gm = R5 R3 A current source I1 generates a drop of 70mV across the resistor R4 which provides an output bias current of 140mA ; the control input determines the turn ON/OFF function. In the ON phase, Q5 shorts the external capacitor 6/9 Ct. Within the input voltage range 0 < Vin < 750mV the element realizes the transconductance function ; lower voltages are clamped by the D1/Q6 configuration. For input voltages higher than 750mV, Q7 limits the maximum output current at 1.5A peak. In the turn-OFF mode, Ct will be charged by the controlled source I2 which is proportional to the input voltage, by this way, the output current decreases quasi linearly and the system stability is reached. During the flyback phase, the IC is enabled via the sync. detector input ; this function with the limited sink and source current together with the undervoltage turn-OFF and a chip temperature sensor ensure a complete protection of the IC. 8143-07.EPS tS CONTROL INPUT TDA8143 Figure 6 : Block Diagram of the Integrated Horizontal Driver V CC+ 3 PROTECTION AND REMOTE STANDBY INPUT 9 VOLTAGE CONTROL VC < 7V Q9 V1 Q10 & R5 OVERTEMP. PROTECTION Tj < 150˚C V2 R1 R2 INPUT TRANSCONDUCTANCE AMPLIFIER Q11 IB 2 OUTPUT Q3 I2 I1 Q4 Q6 Q2 D2 Q1 4 R4 8 & Q5 R6 VREF = 750mV SPECIAL REMOTE STANDBY SENSE INPUT V IN Q8 7 6 C EXT CT In Figure 7 is shown the application diagram of the TDA8143, the few external component and the automatic handling possibility ensures a lower application cost versus the conventional approach shown in Figure 3. In Figure 8 is shown the currents and voltage waveforms of the driver circuit of Figure 7 as to be seen, the driving charge Ib ⋅ ton has been reduced at minimum. 1 5 POWER GROUND 8143-08.EPS CONTROL INPUT Q7 D1 R3 SENSE GROUND The power dissipation on this application condition is about 1.3W. The presence of thermal shut-down circuit means that the heatsink can have a smaller factor of safety compared with that of a conventional circuit. If for any reason, the junction temperature increases up to 150oC, the thermal shut-down simply switches off the device. 7/9 TDA8143 Figure 7 : Integrated Horizontal Driver HORIZONTAL TRANSFORMER R V CC + 100µF IC 3 ID YOKE 220µF 9 TDA8143 IB 2 2W DEFLECTION CIRCUIT 4 27Ω 6 Vi 8 4.7Ω 5 1 47nF 0.15Ω 8143-09.EPS 1nF DRIVING CIRCUIT 8/9 8143-11.TIF 8143-10.TIF Figure 8 : Signal Diagrams of the Driver Circuits TDA8143 PACKAGE MECHANICAL DATA 9 PINS - PLASTIC SIP C L3 D L1 c2 d1 N 1 9 L a1 L2 A M b1 e3 e c1 PM-SIP9.EPS b3 B A a1 B b1 b3 C c1 c2 D d1 e e3 L L1 L2 L3 M N Min. Millimeters Typ. 2.7 Max. 7.1 3 24.8 Min. 0.106 0.5 0.85 Inches Typ. Max. 0.280 0.118 0.976 0.020 1.6 0.033 3.3 0.43 1.32 0.063 0.130 0.017 0.052 21.2 0.835 14.5 2.54 20.32 0.571 0.100 0.800 3.1 0.122 3 17.6 0.118 0.693 0.25 3.2 1 0.010 0.126 0.039 SIP9.TBL Dimensions Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. 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