KS51840 DESCRIPTION KS51840, a 4-bit single-chip CMOS microcontroller, consists of the reliable SMCS-51 CPU core with on-chip ROM and RAM. Eight input pins and 11 output pins provide the flexibility for various I/O requirements. Auto reset circuit generates reset pulse every certain period, and every halt mode termination time. The KS51840 microcontroller has been designed for use in small system control applications that require a low-power, cost-sensitive design solution. In addition, the KS51840 has been optimized for remote control transmitter. FEATURES ROM Size 1,024 bytes RAM Size 32 nibbles Instruction Set 39 instructions Instruction Cycle Time 13.2 µsec at Fxx=455 kHz Input Ports Two 4-bit ports(24 pins)/One 4-bit port, one 2-bit ports(20 pins) Output Ports One 4-bitport,Seven1-bitports(24pins)/One 4-bit port, Five1-bit ports(20pins) Built-in Oscillator Crystal/Ceramic resonator Built-in Power-on reset and auto reset circuit for generating reset pulse every 131072/Fxx(288ms at Fxx=455kHz) Four Transmission Frequencies Fxx/12 (1/4 duty), Fxx/12 (1/3 duty), Fxx/8 (1/2 duty), and no-carrier frequency Supply Voltage 1.8V–3.6V(Fosc:250kHz–3.9MHz),2.2V–3.6V(Fosc:4MHz–6MHz) Power Consumption Halt mode: 1 µA (maximum) Normal mode: 0.5 mA (typical) Operating temperature -20°C to 85°C Package Type 24 SOP, 20 DIP, 20 SOP Oscillator Frequency divide select Mask Option= Fosc or Fosc/8 BLOCK DIAGRAM P2.1 - P2.6 Internal P2.13 6 P2-output Latch ROM 8 5 64x16x8 bits RAM 16 16x2x4bits 4 4 6 PA PC L Decoder 2 4 1 H 4 L ALU & A 4 PB 3-Level Stack 4 4 4 P1.0 - P1.3 4 P0.0 - P0.3 4 P3.0 - P3.3 MUX 4 SF Internal P2.9 and P2.10 4 P3 Output Register ( PR ) Internal P2.0 Fxx/8 (1/2) Fxx/12 (1/3) Fxx/12 (1/4) DIV OSC HALT No carrier P2.0/REM S MSU MSUN NG ELECTRONICS Auto Reset Internal P2.12 XI XO 1–1 KS51840 PIN CONFIGURATION (24 SOP) VSS 1 24 VDD XI 2 23 P2.0/REM XO 3 22 TEST P2.6 4 21 P2.1 P0.0 5 20 P2.2 P0.1 6 19 P2.3 P0.2 7 (Top View) 18 P2.4 P0.3 8 17 P2.5 P1.0 9 16 P3.0 P1.1 10 15 P3.1 P1.2 11 14 P3.2 P1.3 12 13 P3.3 KS51840 PIN DESCRIPTION FOR 24 PINS I/O Circuit Type Symbols Pin No. Type Functions P0.0 - P0.3 5, 6, 7, 8 Input 4-bit input port when P2.13 is low A P1.0 - P1.3 9,10,11,12 Input 4-bit input port when P2.13 is high A P2.0/REM 23 Output 1-bit individual output for remote carrier frequency (1) B P2.2 - P2.5 20,19,18, 17 Output 1-bit individual output port P2.1, P2.6 C 21,4 P3.0 - P3.3 16,15,14,13 D Output 4-bit parallel output port C TEST 22 Input Input pin for test (Normally connected to VSS) — XI 2 Input Oscillation clock input — XO 3 Output Oscillation clock output — VDD 24 — Power supply — VSS 1 — Ground — NOTES: 1.The carrier can be selected by software as Fxx/12 (1/3 duty), Fxx/12 (1/4 duty), Fxx/8 (1/2 duty), or no-carrier frequency. 2.Package type can be selected as 24 SOP in the ordering sheet. 1–2 S MSUN G ELECTRONICS KS51840 PIN CONFIGURATION (20 DIP, 20 SOP) VSS 1 20 VDD XI 2 19 P2.0/REM XO 3 18 TEST P0.0 4 17 P2.1 P0.1 5 16 6 KS51840 (Top View) 15 P2.2 P0.2 P0.3 7 14 P2.4 P1.0 8 13 P3.0 P1.1 9 12 P3.1 P3.3 10 11 P3.2 P2.3 PIN DESCRIPTION FOR 20 PINS I/O Circuit Type Symbols Pin No. Type Functions P0.0 - P0.3 4, 5, 6, 7 Input 4-bit input port when P2.13 is low A P1.0 - P1.1 8, 9 Input 2-bit input port when P2.13 is high A P2.0/REM 19 Output 1-bit individual output for remote carrier frequency P2.2 - P2.4 16,15, 14 Output 1-bit individual output port P2.1 B C D 17 P3.0 - P3.3 13,12,11,10 (1) Output 4-bit parallel output port C TEST 18 Input Input pin for test (Normally connected to VSS) — XI 2 Input Oscillation clock input — XO 3 Output Oscillation clock output — VDD 20 — Power supply — VSS 1 — Ground — NOTES: 1.The carrier can be selected by software as Fxx/12 (1/3 duty), Fxx/12 (1/4 duty), Fxx/8 (1/2 duty), or no-carrier frequency. 2.Package type can be selected as 20 DIP, or 20 SOP in the ordering sheet. S MSU MSUN NG ELECTRONICS 1–3