Freescale Semiconductor Technical Data Document Number: MD7IC2050N Rev. 0, 8/2009 RF LDMOS Wideband Integrated Power Amplifiers The MD7IC2050N wideband integrated circuit is designed with on - chip matching that makes it usable from 1750 - 2050 MHz. This multi - stage structure is rated for 26 to 32 Volt operation and covers all typical cellular base station modulation formats. • Typical Doherty Single - Carrier W - CDMA Performance: VDD = 28 Volts, IDQ1A = IDQ1B = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 Watts Avg., Channel Bandwidth = 3.84 MHz, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. Frequency Gps (dB) PAE (%) Output PAR (dB) ACPR (dBc) 2025 MHz 30.5 34.7 8.7 - 37.4 • Capable of Handling 5:1 VSWR, @ 32 Vdc, 2017.5 MHz, 79 Watts CW Output Power (3 dB Input Overdrive from Rated Pout) • Stable into a 5:1 VSWR. All Spurs Below - 60 dBc @ 20 Watts to 80 Watts CW Pout • Typical Pout @ 3 dB Compression Point ] 74 Watts CW MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 1880 - 2100 MHz, 10 W AVG., 28 V SINGLE W - CDMA RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIERS CASE 1618 - 02 TO - 270 WB - 14 PLASTIC MD7IC2050NR1 1880 MHz • Typical Doherty Single - Carrier W - CDMA Performance: VDD = 28 Volts, IDQ1A = IDQ1B = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 Watts Avg., Channel Bandwidth = 3.84 MHz, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. Frequency Gps (dB) PAE (%) Output PAR (dB) ACPR (dBc) 1880 MHz 30.3 35.2 8.6 - 34.9 1900 MHz 30.2 34.9 8.6 - 36.3 1920 MHz 30.1 34.8 8.7 - 36.9 Features • 100% PAR Tested for Guaranteed Output Power Capability • Production Tested in a Symmetrical Doherty Configuration • Characterized with Series Equivalent Large - Signal Impedance Parameters and Common Source S - Parameters • On - Chip Matching (50 Ohm Input, DC Blocked) • Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (1) • Integrated ESD Protection • 225°C Capable Plastic Package • RoHS Compliant • In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel CASE 1621 - 02 TO - 270 WB - 14 GULL PLASTIC MD7IC2050GNR1 CASE 1617 - 02 TO - 272 WB - 14 PLASTIC MD7IC2050NBR1 1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1977 or AN1987. © Freescale Semiconductor, Inc., 2009. All rights reserved. RF Device Data Freescale Semiconductor MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 1 VDS1A CARRIER (2) RFinA RFout1/VDS2A VGS1A Quiescent Current Temperature Compensation (1) VGS2A VGS1B Quiescent Current Temperature Compensation (1) VGS2B PEAKING (2) RFinB VDS1A VGS2A VGS1A RFinA NC NC NC NC RFinB VGS1B VGS2B VDS1B 1 2 3 4 5 6 7 8 9 10 11 12 14 13 RFout1/VDS2A RFout2/VDS2B (Top View) RFout2/VDS2B Note: Exposed backside of the package is the source terminal for the transistors. VDS1B Figure 1. Functional Block Diagram Figure 2. Pin Connections 1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1977 or AN1987. 2. Peaking and Carrier orientation is determined by the test fixture design. Table 1. Maximum Ratings Symbol Value Unit Drain - Source Voltage Rating VDSS - 0.5, +65 Vdc Gate - Source Voltage VGS - 0.5, +10 Vdc Operating Voltage VDD 32, +0 Vdc Storage Temperature Range Tstg - 65 to +150 °C TC 150 °C Case Operating Temperature Operating Junction Temperature (1,2) Input Power TJ 225 °C Pin 28 dBm Symbol Value (2,3) Unit Table 2. Thermal Characteristics Characteristic Final Doherty Application Thermal Resistance, Junction to Case Case Temperature 81°C, Pout = 50 W CW Stage 1A, 28 Vdc, IDQ1A = 30 mA Stage 1B, 28 Vdc, IDQ1B = 30 mA Stage 2A, 28 Vdc, IDQ2A = 230 mA Stage 2B, 28 Vdc, VG2B = 1.4 Vdc Case Temperature 73°C, Pout = 10 W CW Stage 1A, 28 Vdc, IDQ1A = 30 mA Stage 1B, 28 Vdc, IDQ1B = 30 mA Stage 2A, 28 Vdc, IDQ2A = 230 mA *Stage 2B, 28 Vdc, VG2B = 1.4 Vdc RθJC °C/W 8.2 6.1 1.8 1.4 8.3 3.6 1.9 *Stage 2B is turned off 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1955. MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 2 RF Device Data Freescale Semiconductor Table 3. ESD Protection Characteristics Test Methodology Class Human Body Model (per JESD22 - A114) 1B (Minimum) Machine Model (per EIA/JESD22 - A115) A (Minimum) Charge Device Model (per JESD22 - C101) II (Minimum) Table 4. Moisture Sensitivity Level Test Methodology Per JESD22 - A113, IPC/JEDEC J - STD - 020 Rating Package Peak Temperature Unit 3 260 °C Table 5. Electrical Characteristics (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 μAdc Zero Gate Voltage Drain Leakage Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate - Source Leakage Current (VGS = 1.5 Vdc, VDS = 0 Vdc) IGSS — — 1 μAdc Gate Threshold Voltage (VDS = 10 Vdc, ID = 23 μAdc) VGS(th) 1.2 1.9 2.7 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ1A = IDQ1B = 30 mAdc) VGS(Q) — 3 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ1A = IDQ1B = 30 mAdc, Measured in Functional Test) VGG(Q) 4.1 5.5 7.1 Vdc Zero Gate Voltage Drain Leakage Current (VDS = 65 Vdc, VGS = 0 Vdc) IDSS — — 10 μAdc Zero Gate Voltage Drain Leakage Current (VDS = 28 Vdc, VGS = 0 Vdc) IDSS — — 1 μAdc Gate - Source Leakage Current (VGS = 1.5 Vdc, VDS = 0 Vdc) IGSS — — 1 μAdc Gate Threshold Voltage (VDS = 10 Vdc, ID = 150 μAdc) VGS(th) 1.2 2 2.7 Vdc Gate Quiescent Voltage (VDS = 28 Vdc, IDQ2A = 230 mAdc) VGS(Q) — 3 — Vdc Fixture Gate Quiescent Voltage (VDD = 28 Vdc, IDQ2A = 230 mAdc, Measured in Functional Test) VGG(Q) 4.1 5.5 7.1 Vdc Drain - Source On - Voltage (VGS = 10 Vdc, ID = 1 Adc) VDS(on) 0.1 0.3 1.2 Vdc Stage 1 - Off Characteristics (1) Stage 1 - On Characteristics (1) Stage 2 - Off Characteristics (1) Stage 2 - On Characteristics (1) Functional Tests (2,3,4) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = IDQ1B = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 W Avg., f = 2025 MHz, Single - Carrier W - CDMA, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Power Gain Gps 28.5 30.5 33.0 Power Added Efficiency PAE 32.0 34.7 — % Output Peak - to - Average Ratio @ 0.01% Probability on CCDF PAR 8.0 8.7 — dB ACPR — - 37.4 - 34.0 dBc Adjacent Channel Power Ratio 1. 2. 3. 4. dB Each side of device measured separately. Part internally matched both on input and output. Measurement made with device in a Symmetrical Doherty configuration. Measurement made with device in straight lead configuration before any lead forming operation is applied. (continued) MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 3 Table 5. Electrical Characteristics (TA = 25°C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit (1) Typical Performances (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = IDQ1B = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, 2010 - 2025 MHz Bandwidth Pout @ 1 dB Compression Point, CW P1dB — 60 — W Pout @ 3 dB Compression Point, CW P3dB — 74 — W — 55 — IMD Symmetry @ 30 W PEP, Pout where IMD Third Order Intermodulation ` 30 dBc (Delta IMD Third Order Intermodulation between Upper and Lower Sidebands > 2 dB) IMDsym VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) VBWres — 70 — MHz Quiescent Current Accuracy over Temperature with 4.7 kΩ Gate Feed Resistors ( - 30 to 85°C) (2) ΔIQT — 2.64 — % Gain Flatness in 15 MHz Bandwidth @ Pout = 10 W Avg. GF — 0.1 — dB Gain Variation over Temperature ( - 30°C to +85°C) ΔG — 0.033 — dB/°C ΔP1dB — 0.008 — dBm/°C Output Power Variation over Temperature ( - 30°C to +85°C) MHz Typical W - CDMA Broadband Performance — 1880 MHz (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A = IDQ1B = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 W Avg., Single - Carrier W - CDMA, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Frequency Gps (dB) PAE (%) Output PAR (dB) ACPR (dBc) IRL (dB) 1880 MHz 30.3 35.2 8.6 - 34.9 - 21 1900 MHz 30.2 34.9 8.6 - 36.3 - 21 1920 MHz 30.1 34.8 8.7 - 36.9 - 22 1. Measurement made with device in a Symmetrical Doherty configuration. 2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf.Select Documentation/Application Notes - AN1977 or AN1987. MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 4 RF Device Data Freescale Semiconductor VGS1A VGS2A VDS1A VDS2A C7 C1 C9 R2 C15 R1 C3 C11 C17 C18 CUT OUT AREA COUPLER 1 R5 C P C13 C14 C20 C19 C12 C4 C5 R3 C10 R4 C16 MD7IC2050N Rev. 1 C8 C2 VGS1B VGS2B C21 C6 VDS2B VDS1B Figure 3. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Layout Table 6. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C2, C3, C4, C5, C6 10 μF, 50 V Chip Capacitors GRM55DR61H106KA88L Murata C7, C8 4.7 pF Chip Capacitors ATC600F4R7BT250XT ATC C9, C10 5.6 pF Chip Capacitors ATC600F5R6BT250XT ATC C11, C12, C13, C14 39 pF Chip Capacitors ATC600F390JT250XT ATC C15, C16, C17, C18, C19, C20 4.7 μF, 50 V Chip Capacitors GRM31CR71H475KA12L Murata C21 1.0 pF Chip Capacitor ATC600F1R0BT250XT ATC R1, R2, R3, R4 4.7 kΩ, 1/4 W Chip Resistors CRCW12064701KEA Vishay R5 50 Ω, 1/4 W Thick Film Chip Resistor RK73B2BTTD510J KOA Speer Coupler 1 1.8 - 2.0 GHz Hybrid 3 dB Coupler GSC351 - HYB1900 Soshin PCB 0.020″, εr = 3.5 RF - 35 Taconic MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 5 Single−ended l 4 l 4 l 2 Quadrature combined l 4 Doherty l 2 Push−pull Figure 4. Possible Circuit Topologies MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 6 RF Device Data Freescale Semiconductor Gps, POWER GAIN (dB) 30.6 30.1 33 VDD = 28 Vdc, Pout = 10 W (Avg.) IDQ1A = IDQ1B = 30 mA, IDQ2A = 230 mA 32 VG2B = 1.4 Vdc, Single−Carrier W−CDMA 31 3.84 MHz Channel Bandwidth −29 IRL Input Signal PAR = 9.9 dB @ −31 0.01% Probability on CCDF −33 30 −35 30.5 30.4 Gps 30.3 30.2 29.9 −37 PARC 29.8 1880 ACPR 1900 1920 1940 1960 1980 2000 2020 −18 −19 −20 −21 −22 −39 2040 −23 −0.4 −0.8 −1.2 −1.6 PARC (dB) 34 IRL, INPUT RETURN LOSS (dB) 35 PAE 30.7 ACPR (dBc) 30.8 PAE, POWER ADDED EFFICIENCY (%) TYPICAL CHARACTERISTICS −2 −2.4 f, FREQUENCY (MHz) IMD, INTERMODULATION DISTORTION (dBc) Figure 5. Output Peak - to - Average Ratio Compression (PARC) Broadband Performance @ Pout = 10 Watts Avg. −10 VDD = 28 Vdc, Pout = 30 W (PEP), IDQ1A = IDQ1B = 30 mA IDQ2A = 230 mA, VG2B = 1.4 Vdc, Two−Tone Measurements (f1 + f2)/2 = Center Frequency of 2017.5 MHz −20 IM3−U −30 IM3−L IM5−U IM5−L −40 IM7−L IM7−U −50 10 1 100 TWO−TONE SPACING (MHz) Figure 6. Intermodulation Distortion Products versus Two - Tone Spacing 29.5 29 28.5 28 43 0 −1 dB = 10.41 W −1 38 −2 dB = 13.56 W −2 PAE ACPR −3 VDD = 28 Vdc IDQ1A = IDQ1B = 30 mA 33 IDQ2A = 230 mA VG2B = 1.4 Vdc 28 f = 2017.5 MHz −3 dB = 17.24 W −4 Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF −5 3 6 9 −30 48 Gps 12 15 18 21 23 PARC 24 18 −32 −34 −36 ACPR (dBc) 30 OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (dB) Gps, POWER GAIN (dB) 30.5 1 PAE, POWER ADDED EFFICIENCY (%) 31 −38 −40 −42 27 Pout, OUTPUT POWER (WATTS) Figure 7. Output Peak - to - Average Ratio Compression (PARC) versus Output Power MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 7 TYPICAL CHARACTERISTICS 100 Gps, POWER GAIN (dB) 30 ACPR 2025 MHz 2017.5 MHz 80 VDD = 28 Vdc, IDQ1A = IDQ1B = 30 mA IDQ2A = 230 mA, VG2B = 1.4 Vdc, Single−Carrier W−CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 2025 MHz 29.5 29 28.5 28 27.5 70 60 PAE 2017.5 MHz 10 2017.5 MHz 2025 MHz 26 1 30 20 2010 MHz 26.5 50 40 Gps 2010 MHz 27 90 −20 PAE, POWER ADDED EFFICIENCY (%) f = 2010 MHz 30.5 0 100 10 −22.5 −25 −27.5 −30 −32.5 −35 ACPR (dBc) 31 −37.5 −40 −42.5 −45 Pout, OUTPUT POWER (WATTS) AVG. Figure 8. Single - Carrier W - CDMA Power Gain, Power Added Efficiency and ACPR versus Output Power GAIN (dB) Gain 30 −14 25 −21 20 −28 IRL 15 −35 VDD = 28 Vdc Pin = 0 dBm IDQ1A = IDQ1B = 30 mA IDQ2A = 230 mA VG2B = 1.4 Vdc 10 5 1450 1650 1850 IRL (dB) −7 35 −42 2050 2250 −49 2450 f, FREQUENCY (MHz) Figure 9. Broadband Frequency Response W - CDMA TEST SIGNAL 100 10 0 −10 3.84 MHz Channel BW −20 1 Input Signal −30 0.1 (dB) PROBABILITY (%) 10 0.01 W−CDMA. ACPR Measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 0.001 0.0001 0 2 4 6 −40 −50 −60 +ACPR in 3.84 MHz Integrated BW −ACPR in 3.84 MHz Integrated BW −70 −80 8 10 PEAK−TO−AVERAGE (dB) Figure 10. CCDF W - CDMA IQ Magnitude Clipping, Single - Carrier Test Signal 12 −90 −100 −9 −7.2 −5.4 −3.6 −1.8 0 1.8 3.6 5.4 7.2 9 f, FREQUENCY (MHz) Figure 11. Single - Carrier W - CDMA Spectrum MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 8 RF Device Data Freescale Semiconductor VDD = 28 Vdc, IDQ1A = IDQB = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 W Avg. f MHz Zin W Zload W 1995 60.12 - j33.28 11.79 - j6.72 2000 59.30 - j32.57 11.78 - j6.78 2005 58.41 - j32.06 11.78 - j6.85 2010 57.41 - j31.31 11.78 - j6.92 2015 56.31 - j30.27 11.79 - j7.00 2020 55.94 - j29.62 11.81 - j7.08 2025 55.28 - j28.90 11.81 - j7.16 2030 54.75 - j28.12 11.84 - j7.24 2035 54.39 - j27.55 11.80 - j7.33 Note: Measured with Peaking side open. Zin = Device input impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Z Z in load Figure 12. Series Equivalent Input and Load Impedance — Carrier Side VDD = 28 Vdc, IDQ1A = IDQB = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 W Avg. f MHz Zin W Zload W 1995 60.12 - j33.28 1.86 - j11.38 2000 59.30 - j32.57 1.80 - j11.24 2005 58.41 - j32.06 1.71 - j11.12 2010 57.41 - j31.31 1.64 - j11.00 2015 56.31 - j30.27 1.58 - j10.91 2020 55.94 - j29.62 1.51 - j10.78 2025 55.28 - j28.90 1.45 - j10.66 2030 54.75 - j28.12 1.38 - j10.56 2035 54.39 - j27.55 1.33 - j10.40 Note: Measured with Carrier side open. Zin = Device input impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Z in Z load Figure 13. Series Equivalent Input and Load Impedance — Peaking Side MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 9 ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS VDD = 28 Vdc, IDQ1A = IDQB = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc 52 f = 2025 MHz Pout, OUTPUT POWER (dBm) 50 Ideal f = 2025 MHz 48 Actual 46 44 f = 2010 MHz 42 f = 2010 MHz f = 2025 MHz 40 38 f = 2010 MHz 36 34 32 30 0 2 4 6 8 10 12 14 16 18 20 Pin, INPUT POWER (dBm) Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V P1dB P3dB f (MHz) Watts dBm Watts dBm 2010 40 46 49 46.9 2025 38.9 45.9 47.9 46.8 Test Impedances per Compression Level f (MHz) Zsource Ω Zload Ω 2010 P1dB 73.6 + j31.1 6.8 - j13.7 2025 P1dB 68.9 + j26.7 8.3 - j14.3 Figure 14. CW Output Power versus Input Power @ 28 V NOTE: Measurement made on the Class AB, carrier side of the device. MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 10 RF Device Data Freescale Semiconductor VGS1A VGS2A VDS1A VDS2A C7 C1 C15 R2 C9 R1 C3 C11 C17 C4 C18 C13 CUT OUT AREA COUPLER 1 R5 C P C14 C20 C19 C12 C5 R3 C21 C6 C10 MD7IC2050N Rev. 1 R4 C8 C16 C2 VGS1B VGS2B VDS2B VDS1B Figure 15. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Layout — 1880 MHz Table 7. MD7IC2050NR1(GNR1)(NBR1) Test Circuit Component Designations and Values — 1880 MHz Part Description Part Number Manufacturer C1, C2, C3, C4, C5, C6 10 μF, 50 V Chip Capacitors GRM55DR61H106KA88L Murata C7, C8 6.8 pF Chip Capacitors ATC600F6R8BT250XT ATC C9, C10 15 pF Chip Capacitors ATC600F150JT250XT ATC C11, C12, C13, C14 33 pF Chip Capacitors ATC600F330JT250XT ATC C15, C16 6.8 μF, 50 V Chip Capacitors GRM32CF51H685ZA01L Murata C17, C18, C19, C20 2.2 μF, Chip Capacitors GRM31CR61H225KA88L Murata C21 0.9 pF Chip Capacitor ATC600F0R9BT250XT ATC R1, R2, R3, R4 4.7 kΩ, 1/4 W Chip Resistors CRCW12064701FKEA Vishay R5 50 Ω, 1/4 W Thick Film Chip Resistor RK73B2BTTD510J KOA Speer Coupler 1 1.8 - 2.0 GHz Hybrid 3 dB Coupler GSC351 - HYB1900 Soshin PCB 0.020″, εr = 3.5 RO4350B Rogers MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 11 34.75 3.84 MHz Channel Bandwidth, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF 30.3 30.25 30.2 Gps 30.15 30.1 IRL −34 −20.5 −34.6 −20.9 −35.2 ACPR 30.05 PARC 30 1880 34.5 −35.8 −36.4 1890 1900 1910 −21.3 −21.7 −22.1 −37 1920 −22.5 −1.2 −1.23 −1.26 −1.29 PARC (dB) PAE 30.35 ACPR (dBc) Gps, POWER GAIN (dB) 30.4 35.5 VDD = 28 Vdc, Pout = 10 W (Avg.), IDQ1A = IDQ1B = 30 mA 35.25 IDQ2A = 230 mA, VG2B = 1.4 Vdc, Single−Carrier W−CDMA 35 IRL, INPUT RETURN LOSS (dB) 30.5 30.45 PAE, POWER ADDED EFFICIENCY (%) TYPICAL CHARACTERISTICS −1.32 −1.35 f, FREQUENCY (MHz) Figure 16. Output Peak - to - Average Ratio Compression (PARC) Broadband Performance @ Pout = 10 Watts Avg. — 1880 MHz −16 35 −18 25 −20 IRL 20 VDD = 28 Vdc Pin = 0 dBm IDQ1A = IDQ1B = 30 mA IDQ2A = 230 mA VG2B = 1.4 Vdc 15 10 5 1450 −22 1650 1850 2050 IRL (dB) GAIN (dB) Gain 30 −24 −26 2250 −28 2450 f, FREQUENCY (MHz) Figure 17. Broadband Frequency Response — 1880 MHz MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 12 RF Device Data Freescale Semiconductor VDD = 28 Vdc, IDQ1A = IDQB = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 W Avg. VDD = 28 Vdc, IDQ1A = IDQB = 30 mA, IDQ2A = 230 mA, VG2B = 1.4 Vdc, Pout = 10 W Avg. f MHz Zin W Zload W f MHz Zin W Zload W 1725 24.58 + j28.09 13.68 - j7.83 1725 24.58 + j28.09 4.10 - j18.22 1750 30.62 + j35.84 14.09 - j7.95 1750 30.62 + j35.84 3.61 - j17.55 1775 39.80 + j43.59 14.42 - j8.13 1775 39.80 + j43.59 3.09 - j16.79 1800 53.16 + j51.72 14.72 - j8.33 1800 53.16 + j51.72 2.61 - j16.00 1825 75.48 + j54.32 15.02 - j8.57 1825 75.48 + j54.32 2.31 - j15.22 1850 101.49 + j44.03 15.26 - j8.91 1850 101.49 + j44.03 1.99 - j14.46 1875 127.43 + j11.39 15.47 - j9.29 1875 127.43 + j11.39 1.71 - j13.71 1900 113.52 - j23.46 15.59 - j9.67 1900 113.52 - j23.46 1.47 - j12.96 1925 92.03 - j36.95 15.66 - j10.15 1925 92.03 - j36.95 1.27 - j12.19 1950 74.95 - j38.10 15.64 - j10.65 1950 74.95 - j38.10 1.15 - j11.44 1975 64.95 - j35.67 15.59 - j11.22 1975 64.95 - j35.67 1.04 - j10.70 2000 59.30 - j32.57 15.41 - j11.76 2000 59.30 - j32.57 1.00 - j9.97 2025 55.28 - j28.90 15.20 - j12.36 2025 55.28 - j28.90 0.98 - j9.28 2050 52.85 - j26.07 14.84 - j12.97 2050 52.85 - j26.07 1.05 - j8.57 2075 51.34 - j23.91 14.42 - j13.56 2075 51.34 - j23.91 1.16 - j7.91 Note: Measured with Peaking side open. Note: Measured with Carrier side open. Zin Device input impedance as measured from gate to ground. Zin Test circuit impedance as measured from drain to ground. Zload = = Zload = in Device input impedance as measured from gate to ground. Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Z = Z load Figure 18. Series Equivalent Input and Load Impedance — Carrier Side — 1880 MHz Output Matching Network Device Under Test Z in Z load Figure 19. Series Equivalent Input and Load Impedance — Peaking Side — 1880 MHz MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 13 PACKAGE DIMENSIONS MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 14 RF Device Data Freescale Semiconductor MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 15 MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 16 RF Device Data Freescale Semiconductor MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 17 MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 18 RF Device Data Freescale Semiconductor MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 19 MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 20 RF Device Data Freescale Semiconductor MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 21 MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 22 RF Device Data Freescale Semiconductor PRODUCT DOCUMENTATION, TOOLS AND SOFTWARE Refer to the following documents to aid your design process. Application Notes • AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages • AN1955: Thermal Measurement Methodology of RF Power Amplifiers • AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family • AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family • AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over - Molded Plastic Packages • AN3789: Clamping of High Power RF Transistors and RFICs in Over - Molded Plastic Packages Engineering Bulletins • EB212: Using Data Sheet Impedances for RF LDMOS Devices Software • Electromigration MTTF Calculator • .s2p File For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software & Tools tab on the part’s Product Summary page to download the respective tool. REVISION HISTORY The following table summarizes revisions to this document. Revision Date 0 Aug. 2009 Description • Initial Release of Data Sheet MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 RF Device Data Freescale Semiconductor 23 How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 1 - 800 - 521 - 6274 or +1 - 480 - 768 - 2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1 - 8 - 1, Shimo - Meguro, Meguro - ku, Tokyo 153 - 0064 Japan 0120 191014 or +81 3 5437 9125 [email protected] Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022 China +86 10 5879 8000 [email protected] For Literature Requests Only: Freescale Semiconductor Literature Distribution Center 1 - 800 - 441 - 2447 or +1 - 303 - 675 - 2140 Fax: +1 - 303 - 675 - 2150 [email protected] Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. All rights reserved. MD7IC2050NR1 MD7IC2050GNR1 MD7IC2050NBR1 Document Number: MD7IC2050N Rev. 0, 8/2009 24 RF Device Data Freescale Semiconductor