FUJITSU SEMICONDUCTOR DATA SHEET DS04-27239-1E ASSP For Power Supply Applications (General-Purpose DC/DC Converter) 3-ch DC/DC Converter IC MB39A112 ■ DESCRIPTION The MB39A112 is a 3-channel DC/DC converter IC using pulse width modulation (PWM) , and the MB39A112 is suitable for down-conversion. 3-channel is built in TSSOP-20P package. Each channel can be controlled and soft-start. The MB39A112 contains a constant voltage bias circuit for output block, capable of implementing an efficient high-frequency DC/DC converter. It is ideal for built-in power supply such as ADSL modems. ■ REATURES • Supports for down-conversion (CH1 to CH3) • Power supply voltage range : 7 V to 25 V • Error amplifier threshold voltage : 1.00 V ± 1% (CH1) : 1.23 V ± 1% (CH2, CH3) • Oscillation frequency range : 250 kHz to 2.6 MHz • Built-in soft-start circuit independent of loads • Built-in timer-latch short-circuit protection circuit • Built-in totem-pole type output for P-channel MOS FET devices • Built-in constant voltage (VCCO − 5 V) bias circuit for output block ■ PACKAGE 20-pin plastic TSSOP (FPT-20P-M06) MB39A112 ■ PIN ASSIGNMENT (TOP VIEW) CS1 : 1 20 : VCCO −INE1 : 2 19 : OUT1 FB1 : 3 18 : OUT2 VCC : 4 17 : OUT3 RT : 5 16 : VH CT : 6 15 : GNDO GND : 7 14 : CSCP FB2 : 8 13 : FB3 −INE2 : 9 12 : −INE3 CS2 : 10 11 : CS3 (FPT-20P-M06) 2 MB39A112 ■ PIN DESCRIPTION Pin No. Symbol I/O Descriptions 1 CS1 2 − INE1 I CH1 error amplifer inverted input terminal. 3 FB1 O CH1 error amplifer output terminal. 4 VCC Control circuit power supply terminal. 5 RT Triangular-wave oscillation frequency setting resistor connection terminal. 6 CT Triangular-wave oscillation frequency setting capacitor connection terminal. 7 GND Ground terminal. 8 FB2 O CH2 error amplifier output terminal. 9 − INE2 I CH2 error amplifier inverted input terminal. 10 CS2 CH2 soft-start setting capacitor connection terminal. 11 CS3 CH3 soft-start setting capacitor connection terminal. 12 − INE3 I CH3 error amplifier inverted input terminal. 13 FB3 O CH3 error amplifier output terminal. 14 CSCP Timer-latch short-circuit protection capacitor connection terminal. 15 GNDO Ground terminal. 16 VH O Power supply terminal for driving output circuit. (VH = VCCO − 5 V) . 17 OUT3 O CH3 external Pch MOS FET gate driving terminal. 18 OUT2 O CH2 external Pch MOS FET gate driving terminal. 19 OUT1 O CH1 external Pch MOS FET gate driving terminal. 20 VCCO Power supply terminal for driving output circuit. (Connect to same potential as VCC terminal). CH1 soft-start setting capacitor connection terminal. 3 MB39A112 ■ BLOCK DIAGRAM Threshold voltage 1.0 V ± 1% −INE1 2 CH1 VREF 10 µA − + + CS1 1 L priority Error Amp1 + 20 VCCO PWM Comp.1 Drive1 − 19 OUT1 Pch 1.0 V FB1 3 IO = 150 mA Threshold voltage 1.23 V ± 1% −INE2 9 CH2 VREF 10 µA − + + CS2 10 L priority Error Amp2 + PWM Comp.2 Drive2 − 18 OUT2 Pch 1.23 V FB2 8 IO = 150 mA Threshold voltage 1.23 V ± 1% −INE3 12 CH3 VREF 10 µA − + + CS3 11 L priority Error Amp3 + PWM Comp.3 Drive3 17 OUT3 Pch − 1.23 V FB3 13 IO = 150 mA H priority SCP Comp. VCCO − 5 V + + + − 16 VH Bias Voltage VH 2.7 V 15 GNDO SCP Error Amp Power Supply SCP Comp. Power Supply H: at SCP CSCP 14 4 VCC 2.5 V H: UVLO release 2.0 V ErrorAmp Reference 1.0 V/1.23 V bias 3.5 V OSC UVLO VREF VR GND 5 RT 4 6 CT 7 GND Power ON/OFF CTL MB39A112 ■ ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Symbol Vcc Rating Conditions Unit Min Max VCC, VCCO terminal 28 V Output current Io OUT1, OUT2, OUT3 terminal 20 mA Peak output current IOP Duty ≤ 5 % (t = 1/fosc × Duty) 400 mA Power dissipation PD Ta ≤ + 25 °C 1280* mW − 55 + 125 °C Storage temperature TSTG * : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) . WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Symbol Conditions Value Min Typ Max Unit Power supply voltage Vcc VCC, VCCO terminal 7 12 25 V Input voltage VIN − INE terminal 0 - Vcc − 1.8 V IO OUT1, OUT2, OUT3 terminal − 15 15 mA IVH VH terminal 0 30 mA Output current fosc 250 1200 2600 kHz Timing capacitor CT 22 100 1000 pF Timing resistor RT 4.7 10 22 kΩ VH terminal capacitor CVH VH terminal 0.1 1.0 µF Soft-start capacitor CS CS1, CS2, CS3 terminal 0.1 1.0 µF CSCP terminal 0.01 1.0 µF − 30 + 25 + 85 °C Oscillation frequency Short-circuit detection capacitor Operating ambient temperature CSCP Ta WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 5 MB39A112 ■ ELECTRICAL CHARACTERISTICS (VCC = VCCO = 12 V, Ta = + 25 °C) Parameter Undervoltage Threshold voltage Lockout Protection Circuit Block Hysteresis width [UVLO] SymPin No. bol Conditions VCC = Value Unit Min Typ Max 6.35 6.55 6.75 V VTH 4 VHYS 4 0.15 V Threshold voltage VTH 14 0.67 0.72 0.77 V Input source current ICSCP 14 − 1.4 − 1.0 − 0.6 µA Reset voltage VRST 4 6.2 6.4 6.6 V Triangular Wave Oscillator Block [OSC] Oscillation frequency fosc 17 to 19 1080 1200 1320 kHz Soft-start Block [CS1, CS2, CS3] Charge current ICS 1, 10, 11 − 14 − 10 −6 µA Threshold voltage VTH 2 FB1 = 2.25 V 0.99 1.00 1.01 V Input bias current IB 2 − INE1 = 0 V − 250 − 63 nA Voltage gain AV 3 DC 60 100 dB Frequency band width BW 3 AV = 0dB 1.5* MHz VOH 3 3.2 3.4 V VOL 3 40 200 mV Short-circuit Protection Circuit Block [SCP] Error Amp Block (CH1) [Error Amp1] Output voltage Error Amp Block (CH2, CH3) [Error Amp2, Error Amp3] VCC = CT = 100 pF, RT = 10 kΩ Output source current ISOURCE 3 FB1 = 2.25 V −2 −1 mA Output sink current ISINK 3 FB1 = 2.25 V 150 250 µA Threshold voltage VTH 9, 12 FB2 = FB3 = 2.25 V 1.218 1.230 1.242 V Input bias current IB 9, 12 − INE2 = − INE3 = 0 V − 250 − 63 nA Voltage gain AV 8, 13 DC 60 100 dB Frequency band width BW 8, 13 AV = 0 dB 1.5* MHz VOH 8, 13 3.2 3.4 V VOL 8, 13 40 200 mV Output voltage Output source current ISOURCE 8, 13 FB2 = FB3 = 2.25 V −2 −1 mA Output sink current 8, 13 FB2 = FB3 = 2.25 V 150 250 µA ISINK * : Standard design value (Continued) 6 MB39A112 (Continued) (VCC = VCCO = 12 V, Ta = + 25 °C) Parameter PWM Comparator Threshold voltage Block [PWM Comp.] Bias Voltage Block [VH] Output Block [Drive] SymPin No. bol Max 17 to 19 Duty cycle = 0 % 1.9 2.0 V 17 to 19 Duty cycle = 100 % 2.5 2.6 V VCCO − 5.5 VCCO − 5.0 VCCO − 4.5 V Duty ≤ 5 % 17 to 19 OUT1 = OUT2 = OUT3 = 7 V − 150* mA ISINK Duty ≤ 5 % 17 to 19 OUT1 = OUT2 = OUT3 = 12 V 150* mA ROH 17 to 19 OUT1 = OUT2 = OUT3 = − 15 mA 13 19.5 Ω ROL 17 to 19 OUT1 = OUT2 = OUT3 = 15 mA 10 15 Ω ICC 4 6 9 mA VT0 VT100 VH Output source current ISOURC Power supply current Unit Typ E 16 Output ON resistor General Value Min Output voltage Output sink current Conditions * : Standard design value 7 MB39A112 ■ TYPICAL CHARCTERISTICS Power supply current ICC (mA) Power Supply Current vs. Power Supply Voltage 10 Ta = +25 °C RT = OPEN 8 6 4 2 0 0 5 10 15 20 25 Power supply voltage VCC (V) Error Amp (ERR2, ERR3) Threshold Voltage vs. Ambient Temperature 2.0 2.0 VCC = 12 V FB1 = 0 mA 1.5 1.0 0.5 0.0 −0.5 −1.0 −1.5 −2.0 −40 −20 0 20 40 60 80 100 Threshold voltage ∆VTH (%) Threshold voltage ∆VTH (%) Error Amp (ERR1) Threshold Voltage vs. Ambient Temperature 1.0 0.5 0.0 −0.5 −1.0 −1.5 −2.0 −40 −20 Ta = +25 °C VCC = 12 V CT = 22 pF CT = 100 pF CT = 1000 pF CT = 390 pF 100 10 1 10 100 Timing resistor RT (kΩ) 20 40 60 80 100 1000 Triangular Wave Oscillation Frequency vs. Timing Capacitor Triangular wave oscillation frequency fosc (kHz) Triangular wave oscillation frequency fosc (kHz) Triangular Wave Oscillation Frequency vs. Timing Resistor 1000 0 Ambient temperature Ta ( °C) Ambient temperature Ta ( °C) 10000 VCC = 12 V FB2(3) = 0 mA 1.5 10000 Ta = +25 °C VCC = 12 V 1000 RT = 4.7 kΩ RT = 22 kΩ 100 10 10 100 RT = 10 kΩ 1000 10000 Timing capacitor CT (pF) (Continued) 8 MB39A112 2.8 Ta = +25 °C VCC = 12 V CT = 100 pF 2.6 Upper limit 2.4 2.2 Lower limit 2.0 1.8 0 500 1000 1500 2000 2500 3000 Triangular wave oscillation frequency fosc (kHz) Triangular Wave Upper/Lower Limit Voltage vs. Ambient Temperature Triangular wave upper/lower limit voltage VCT (V) Triangular wave upper/lower limit voltage VCT (V) Triangular Wave Upper/Lower Limit Voltage vs. Triangular Wave Oscillation Frequency 1300 1250 1200 1150 1100 1050 1000 −40 −20 0 20 40 60 80 Ambient temperature Ta ( °C) 100 Triangular wave oscillation frequency fosc (kHz) Triangular wave oscillation frequency fosc (kHz) VCC = 12 V RT = 10 kΩ CT = 100 pF 1350 2.6 VCC = 12 V RT = 10 kΩ CT = 100 pF Upper limit 2.4 2.2 Lower limit 2.0 1.8 −40 −20 0 20 40 60 80 100 Ambient temperature Ta ( °C) Triangular Wave Oscillation Frequency vs. Power Supply Voltage Triangular Wave Oscillation Frequency vs. Ambient Temperature 1400 2.8 1400 Ta = +25 °C RT = 10 kΩ CT = 100 pF 1350 1300 1250 1200 1150 1100 1050 1000 0 5 10 15 20 25 30 Power supply voltage VCC (V) (Continued) 9 MB39A112 (Continued) Error Amp (CH1) Gain, Phase vs. Frequency Ta = +25 °C VCC = 12 V 40 AV 30 240 kΩ 90 10 0 0 −10 −90 −20 Phase ϕ (deg) ϕ 20 Gain AV (dB) 180 10 kΩ 1 µF + IN 2 − 1 + + 2.4 kΩ 10 kΩ 3 OUT Error Amp1 1.0 V 3.5 V −30 −180 −40 100 1k 10 k 100 k 1M 10 M Frequency f (Hz) Error Amp (CH2, CH3) Gain, Phase vs. Frequency 40 AV 30 Ta = +25 °C VCC = 12 V 240 kΩ ϕ 10 kΩ 1 µF + 10 0 0 −10 −90 −20 Phase ϕ (deg) 90 20 Gain AV (dB) 180 IN 2.4 k 10 kΩ 9 (12) 10 (11) − + + 1.23 V 3.5 V −30 −180 −40 100 1k 10 k 100 k 1M 10 M Frequency f (Hz) Maximum power dissipation PD (mW) Maximum Power Dissipation vs. Ambient Temperature 1400 1300 1280 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 −40 −20 0 20 40 60 Ambient temperature Ta ( °C) 10 80 100 8 OUT (13) Error Amp2 (Error Amp3) MB39A112 ■ FUNCTION 1. DC/DC Converter Function (1) Triangular Wave Oscillator Block (OSC) The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the CT terminl (pin 6) and RT terminl (pin 5) to generate triangular oscillation waveform amplitude of 2.0 V to 2.5 V. The triangular waveforms are input to the PWM comparator in the IC. (2) Error Amplifier Block (Error Amp1, Error Amp2, Error Amp3) The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS1 terminl (pin 1) , CS2 terminl (pin10) and CS3 terminl (pin 11) which are the non-inverted input terminal for Error Amp. The use of error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the DC/DC converter. (3) PWM Comparator Block (PWM Comp.) The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. The comparator keeps output transistor on while the error amplifier output voltage remain higher than the triangular wave voltage. (4) Output Block The output blobk is in the totem pole configulation, capable of driving an external P-channel MOS FET. (5) Bias Voltage Block (VH) This bias voltage circuit outputs VCC − 5 V (Typ) as minimum potential of the output circuit. 2. Protective Function (1) Timer Latch Short-circuit Protection Circuit (SCP) Each channel has a short-circuit detection comparator (SCP Comp.) which constantly compares the error Amp. output level to the reference voltage. While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output remains at “L”, and the CSCP terminal is held at “L” level. If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to “H” level. This causes the external short-circuit protection capacitor CSCP connected to the CSCP terminal (pin 14) to be charged. When the capacitor CSCP is charged to the threshold voltage (VTH =: 0.72 V) , the latch is set and the external FET is turned off (dead time is set to 100 %) . At this point, the latch input is closed and the CSCP terminal is held at “L” level. The latch applied by the timer-latch short-circuit protection circuit can be reset by recycling the power supply (VCC) (See “■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”) . 11 MB39A112 (2) Undervoltage Lockout Protection Circuit Block (UVLO) The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the CSCP terminal (pin 14) at the “L” level. The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit. (3) Protection Circuit Operating Function Table This table refers to output condition when each protection circuit is operating. CH1 CH2 Operating circuit OUT1 OUT2 OUT3 Short-circuit protection circuit H H H Under-voltage lockout circuit H H H The latch can be reset as follows after the short-circuit protection circuit is actuated. Recycling VCC resets the latch whenever the short-circuit protection circuit has been actuated. 12 CH3 MB39A112 ■ SETTING THE OUTPUT VOLTAGE • CH1 VO R1 Error Amp 2 −INE1 − VO (V) = + + R2 1.00 R2 (R1 + R2) 1.00 V CS1 1 • CH2, CH3 VO R1 (−INE3) 12 9 −INE2 Error Amp − + + R2 VO (V) = 1.23 R2 (R1 + R2) 1.23 V (CS3) CS2 11 10 ■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY The triangular oscillation frequency is determined by the timing capacitor (CT) connected to the CT terminal (pin 6) and the timing resistor (RT) connected to the RT terminal (pin 5) . Triangular oscillation frequency : fosc fosc (kHz)=: 1200000 CT (pF) • RT (kΩ) 13 MB39A112 ■ SETTING THE SOFT-START AND DISCHARGE TIMES To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors (CS1, CS2 and CS3) to the CS1 terminal (pin 1) for channel 1, CS2 terminal (pin 10) for channel 2 and CS3 terminal (pin 11) for channel 3 respectively. Setting each control terminal (CTLX) from “H” to “L” starts charging the external soft-start capacitors (CS1, CS2 and CS3) connected to the CS1, CS2 and CS3 terminal at about 10 µA. The DC/DC converter output voltage rises in proportion to the CS terminal voltage. Also, soft-start time is obtained by the following formulas. Soft-start time : ts (time to output 100%) CH1 : ts1[s] =: 0.100 × CS1[µF] CH2 : ts2[s] =: 0.123 × CS2[µF] CH3 : ts3[s] =: 0.123 × CS3[µF] • Soft-start circuit −INE1 (−INE2) (−INE3) L priority VO CS1 (CS2) (CS3) VREF 10 µA CH1 ON/OFF signal − + + Error Amp (L : ON, H : OFF) FB1 (FB2) (FB3) CTLX 1.23 V /1.0 V H : at SCP SCP UVLO H: UVLO release • Soft-start operation CS terminal voltage =: 3.4 V Error Amp. reference voltage =: 1.23 V/ 1.00 V =: 0 V t Soft-start time ts H CTLX signal L t 14 MB39A112 ■ TREATMENT WITHOUT USING CS TERMINAL When not using the soft-start function, open the CS1 terminal (pin 1) , CS2 terminal (pin 10) and CS3 terminal (pin 11) . • Without setting soft-start tme “Open” 1 CS1 “Open” 10 CS2 “Open” 11 CS3 15 MB39A112 ■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT Each channel uses the short-circuit detection comparator (SCP Comp.) to always compare the error amplifier’s output level to the reference voltage. While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output remains at “L” level, and the CSCP terminal (pin 14) is held at “L” level. If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator goes to “H” level. This causes the extemal shortcircuit protection capacitor CSCP connected to the CSCP terminal to be charged at 1 µA. Short-circuit detection time : tcscp tcscp[s] =: 0.72 × CSCP [µF] When the capacitor CSCP is charged to the threshold voltage (VTH =: 0.72 V) , the latch is set and the external FET is turned off (dead time is set to 100 %) . At this time, the latch input is closed and the CSCP terminal (pin 14) is held at “L” level. If any of CH1 to CH3 detects a short circuit, all the channels are stopped. • Timer-latch short-circuit protection circuit VO R1 −INE1 (−INE2) (−INE3) VREF 10 µA R2 − + + CS1 (CS2) (CS3) Error Amp 1.23 V /1.0 V FB1 (FB2) (FB3) SCP Comp. + + + − [SCP] 2.7 V 1 µA H: UVLO release CSCP 14 VCC S R Latch UVLO H: at SCP 16 MB39A112 ■ TREATMENT WITHOUT USING CSCP TERMINAL When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 14) to GND with the shortest distance. • Treatment without using CSCP terminal 14 CSCP 7 GND 17 MB39A112 ■ I/O EQUIVALENT CIRCUIT <<Triangular wave oscillator block (CT) >> <<Triangular wave oscillator block (RT) >> <<Short-circuit detection block>> VCC 4 VCC VREF (3.5 V) VCC VREF (3.5 V) ESD protection element ESD protection element 2 kΩ VREF (3.5 V) 1.2 V CT 6 − 14 CSCP ESD protection element GND 7 + 5 RT GND GND <<Error amplifier block (CH1) >> <<Soft-start block>> VCC VCC VREF (3.5 V) VREF (3.5 V) CSX −INE1 2 CS1 1.00 V 3 FB1 GND GND <<PWM comparator block>> <<Error amplifier block (CH2, CH3) >> VCC VCC VREF (3.5 V) CSX 1.23 V FBX FBX GND GND <<Bias voltage block>> VCC <<Output block>> VCCO VCCO 20 OUTX 16 VH VH GND X : Each channel No. 18 GNDO GNDO 15 CT MB39A112 ■ APPLICATION EXAMPLE R6 R7 2.2 kΩ 18 kΩ A −INE1 CH1 ON/OFF signal 10 µA CS1 CTL1 C8 0.022 µF R11 R12 4.7 kΩ 56 kΩ B R9 820 Ω FB1 −INE2 L priority CTL2 R15 R16 680 Ω 30 kΩ VIN (12 V) C CTL3 FB2 − + + L priority L2 Q2 CH2 Error Amp2 + PWM Comp.2 Drive2 − 18 Pch C3 2.2 µF OUT2 C4 4.7 µF D2 1.23 V 8 Stepdown C −INE3 12 Threshold voltage 1.23 V ± 1 % VREF 10 µA − + + 11 R18 1 kΩ FB3 L priority L3 Q3 CH3 VO3 (5.0 V) IO3 = 0.15 ∼ 0.3 A 10 µH Error Amp3 + PWM Comp.3 Drive3 17 Pch − C5 2.2 µF OUT3 D3 C6 4.7 µF 1.23 V 13 C16 0.1 µF IO = 150 mA H priority VCCO − 5 V + + + − 16 15 H: UVLO release 2.0 V ErrorAmp Reference 1.0 V/1.23 V bias 3.5 V OSC GNDO Error Amp Power Supply SCP Comp. Power Supply H: at SCP 14 2.5 V VH Bias Voltage VH SCP CSCP VO2 (3.3 V) IO2 = 0.15 ∼ 1 A 3.3 µH 2.7 V C15 1000 pF Stepdown B Threshold voltage 1.23 V ± 1 % SCP Comp. Charge current 1 µA C2 4.7 µF D1 IO = 150 mA CS3 C14 0.01 µF C1 2.2 µF OUT1 IO = 150 mA 10 R14 820 Ω (L : ON, H : OFF) C13 0.1 µF 19 Pch VO1 (1.2 V) IO1 = 0.8 ∼ 1.5 A 2 µH 1.0 V 9 R17 10 kΩ CH3 ON/OFF signal Drive1 − L1 Q1 VCCO C17 0.1 µF PWM Comp.1 3 10 µA CS2 C11 0.01 µF + 20 VREF (L : ON, H : OFF) C12 0.1 µF Error Amp1 − + + 1 R13 36 kΩ CH2 ON/OFF signal CH1 VREF (L : ON, H : OFF) C7 0.1 µF Threshold voltage 1.0 V ± 1 % 2 R8 100 kΩ Stepdown A UVLO VREF VR 4 VCC C9 0.1 µF Power ON/OFF CTL GND 5 RT R10 5.1 kΩ 6 7 CT GND C10 100 pF 19 MB39A112 ■ PARTS LIST COMPONENT ITEM SPECIFICATION VENDOR PARTS No. Q1, Q2, Q3 Pch FET Pch FET VDS = − 30 V, ID = − 2.0 A VDS = − 30 V, ID = − 1.0 A SANYO SANYO MCH3312 MCH3308 D1, D2 D3 Diode Diode VF = 0.55 V (Max) , at IF = 2 A VF = 0.4 V (Max) , at IF = 0.5 A SANYO SANYO SBE001 SBE005 L1 L2 L3 Inductor Inductor Inductor 2 µH 3.3 µH 10 µH 3 A, 16 mΩ 2.57 A, 21.4 mΩ 1.49 A, 41.2 mΩ TOKO TOKO TOKO A916CY-2R0M A916CY-3R3M A916CY-100M C1, C3, C5 C2, C4, C6 C7, C9, C12 C8 C10 C11, C14 C13, C16, C17 C15 Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser 2.2 µF 4.7 µF 0.1 µF 0.022 µF 100 pF 0.01 µF 0.1 µF 1000 pF 25 V 10 V 50 V 50 V 50 V 50 V 50 V 50 V TDK TDK TDK TDK TDK TDK TDK TDK C3216JB1E225K C3216JB1A475M C1608JB1H104K C1608JB1H223K C1608CH1H101J C1608JB1H103K C1608JB1H104K C1608JB1H102K R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor 2.2 kΩ 18 kΩ 100 kΩ 820 Ω 5.1 kΩ 4.7 kΩ 56 kΩ 36 kΩ 820 Ω 680 Ω 30 kΩ 10 kΩ 1 kΩ 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm RR0816P-222-D RR0816P-183-D RR0816P-104-D RR0816P-821-D RR0816P-512-D RR0816P-472-D RR0816P-563-D RR0816P-363-D RR0816P-821-D RR0816P-681-D RR0816P-303-D RR0816P-103-D RR0816P-102-D Note : SANYO TOKO TDK ssm 20 : SANYO Electric Co., Ltd. : TOKO Inc. : TDK Corporation : SUSUMU Co., Ltd. MB39A112 ■ SELECTION OF COMPONENTS • Pch MOS FET The Pch MOS FET for switching use should be rated for at least 20 % or more than the maximum input voltage. To minimize continuity loss, use a FET with low RDS (ON) between the drain and source. For high input voltage and high frequency operation, on-cycle switching loss will be higher so that power dissipation must be considered. In this application, the SANYO MCH3312 and MCH3308 are used. Continuity loss, on/off-cycle switching loss and total loss are determined by the following formulas. The selection must ensure that peak drain current does not exceed rated values. Continuity loss : Pc PC = ID2 × RDS (ON) × Duty On-cycle switching loss : PS (ON) PS (ON) = VD (Max) × ID × tr × fosc 6 Off-cycle switching loss : PS (OFF) PS (OFF) = VD (Max) × ID (Max) × tf × fosc 6 Total loss : PT PT = PC + PS (ON) + PS (OFF) Example : Using the MCH3312 • CH1 Input voltage VIN = 12 V, output voltage VO = 1.2 V, drain current ID = 1.5 A, oscillation frequency fOSC = 2350 kHz, L = 2 µH, drain-source on resistance RDS(ON) =: 180 mΩ, tr =: 2.9 ns, tf =: 8.7 ns. Drain current (Max) : ID (Max) ID (Max) = Io + = 1.5 + =: VIN − Vo 2L tON 12 − 1.2 2 × 2.0 × 10 −6 × 1 2350 × 103 × 0.1 1.61 A Drain current (Min) : ID (Min) ID (Min) = Io− = 1.5 − =: VIN − Vo 2L tON 12 − 1.2 2 × 2.0 × 10 −6 × 1 2350 × 103 × 0.1 1.39 A 21 MB39A112 PC = ID2 × RDS (ON) × Duty = 1.52 × 0.18 × 0.1 =: 0.04 W VD × ID × tr × fosc 6 12 × 1.5 × 2.9 × 10−9 × 2350 × 103 = 6 =: 0.02 W PS (ON) = VD × ID (Max) × tf × fosc 6 12 × 1.61 × 8.7 × 10−9 × 2350 × 103 = 6 =: 0.066 W PS (OFF) = PT = Pc + PS (ON) + PS (OFF) =: 0.04 + 0.02 + 0.066 =: 0.126 W The above power dissipation figures for the MCH3312 are satisfied with ample margin at 1.0 W (Ta = +25 °C) . • CH2 Input voltage VIN = 12 V, output voltage VO = 3.3 V, drain current ID = 1.0 A, oscillation frequency fOSC = 2350 kHz, L = 3.3 µH, drain-source on resistance RDS(ON) =: 180 mΩ, tr =: 2.9 ns, tf =: 8.7 ns. Drain current (Max) : ID (Max) VIN − Vo tON ID (Max) = Io + 2L 12 − 3.3 = 1+ 2 × 3.3 × 10−6 =: 1.15 A Drain current (Min) : ID (Min) VIN − Vo tON ID (Min) = Io − 2L 12 − 3.3 = 1− 2 × 3.3 × 10 −6 =: 0.85 A PC = ID2 × RDS (ON) × Duty = 12 × 0.18 × 0.275 =: 0.0495 W 22 × 1 2350 × 103 × 0.275 × 1 2350 × 103 × 0.275 MB39A112 PS (ON) = = =: PS (OFF) = = =: VD × ID × tr × fosc 6 12 × 1 × 2.9 × 10−9 × 2350 × 103 6 0.0136 W VD × ID (Max) × tf × fosc 6 12 × 1.15 × 8.7 × 10−9 × 2350 × 103 6 0.047 W PT = PC + PS (ON) + PS (OFF) =: 0.0495 + 0.0136 + 0.047 =: 0.11 W The above power dissipation figures for the MCH3312 are satisfied with ample margin at 1.0 W (Ta = +25 °C) . Example : Using the MCH3308 • CH3 Input voltage VIN = 12 V, output voltage Vo = 5.0 V, drain current ID = 0.3 A, oscillation frequency fosc = 2350 kHz, L = 10 µH, drain-source on resistance RDS (ON) =: 600 mΩ, tr =: 4 ns, tf =: 4 ns. Drain current (Max) : ID (Max) ID (Max) = Io + VIN − Vo 2L 12 − 5 = 0.3 + =: tON 2 × 10 × 10 −6 × 1 2350 × 103 × 0.417 0.36 (A) Drain current (Min) : ID (Min) ID (Min) = Io − VIN − Vo = 0.3 − 2L tON 12 − 5 2 × 10 × 10 −6 × 1 2350 × 103 × 0.417 =: 0.24 (A) PC = ID2 × RDS (ON) × Duty = 0.32 × 0.6 × 0.417 =: 0.023 W 23 MB39A112 PS (ON) = = =: VD × ID × tr × fosc 6 12 × 0.3 × 4 × 10−9 × 2350 × 103 6 0.0056 W VD × ID (Max) × tf × fosc 6 12 × 0.36 × 4 × 10−9 × 2350 × 103 = 6 =: 0.0068 W PS (OFF) = PT = Pc + PS (ON) + PS (OFF) =: 0.023 + 0.0056 + 0.0068 =: 0.0354 W The above power dissipation figures for the MCH3308 are satisfied with ample margin at 0.8 W (Ta = +25 °C) . • Inductors In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor, but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value, which will enable continuous operation under light loads. Note that if the inductance value is too high, however, direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at the point where efficiency is greatest. Note also that the DC superimposition characteristics become worse as the load current value approaches the rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing loss of efficiency. The selection of rated current value and inductance value will vary depending on where the point of peak efficiency lies with respect to load current. Inductance values are determined by the following formulas. The L value for all load current conditions is set so that the peak to peak value of the ripple current is 1/2 the load current or less. Inductance value : L 2 (VIN − Vo) L≥ tON Io Example • CH1 2 (VIN − Vo1) L≥ Io 2 × (12 −1.2) ≥ 1.5 ≥ 0.61 µH 24 tON × 1 2350 × 103 × 0.1 MB39A112 • CH2 2 (VIN − Vo2) L≥ Io 2 × (12−3.3) ≥ 1 ≥ 2.04 µH tON × • CH3 2 (VIN − Vo3) L≥ Io 2 × (12 − 5) ≥ 0.3 ≥ 8.28 µH 1 2350 × 103 × 1 2350 × 103 × 0.417 0.275 tON × Inductance values derived from the above formulas are values that provide sufficient margin for continuous operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore necessary to determine the load level at which continuous operation becomes possible. In this application, the TOKO A916CY-2R0M, A916CY-3R3M and A916CY-100M are used. At 2 µH, 3.3 µH and 10 µH, the load current value under continuous operating conditions is determined by the following formula. Load current value under continuous operating conditions : Io Io ≥ Vo tOFF 2L Example : Using the A916CY-2R0M 2 µH (allowable tolerance ± 20 %), rated current = 3 A • CH1 Vo1 Io ≥ 2L ≥ tOFF 1.2 1 × 2 × 2 × 10 −6 2350 × 103 × (1 − 0.1) ≥ 0.11 A Example : Using the A916CY-3R3M 3.3 µH (allowable tolerance ± 20 %) , rated current = 2.57 A • CH2 Vo2 Io ≥ 2L ≥ tOFF 3.3 2 × 3.3 × 10 −6 × 1 2350 × 103 × (1 − 0.275) ≥ 0.15 A 25 MB39A112 Example : Using the A916CY-100M 10.0 µH (allowable tolerance ± 20 %) , rated current = 1.49 A • CH3 Vo3 Io ≥ 2L ≥ tOFF 5 × 2 × 10 × 10−6 1 2350 × 103 × (1 − 0.417) ≥ 62.0 mA To determine whether the current through the inductor is within rated values, it is necessary to determine the peak value of the ripple current as well as the peak-to-peak values of the ripple current that affect the output ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following formulas. Peak value : IL VIN − Vo IL ≥ Io + tON 2L Peak-to-peak value : ∆IL ∆IL = VIN − Vo L tON Example : Using the A916CY-2R0M 2.0 µH (allowable tolerance ± 20 %) , rated current = 3.0 A • CH1 Peak value IL ≥ Io + VIN − Vo1 ≥ 1.5 + ≥ 2L tON 12 − 1.2 2 × 2.0 × 10 × −6 1 2350 × 103 1.61 A Peak-to-peak value VIN − Vo1 tON ∆IL = L = =: 26 12 − 1.2 2.0 × 10−6 0.23 A × 1 2350 × 103 × 0.1 × 0.1 MB39A112 Example : Using the A916CY-3R3M 3.3 µH (allowable tolerance ± 20 %) , rated current = 2.57 A • CH2 Peak value IL ≥ Io + VIN − Vo2 12 − 3.3 ≥ 1.0 + ≥ tON 2L × 2 × 3.3 × 10−6 1 2350 × 103 × 0.275 1.15 A Peak-to-peak value VIN − Vo2 ∆IL = tON L = =: 12 − 3.3 × 3.3 × 10 −6 1 2350 × 103 × 0.275 0.309 A Example : Using the A916CY-100M 10.0 µH (allowable tolerance ± 20 %) , rated current = 1.49 A • CH3 Peak value IL ≥ Io + VIN − Vo3 ≥ 0.3 + ≥ tON 2L 12 − 5 2 × 10 × 10 × −6 1 2350 × 103 × 0.417 0.36 A Peak-to-peak value VIN − Vo3 ∆IL = tON L = =: 12 − 5 10 × 10 −6 × 1 2350 × 103 × 0.417 0.124 A 27 MB39A112 • Flyback diode The flyback diode is generally used as a Shottky barrier diode (SBD) when the reverse voltage to the diode is less than 40 V. The SBD has the characteristics of higher speed in terms of faster reverse recovery time, and lower forward voltage, and is ideal for archiving high efficiency. As long as the DC reverse voltage is sufficiently higher than the input voltage, the average current flowing through the diode is within the average output current level, and peak current is within peak surge current limits, there is no problem. In this application the SANYO SBE001, SBS005 are used. The diode average current and diode peak current can be calculated by the following formulas. Diode mean current : IDi IDi ≥ Io × ( 1− Vo ) VIN Diode peak current : IDip IDip ≥ Vo (Io + 2L tOFF) Example : Using the SBE001 VR (DC reverse voltage) = 30 V, average output current = 2.0 A, peak surge current = 20 A, VF (forward voltage) = 0.55 V, at IF = 2.0 A • CH1 Diode mean current IDi ≥ Io × (1 − ≥ 1.5 × Vo1 VIN ) (1 − 0.1) ≥ 1.35 A Diode peak current Vo1 IDip ≥ (Io + 2L tOFF) ≥ 1.61 A • CH2 Diode mean current IDi ≥ Io × (1 − Vo2 VIN ≥ 1.0 × (1 − 0.275) ≥ 0.725 A 28 ) MB39A112 Diode peak current Vo2 IDip ≥ (Io + 2L tOFF) ≥ 1.15 A Example : Using the SBS005 VR (DC reverse voltage) = 30 V, average output current = 1.0 A, peak surge current = 10 A, VF (forward voltage) = 0.4 V, at IF = 0.5 A • CH3 Diode mean current IDi ≥ Io × (1 − Vo3 VIN ) ≥ 0.3 × (1 − 0.417) ≥ 0.175 A Diode peak current Vo3 IDip ≥ (Io + 2L tOFF) ≥ 0.36 A 29 MB39A112 ■ REFERENCE DATA Conversion Efficiency vs. Load Current Characteristics (CH1) Conversion efficiency η (%) 100 Ta = + 25 °C 1.2 V output CTL1 = “L” CTL2 = “H” CTL3 = “H” RT = 5.1 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) Conversion Efficiency vs. Load Current Characteristics (CH2) Conversion efficiency η (%) 100 Ta = + 25 °C 3.3 V output CTL1 = “H” CTL2 = “L” CTL3 = “H” RT = 5.1 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) Conversion Efficiency vs. Load Current Characteristics (CH3) Conversion efficiency η (%) 100 Ta = + 25 °C 5.0 V output CTL1 = “H” CTL2 = “H” CTL3 = “L” RT = 5.1 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) (Continued) 30 MB39A112 Conversion Efficiency vs. Load Current Characteristics (CH1) Conversion efficiency η (%) 100 Ta = + 25 °C 1.2 V output CTL1 = “L” CTL2 = “H” CTL3 = “H” RT = 10 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) Conversion Efficiency vs. Load Current Characteristics (CH2) Conversion efficiency η (%) 100 Ta = + 25 °C 3.3 V output CTL1 = “H” CTL2 = “L” CTL3 = “H” RT = 10 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) Conversion Efficiency vs. Load Current Characteristics (CH3) Conversion efficiency η (%) 100 Ta = + 25 °C 5.0 V output CTL1 = “H” CTL2 = “H” CTL3 = “L” RT = 10 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10m 100m 1 10 Load current IL (A) (Continued) 31 MB39A112 (Continued) Conversion Efficiency vs. Load Current Characteristics (CH1) Conversion efficiency η (%) 100 Ta = + 25 °C 1.2 V output CTL1 = “L” CTL2 = “H” CTL3 = “H” RT = 24 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) Conversion Efficiency vs. Load Current Characteristics (CH2) Conversion efficiency η (%) 100 Ta = + 25 °C 3.3 V output CTL1 = “H” CTL2 = “L” CTL3 = “H” RT = 24 kΩ CT = 100 pF 90 80 70 VIN = 7 V VIN = 10 V VIN = 12 V 60 50 40 30 10 m 100 m 1 10 Load current IL (A) Cconversion Efficiency vs. Load Current Characteristics (CH3) Cconversion efficiency η (%) 100 Ta = + 25 °C 5.0 V output CTL1 = “H” CTL2 = “H” CTL3 = “L” RT = 24 kΩ CT = 100 pF 90 80 70 60 50 40 30 10 m 100 m 1 Load current IL (A) 32 VIN = 7 V VIN = 10 V VIN = 12 V 10 MB39A112 ■ USAGE PRECAUTION • Printed circuit board ground lines should be set up with consideration for common impedance. • Take appropriate static electricity measures. • Containers for semiconductor materials should have anti-static protection or be made of conductive material. • After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. • Work platforms, tools and instruments should be properly grounded. • Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground. • Do not apply negative voltages. • The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause abnormal operation. ■ ORDERING INFORMATION Part number MB39A112PFT Package Remarks 20-pin plastic TSSOP (FPT-20P-M06) 33 MB39A112 ■ PACKAGE DIMENSION Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 20-pin plastic TSSOP (FPT-20P-M06) *1 6.50±0.10(.256±.004) 0.17±0.05 (.007±.002) 11 20 *2 4.40±0.10 6.40±0.20 (.173±.004) (.252±.008) INDEX Details of "A" part 1.05±0.05 (Mounting height) (.041±.002) LEAD No. 1 10 0.65(.026) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0~8˚ +0.03 (0.50(.020)) 0.10(.004) C 0.60±0.15 (.024±.006) +.001 0.07 –0.07 .003 –.003 (Stand off) 0.25(.010) 2003 FUJITSU LIMITED F20026S-c-3-3 Dimensions in mm (inches) . Note : The values in parentheses are reference values. 34 MB39A112 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. 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Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0311 FUJITSU LIMITED Printed in Japan