FUJITSU MB3883

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27225-2E
ASSP For Power Management Applications
6-ch DC/DC Converter IC with Synchronous
Rectifier for Voltage Step-up and Step-down
MB3883
■ DESCRIPTION
The MB3883 is a 6-channel step-up/step-down DC/DC converter IC using pulse width modulation (PWM) and
synchronous rectification, designed for low voltage, high efficiency, and compact size. This IC is ideal for up
conversion, down conversion, and up/down conversion (using a step-up/step-down Zeta system with free input
and output settings).
The MB3883 can operate at low voltage levels, and has a wide supply voltage range from 1.7 V to 9 V.
The MB3883 is available in two packages, an LQFP-48P or a leadless BCC-48P formed with a contact electrode
pad only.
This is an ideal power supply for high-performance portable devices such as digital still cameras.
■ FEATURES
• Supports synchronous rectification (CH1, 2, 5)
• Supports for down-conversion and up/down Zeta conversion (CH1, 2)
Supports for up-conversion (CH5)
• Supports up-conversion (CH3, 4, 6)
• Low start-up voltage
: 1.7 V (CH6)
• Power supply voltage range
: 2.4 V to 9 V (CH6)
: 3.6 V to 9 V (CH1 to CH5)
• Built-in high-precision reference voltage circuit
: ±1 %
• Wide operating oscillator frequency range with high-frequency capability : 100 kHz to 1 MHz
• Error amplifier output for soft start (CH1 to CH6)
• Totem-pole type output switch control circuit
■ PACKAGES
48-pin plastic LQFP
48-pad plastic BCC
(FPT-48P-M05)
(LCC-48P-M02)
MB3883
■ PIN ASSIGNMENTS
(TOP VIEW)
OUT6
OUT5-2
OUT5-1
GND (O)
OUT4
VCC (O)
OUT3
OUT2-2
OUT2-1
OUT1-2
OUT1-1
47
46
45
44
43
42
41
40
39
38
37
FB5
7
30
DTC3
−IN5
8
29
FB3
−IN (A) 4
9
28
−IN3
OUT (A) 4
10
27
VB
FB4
11
26
CT
−IN4
12
25
RT
(CH4)
24
−IN2
CTL5
31
23
6
CTL4
DTC5
22
FB2
CTL3
32
21
5
CTL1, 2
C+IN6
20
DTC2
CTL
33
19
4
VCC
−IN6
18
−IN1
CSCP
34
17
3
GND
FB6
16
FB1
VREF
35
15
2
CS
SWIN
14
DTC1
DTC4
36
Control block
(FPT-48P-M05)
2
(CH1 ∼ CH3)
RB6
48
1
13
SWOUT
−IN (S) 4
(CH5, CH6)
Output block
MB3883
(TOP VIEW)
OUT6
OUT5-2
OUT5-1
GND (O)
OUT4
VCC (O)
OUT3
OUT2-2
OUT2-1
OUT1-2
47
46
45
44
43
42
41
40
39
38
FB2
FB5
7
31
−IN2
−IN5
8
30
DTC3
−IN (A) 4
9
29
FB3
OUT (A) 4
10
28
−IN3
FB4
11
27
VB
−IN4
12
26
CT
−IN (S) 4
13
25
RT
(CH4)
24
32
CTL5
6
23
DTC5
CTL4
DTC2
22
33
CTL3
5
21
C+IN6
CTL1, 2
−IN1
20
34
CTL
4
19
−IN6
VCC
FB1
18
35
CSCP
3
17
FB6
GND
DTC1
16
36
VREF
2
15
OUT1-1
CS
37
(CH1 ∼ CH3)
RB6
SWIN
48
1
14
SWOUT
DTC4
(CH5, CH6)
Output block
Control block
(LCC-48P-M02)
3
MB3883
■ PIN DESCRIPTION
Pin No.
CH1
CH2
CH3
CH4
CH5
CH6
Symbol
I/O
Descriptions
35
FB1
O
Error amplifier output pin.
34
−IN1
I
Error amplifier inverted input pin.
36
DTC1
I
Dead time control pin.
37
OUT1-1
O
Main side output pin.
38
OUT1-2
O
Synchronous rectifier side output pin.
32
FB2
O
Error amplifier output pin.
31
−IN2
I
Error amplifier inverted input pin.
33
DTC2
I
Dead time control pin.
39
OUT2-1
O
Main side output pin.
40
OUT2-2
O
Synchronous rectifier side output pin.
29
FB3
O
Error amplifier output pin.
28
−IN3
I
Error amplifier inverted input pin.
30
DTC3
I
Dead time control pin.
41
OUT3
O
Output pin.
11
FB4
O
Error amplifier output pin.
12
−IN4
I
Error amplifier inverted input pin.
14
DTC4
I
Dead time control pin.
43
OUT4
O
Output pin.
9
−IN (A) 4
I
Inverting amplifier input pin.
10
OUT (A) 4
O
Inverting amplifier output pin.
13
−IN (S) 4
I
Short detection comparator inverted input pin.
7
FB5
O
Error amplifier output pin.
8
−IN5
I
Error amplifier inverted input pin.
6
DTC5
I
Dead time control pin.
45
OUT5-1
O
Main side output pin.
46
OUT5-2
O
Synchronous rectifier side output pin.
3
FB6
O
Error amplifier output pin.
4
−IN6
I
Error amplifier inverted input pin.
5
C+IN6
I
Soft start capacitor connection pin.
48
RB6
O
Output current setting resistor connection pin.
47
OUT6
O
Output pin.
(Continued)
4
MB3883
(Continued)
Pin No.
OSC
Symbol
I/O
25
RT

Triangular wave frequency setting resistor connection pin.
26
CT

Triangular wave frequency setting capacitor connection pin.
27
VB
O
Triangular wave oscillator regulator output pin.
1
SWOUT
O
Output switch control circuit output pin.
2
SWIN
I
Output switch control circuit input pin.
20
CTL
I
Power supply, CH6 control pin.
“H” level : Power supply CH6 operating mode
“L” level : Standby mode
I
CH1, CH2 control pin.
When CTL1, 2 pin = “H” level
“H” level : CH1, CH2 operating mode
“L” level : CH1, CH2 OFF mode
I
CH3 control pin.
When CTL3 pin = “H” level
“H” level : CH3 operating mode
“L” level : CH3 OFF mode
I
CH4 control pin.
When CTL4 pin = “H” level
“H” level : CH4 operating mode
“L” level : CH4 OFF mode
CH5 control pin.
When CTL5 pin = “H” level
“H” level : CH5 operating mode
“L” level : CH5 OFF mode
21
Control
22
23
Power
CTL1, 2
CTL3
CTL4
Descriptions
24
CTL5
I
18
CSCP

Short protection circuit capacitor connection pin.
15
CS

CH1to CH5 soft start circuit capacitor connection pin.
19
VCC

Reference voltage and control circuit power supply pin.
42
VCC (O)

Output circuit power supply pin.
16
VREF
O
Reference voltage output pin.
17
GND

Ground pin.
44
GND (O)

Output circuit ground pin.
5
MB3883
■ BLOCK DIAGRAM
+
+
−
FB1 35
Error
Amp.1
−
+
+
−IN1 34
VB1
PWM
Comp.
1-1
CH1
Drive
1-1
37 OUT1-1
Drive
1-2
38 OUT1-2
PWM
Comp.
1-2
+
−
1.25 V
SCP
− Comp.1
+
+
42 VCC (O)
1.0 V
DTC1 36
+
+
−
FB2 32
Error
Amp.2
−
+
+
−IN2 31
VB1
PWM
Comp.
2-1
CH2
PWM
Comp.
2-2
+
−
1.25 V
SCP
− Comp.2
+
+
Drive
2-1
39 OUT2-1
Drive
2-2
40 OUT2-2
1.0 V
DTC2 33
PWM
Comp.3
+
+
−
FB3 29
Error
Amp.3
−
+
+
−IN3 28
CH3
Drive
3
41 OUT3
1.25 V
SCP
− Comp.3
+
+
1.0 V
DTC3 30
−
−IN (A) 4 9
CH4
INV
Amp.4
+
PWM
Comp.4
+
+
−
OUT (A) 4 10
FB4 11
Error
Amp.4
−
+
+
−IN4 12
Drive
4
43 OUT4
1.25 V
SCP
− Comp.4
+
+
−IN (S) 4 13
1.0 V
DTC4 14
+
+
−
FB5 7
Error
Amp.5
−
+
+
−IN5 8
VB1
PWM
Comp.
5-1
CH5
+
−
1.25 V
SCP
− Comp.5
+
+
Drive
5-1
45 OUT5-1
Drive
5-2
46 OUT5-2
PWM
Comp.
5-2
1.0 V
DTC5 6
CH6
FB6 3
−IN6 4
(VB : 2 V)
PWM
Comp.6
+
+
0.74 V
−
(VB : 2 V) Error
Amp.6
−
37.5 kΩ
63 kΩ
+
62.5 kΩ
1.26 V
+
C+IN6 5
Drive
6
37 kΩ
47 OUT6
48 RB6
SCP
Comp.6
−
Power
Comp.
+
0.9 V
−
0.9V
CTL1, 2 21
CTL3 22
CTL4 23
CTL5 24
2V
27
VB
1 SWOUT
44 GND (O)
2 SWIN
19 VCC
UVLO
OSC
15
CS
6
SW
Drive
CT1
1.8 V−
1.1 V−
CT2
1.8 V−
1.1 V−
0.8 V− CT
CS CTL 0.3 V−
Logic
25
RT
26
CT
Power
Ref ON/OFF 20 CTL
CTL
SCP
18
CSCP
2.49 V
16
17
VREF GND
H : ON (Power/CH6)
L : OFF (Standby mode)
(48 Pin)
MB3883
• Block diagram (Expansion 1/2)
+
+
−
FB1 35
−
+
+
−IN1 34
Error
Amp.1
VB1
42 VCC (O)
Drive
1-1
37 OUT1-1
Drive
1-2
38 OUT1-2
1.0 V
+
+
−
FB2 32
−
+
+
−IN2 31
Error
Amp.2
VB1
1.25 V
SCP
− Comp.2
+
+
DTC2 33
CH1
PWM
Comp.
1-2
−
1.25 V
SCP
− Comp.1
+
+
DTC1 36
+
PWM
Comp.
1-1
+
PWM
Comp.
2-1
PWM
Comp.
2-2
−
CH2
Drive
2-1
39 OUT2-1
Drive
2-2
40 OUT2-2
1.0 V
FB3 29
−
+
+
−IN3 28
Error
Amp.3
PWM
Comp.3
+
+
−
CH3
Drive
3
41 OUT3
1.25 V
SCP
− Comp.3
+
+
DTC3 30
−IN (A) 4 9
1.0 V
−
CH4
INV
Amp.4
+
OUT (A) 4 10
FB4 11
−IN4 12
−IN (S) 4 13
DTC4 14
−
+
+
Error
Amp.4
PWM
Comp.4
+
+
−
Drive
4
43 OUT4
1.25 V
SCP
− Comp.4
+
+
1.0 V
7
MB3883
• Block diagram (Expansion 2/2)
+
+
−
FB5 7
−
+
+
−IN5 8
Error
Amp.5
VB1
PWM
Comp.
5-1
CH5
45 OUT5-1
Drive
5-2
46 OUT5-2
PWM
Comp.
5-2
+
−
1.25 V
SCP
− Comp.5
+
+
Drive
5-1
1.0 V
DTC5 6
CH6
FB6 3
(VB : 2 V)
PWM
Comp.6
+
+
0.74 V
−
(VB : 2 V) Error
Amp.6
−
−IN6 4
37.5 kΩ
+
63 kΩ
62.5 kΩ
1.26 V
+
C+IN6 5
Drive
6
37 kΩ
47 OUT6
48 RB6
SCP
Comp.6
−
Power
Comp.
+
0.9 V
−
0.9V
SW
Drive
CT1
1.8 V−
1.1 V−
CT2
1.8 V−
1.1 V−
CTL1, 2 21
0.8 V− CT
CTL3 22 CS CTL 0.3 V−
Logic
CTL4 23
CTL5 24
15
CS
8
44 GND (O)
2 SWIN
27
VB
19 VCC
UVLO
OSC
2V
1 SWOUT
25
RT
26
CT
Power
Ref ON/OFF 20 CTL
CTL
SCP
18
CSCP
2.49 V
16
17
VREF GND
H : ON (Power/CH6)
L : OFF (Standby mode)
(48 Pin)
MB3883
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Power supply voltage
Output current
Output peak current
Power dissipation
Storage temperature
Symbol
Condition
VCC

Rating
Unit
Min.
Max.

10
V
IO
OUT pin

20
mA
IO
OUT pin, Duty ≤ 5%

200
mA
Ta ≤ +25 °C (LQFP-48P)

860*
mW
Ta ≤ +25 °C (BCC-48P)

710*
mW
−55
+125
°C
PD
Tstg

* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
9
MB3883
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Value
Unit
Min.
Typ.
Max.
CH6
1.7

9
V
CH6
2.4
5.0
9
V
CH1 to CH5
3.6
5.0
9
V
−1

0
mA
−0.5

0
mA
Startup power supply voltage
VCC
Power supply voltage
VCC
Reference voltage output current
IOR
VREF pin
VB pin output current
IB
VB pin
VIN
−IN1 to −IN5, −IN (A) 4,
−IN (S) 4 pin
0

VCC − 1.8
V
−IN6 pin
0

VCC − 0.9
V
CTL pin
0

9
V
OUT pin (CH1 to CH5)

2
15
mA
OUT pin (CH6)
1
2
15
mA
SWOUT pin

1
4
mA
RB6 pin
2.4
24
51
kΩ
Input voltage
Control input voltage
Output current
VCTL
IO
Output current setting resister
RB
Oscillator frequency
fOSC

100
500
1000
kHz
Timing capacitor
CT

47
100
560
pF
Timing resistor
RT

8.2
18
100
kΩ
CH1 to CH5

0.027
1.0
µF
CH6

0.47
1.0
µF
Soft-start capacitor
CS
C+IN6
Short detection capacitor
CSCP


0.1
1.0
µF
VB pin capacitor
CVB

0.082
0.18

µF
Operating ambient temperature
Ta

−30
25
85
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
10
MB3883
■ ELECTRICAL CHARACTERISTICS
(Ta = +25 °C, VCC = 5 V)
Pin No.
Conditions
VREF
16

Output voltage
temperature
stability
∆VREF
/VREF
16
Ta = −30 °C to +85 °C
Input stability
Line
16
Load stability
Load
Short-circuit
output current
Typ.
Max.
2.46
2.49
2.51
V

0.5*

%
VCC = 3.6 V to 9 V
−10

10
mV
16
VREF = 0 mA to −1 mA
−10

10
mV
IOS
16
VREF = 2 V
−20
−5
−1
mA
Threshold
voltage
VTH
37
VCC =
2.6
2.8
3.0
V
Hysteresis
width
VH
37

0.2

V
Reset voltage
VRST
37
VCC =
1.20
1.30
1.40
V
Threshold
voltage
VTH
47
VCC =
1.35
1.5
1.65
V
Input standby
voltage
VSTB
15


50
100
mV
Charge current
ICS
15

−1.4
−1.0
−0.6
µA
Threshold
voltage
VTH
18

0.65
0.70
0.75
V
Input standby
voltage
VSTB
18


50
100
mV
VI
18


50
100
mV
Input source
current
ICSCP
18

−1.4
−1.0
−0.6
µA
Oscillator
frequency
fOSC
450
500
550
kHz
Frequency
stability for
voltage
∆f/fdv
37, 38, 39, 40, 41,
VCC = 4 V to 13 V
43, 45, 46, 47

1
10
%
Frequency
stability for
temperature
∆f/fdt
37, 38, 39, 40, 41,
Ta = −30 °C to +85 °C
43, 45, 46, 47

1*

%
Triangular
wave oscillator
block [OSC]
Short circuit
detection block
[SCP]
[CS]
Reference
voltage
block [REF]
Under voltage
lockout protection
circuit block [U.V.L.O]
Unit
Min.
Reference
voltage
Soft-start
block
Value
CH1 to CH5
Symbol
CH6
Parameter
Input latch
voltage

37, 38, 39, 40, 41, CT = 100 pF, RT = 18 kΩ
43, 45, 46, 47
VB = 2 V
*: Standard design value.
(Continued)
11
MB3883
(Ta = +25 °C, VCC = 5 V)
Parameter
Threshold voltage
Error amplifier block
(CH1 to CH5)
[Error Amp.]
VT temperature
stability
Input bias current
Conditions
Unit
Typ.
Max.
1.23
1.25
1.27
V

0.5*

%
−IN = 0 V
(CH1 to CH3, CH5)
−320
−80

nA
−IN = 0 V
(CH4)
−120
−30

nA
∆VT/VT 35, 32, 29, 11, 7 Ta = −30 °C to +85 °C
IB
Value
Min.
35, 32, 29, 11, 7 FB = 1.45 V
12
Voltage gain
AV
35, 32, 29, 11, 7 DC
60
100

dB
Frequency bandwidth
BW
35, 32, 29, 11, 7 AV = 0 dB

1.0*

MHz
VOH
35, 32, 29, 11, 7

2.2
2.4

V
VOL
35, 32, 29, 11, 7


50
200
mV
ISOURCE 35, 32, 29, 11, 7 FB = 1.45 V

−2.0
−1.0
mA
35, 32, 29, 11, 7 FB = 1.45 V
70
140

µA
1.24
1.26
1.28
V

0.5*

%
−100
−20

nA
Output source current
Error amplifier bolck
(CH6)
[Error Amp.]
VTH
Pin No.
34, 31, 28, 8
Output voltage
Output sink current
ISINK
Threshold voltage
VTH
3
FB = 0.55 V
∆VT/VT
3
Ta = −30 °C to +85 °C
Input bias current
IB
4
−IN = 0 V
Voltage gain
AV
3
DC
60
75

dB
Frequency bandwidth
BW
3
AV = 0 dB

1.0*

MHz
VOH
3

1.1
1.3

V
VOL
3


0
200
mV
ISOURCE
3
FB = 0.55 V

−2.0
−1.0
mA
Output sink current
ISINK
3
FB = 0.55 V
60
120

µA
Input offset voltage
VIO
10
OUT = 1.25 V
−10
0
10
mV
Input bias current
IB
9
−IN = 0 V
−120
−30

nA
Voltage gain
AV
10
DC
60
100

dB
Frequency bandwidth
BW
10
AV = 0 dB

1.0*

MHz
VOH
10

2.2
2.4

V
VOL
10


50
200
mV
ISOURCE
10
OUT = 1.25 V

−2.0
−1.0
mA
ISINK
10
OUT = 1.25 V
70
140

µA
VT temperature
stability
Output voltage
Output source current
Inverting amplifier
bolck (CH4)
[Inv Amp.]
Symbol
Output voltage
Output source current
Output sink current
*: Standard design value.
(Continued)
12
MB3883
(Ta = +25 °C, VCC = 5 V)
Output block
Output block
Output block
PWM Comp. PWM Comp. block Short detection
comparator
(CH1 to CH5)
(CH6)
(CH1 to CH5)
(CH1, CH2, CH5)
block(CH6)
block
(CH6)
[PWM Comp.]
[Drive]
[Drive-2(Nch MOS)] [Drive-1(Pch MOS)] [PWM Comp.]
Short detection
comparator block
(CH1 to CH5)
[SCP Comp.]
Parameter
Threshold voltage
Symbol
Pin No.
VTH
37, 38, 39, 40,
41, 43, 45, 46
Threshold voltage
Input current
Threshold voltage
Maximum duty cycle
Output source
current
Output sink current
Output sink current
1.03
V
−IN = 0 V
(CH1 to CH3, CH5)
−320
−80

nA
−IN = 0 V (CH4)
−200
−50

nA
0.8
0.9
1.0
V
37, 39, 41, 43, 45 Duty cycle = 0 %
1.0
1.1

V
VT100
37, 39, 41, 43, 45 Duty cycle = 100 %

1.8
1.9
V
IDTC
36, 33, 30, 14, 6
DTC = 0.4 V
(CH1 to CH5)
−1.0
−0.3

µA
VT0
47
Duty cycle = 0 %
0.2
0.3

V
VTmax
47
Duty cycle = Max.

0.74
0.84
V
Dtr
47
CT = 100 pF, RT = 18 kΩ,
RB = 24 kΩ
70
80
90
%
ISOURCE
37, 39, 45
Duty ≤ 5 %, OUT = 0 V

−130

mA
ISINK
37, 39, 45
Duty ≤ 5 %, OUT = 5 V

100

mA
ROH
37, 39, 45
OUT = −15 mA

18
30
Ω
ROL
37, 39, 45
OUT = 15 mA

16
25
Ω
IB
VTH
VT0
47
Output sink current

ISOURCE
38, 40, 41, 43, 46 Duty ≤ 5 %, OUT = 0 V

−130

mA
ISINK
38, 40, 41, 43, 46 Duty ≤ 5 %, OUT = 5 V

100

mA
ROH
38, 40, 41, 43, 46 OUT = −15 mA

18
30
Ω
ROL
38, 40, 41, 43, 46 OUT = 15 mA

16
25
Ω
−2.0
−1.4
mA
40

mA
Output ON resistor
Output source
current
Unit
1.00
Output ON resistor
Output source
current
Min. Typ. Max.
0.97
13
Threshold voltage
Value
CH1 to CH5
34, 31, 28, 8
Input bias current
Conditions
ISOURCE
47
RB = 24 kΩ, OUT = 0.7 V −2.6
ISINK
47
Duty ≤ 5 %, OUT = 0.7 V

*: Standard design value.
(Continued)
13
MB3883
(Continued)
Parameter
Output switch control
block (Drive-1
[SW])
SW input voltage
Input current
Output source
current
Output sink current
General
Control block
(CTL, CTL1 to CTL5)
[CTL]
Output ON resistor
Symbol
Pin No.
VIH
5
VIL
Conditions
Value
Unit
Min.
Typ.
Max.
SWOUT = “L” level
1.5

9
V
5
SWOUT = “H” level
0

0.5
V
ISWIN
5
SWIN = 5 V

100
200
µA
ISOURCE
1
Duty ≤ 5 %,
SWOUT = 0 V

−9

mA
ISINK
1
Duty ≤ 5 %,
SWOUT = 5 V

17

mA
ROH
1
SWOUT = −4 mA

250
400
Ω
ROL
1
SWOUT = 4 mA

100
150
Ω
VIH
20, 21, 22,
23, 24
Active mode
1.5

9
V
VIL
20, 21, 22,
23, 24
Standby mode
0

0.5
V
ICTL
20, 21, 22,
23, 24
CTL = 5 V

100
200
µA
ICCS
19
CTL = 0 V


10
µA
ICCS (O)
42
CTL = 0 V


10
µA
ICC
19, 42
CTL = CTL1, 2 = CTL3
= CTL4 = CTL5 = 5 V

6
9
mA
CTL input voltage
Input current
Standby current
Power supply current
*: Standard design value.
14
(Ta = +25 °C, VCC = 5 V)
MB3883
■ TYPICAL CHARACTERISTICS
10
Ta = +25 °C
CTL = CTL1, 2 = CTL3 = CTL4 = CTL5 = 5 V
Reference voltage vs. power supply voltage
Reference voltage VREF (V)
Power supply current ICC (mA)
Power supply current vs. power supply voltage
8
6
4
2
5
Ta = +25 °C
CTL = CTL1, 2 = CTL3 = CTL4 = CTL5 = 5 V
VREF = 0 mA
4
3
2
1
0
0
0
2
4
6
8
0
10
Power supply voltage VCC (V)
2
4
6
8
10
Power supply voltage VCC (V)
Reference voltage vs. ambient temperature
Reference voltage VREF (V)
2.56
VCC = 5 V
CTL = CTL1, 2 = CTL3 = CTL4 = CTL5 = 5 V
VREF = 0 mA
2.54
2.52
2.5
2.48
2.46
2.44
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
5
Control current vs. control voltage
300
Ta = +25 °C
VCC = 5 V
VREF = 0 mA
4
Control current ICTL (µA)
Reference voltage VREF (V)
Reference voltage vs. control voltage
3
2
1
Ta = +25 °C
VCC = 5 V
250
200
CTL
150
CTL1, 2 ∼ CTL5
100
50
0
0
0
1
2
3
4
Control voltage VCTL (V)
5
0
2
4
6
8
10
Control voltage VCTL (V)
(Continued)
15
MB3883
1
Ta = +25 °C
0.9 VCC = 5 V
0.8 RT = 18 kΩ
Upper
0.7
0.6
0.5
0.4
Lower
0.3
Triangular wave upper and lower limit voltage
vs. ambient temperature
1
VCC = 5 V
0.9 RT = 18 kΩ
0.8 CT = 100 pF
Triangular wave upper and
lower limit voltage VCT (V)
Triangular wave upper and
lower limit voltage VCT (V)
Triangular wave upper and lower limit voltage
vs. triangular wave oscillator frequency
0.2
0.1
0.6
0.5
200
400
600
800
1000
Lower
0.4
0.3
0.2
0.1
0
0
Upper
0.7
0
−40
1200
−20
Triangular wave oscillator frequency
vs. timing capacitor
Triangular wave oscillator
frequency fOSC (kHz)
Triangular wave oscillator
frequency fOSC (kHz)
RT = 4.3 kΩ
10
10
RT = 18 kΩ
100
1000
60
10000
1000
RT = 100 kΩ
40
80
100
Triangular wave oscillator frequency
vs. timing resistor
Ta = +25 °C
VCC = 5 V
100
20
Ambient temperature Ta ( °C)
Triangular wave oscillator frequency fOSC (kHz)
10000
0
10000
Timing capacitor CT (pF)
Ta = +25 °C
VCC = 5 V
1000
CT = 47 pF
100
CT = 1000 pF
CT = 100 pF
CT = 470 pF CT = 220 pF
10
1k
10 k
100 k
1M
Timing resistor RT (Ω)
Triangular wave oscillator frequency
vs. ambient temperature
Triangular wave oscillator
frequency fOSC (kHz)
560
VCC = 5 V
CTL = CTL1, 2 = CTL3 = CTL4 = CTL5 = 5 V
RT = 18 kΩ
CT = 100 pF
540
520
500
480
460
440
−40
−20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
(Continued)
16
MB3883
(Continued)
Error amplifier gain and phase vs. frequency (CH1)
Ta = +25 °C
40
VCC = 5 V
180
20
90
φ
0
0
AV
−90
−20
Phase φ (deg)
Gain AV (dB)
240 kΩ
10 kΩ
IN − +
1 µF
−
+
+
34
2.4 kΩ
10 kΩ
35
OUT
Error Amp.1
1.25 V
CS CTL Logic
−180
−40
1k
10 k
100 k
1M
10 M
Frequency f (Hz)
Error amplifier gain and phase vs. frequency (CH6)
Ta = +25 °C
40
VCC = 5 V
180
20
90
φ
0
0
AV
−20
−90
−40
−180
1k
10 k
100 k
1M
Phase φ (deg)
Gain AV (dB)
240 kΩ
IN
10 kΩ
− +
1 µF
4
2.4 kΩ
10 kΩ
VB
−
+
+
3
OUT
Error Amp.6
1.26 V
CS CTL Logic
10 M
Frequency f (Hz)
Power dissipation vs. ambient temperature
(BCC-48P)
Power dissipation vs. ambient temperature
(LQFP-48P)
1000
Power dissipation PD (mW)
Power dissipation PD (mW)
1000
860
800
600
400
200
0
−40
−20
0
20
40
60
Ambient temperature Ta ( °C)
80
100
800
710
600
400
200
0
−40
−20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
17
MB3883
■ FUNCTIONS
1. DC-DC Converter Functions
(1) Reference voltage block
The reference voltage circuit generates a temperature-compensated reference voltage (typically =: 2.49 V) from
the voltage supplied from the power supply terminal (pin 19). The voltage is used as the reference voltage for
the IC’s internal circuitry.
The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal
(pin 16).
(2) Triangular-wave oscillator block
The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to
the CT terminal (pin 26) and RT terminal (pin 25) to generate triangular oscillation waveform CT (amplitude of
0.3 V to 0.8 V), CT1 (amplitude 1.1 V to 1.8 V in phase with CT), or CT2 (amplitude 1.1 V to 1.8 V in inverse
phase with CT).
CT1 and CT2 are input to the PWM comparator in the IC.
(3) Error amplifier (Error Amp.) block
The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. It supports
a wide range of in-phase input voltages from 0 V to “VCC - 1.8 V” (channels 1 to 5), or 0 V to “Vcc-0.9 V”(channel6)
allowing easy setting from the external power supply.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output
pin to inverted input pin of the error amplifier, enabling stable phase compensation to the system.
(4) Inverting amplifier (Inv Amp.) block
The inverting amplifier detects the DC/DC converter output voltage (as a negative voltage) and outputs a control
signal to the error amp.
(5) PWM comparator (PWM Comp.) block
The PWM comparator is a voltage-to-pulse width converter for controlling the output duty depending on the input
voltage.
Channels 1, 2, and 5 main sides,channel 3,4, and 6 : The comparator keeps the output transistor on while the
error amplifier output voltage and DTC voltageremain
higher than the triangular wave voltage.
Channels 1, 2, and 5 synchronous rectification sides : The comparator keeps the output transistor on while the
error amplifier output voltage remain lower than the triangular wave voltage.
(6) Output block
The output block on the main side and on the synchronous rectification side is both in the totem pole configuration,
capable of driving an external P-channel MOS FET (channels 1, 2 main sides, channel 5 synchronous rectification
side), NPN transistor (channel 6), and N-channel MOS FET (channels 3, 4, channel 5 main side, channels 1, 2
synchronous rectification sides).
18
MB3883
2. Channel Control Function
Channels are turned on and off depending on the voltage levels at the CTL terminal (pin 20), CTL1, 2 terminal
(pin 21), CTL3 terminal (pin 22), CTL4 terminal (pin 23), and CTL5 terminal (pin 24).
Channel On/Off Setting Conditions
Voltage level at CTL pin
Channel on/off state
CTL
CTL1, 2
CTL3
CTL4
CTL5
L
×
×
×
×
L
L
H
L
L
H
H
H
L
L
H
H
L
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Power/CH6
CH1, CH2
CH3
CH4
CH5
OFF (Standby state)
OFF
OFF
ON
OFF
OFF
ON
ON
ON
OFF
OFF
ON
ON
OFF
ON
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
× : Undefined
3. Protective Functions
(1) Timer-latch short-circuit protection circuit
The short-circuit detection comparator in each channel detects the output voltage level and, if any channel output
voltage falls below the short-circuit detection voltage, the timer circuits is actuated to start charging the external
capacitor CSCP connected to the CSCP terminal (pin 18).
When the capacitor voltage reaches about 0.70 V, the circuit is turned off the output transistor and sets the dead
time to 100 %.
To reset the actuated protection circuit, turn the power supply on back. (See “SETTING TIME CONSTANT FOR
TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”.)
(2) Undervoltage lockout protection circuit
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, the undervoltage lockout protection circuit detects a decrease in internal reference voltage with
respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding
the CSCP terminal (pin 18) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the
undervoltage lockout protection circuit.
(3) Output switch control circuit
When the power is turned on, this circuit prevents reactive current flow to external step-up circuits on CH5 and
CH6. When the SWIN terminal (pin 2) is a state at “H” level after releasing UVLO and the C+IN6 terminal (pin5)
voltage goes above 0.9 V (Typ.), the SWOUT terminal (pin 1) becomes “L” level. External P-ch MOS FET is
turned on at this time and the output voltage is generated.
19
MB3883
4. Soft Start Operation
1. Description
• When the CTL, CTL1,2, CTL3, CTL4, and CTL5 terminals are driven high (“H” level) at the same time
The capacitor (C+IN6) connected to the C+IN6 terminal (pin 5) starts charging. When the C+IN6 terminal voltage
falls below 0.9 V (Typ.), the capacitor (Cs) connected to the CS terminal (pin 15) starts charging and the error
amp. provides a soft start by comparing the CH1 to CH5 output voltage to the voltage at the CS terminal.
Input
CTL (pin 20)
CTL1, 2 (pin 21)
CTL3 (pin 22)
CTL4 (pin 23)
CTL5 (pin 24)
Output
2V
VB (pin 27)
0.9 V
C+IN6 (pin 5)
CH6 output voltage
Vo6
2.49 V
VREF (pin 16)
1.25 V
CS (pin15)
CH1 to CH5 output
voltage Vo1 to Vo5
t
(1)
(3) (2)
(1) to (2) : CH6 soft start interval
(3) to (4) : CH1 to CH5 soft start interval
20
(4)
MB3883
• After a CH6 soft start, when the CTL1, 2, CTL3, CTL4, and CTL5 terminals are driven high
The capacitor (Cs) connected to the CS terminal (pin 15) starts charging and the error amp provides a soft start
by comparing the CH1 to CH5 output voltage to the voltage at the CS terminal.
Input
CTL ( pin 20)
CTL1, 2 ( pin 21)
CTL3 ( pin 22)
CTL4 ( pin 23)
CTL5 ( pin 24)
Output
2V
VB ( pin 27)
0.9 V
C+IN6 ( pin 5)
CH6 output voltage
Vo6
2.49 V
VREF ( pin 16)
1.25 V
CS ( pin 15)
1.25 V
CH1 to CH3 output
voltage Vo1 to Vo3
CH4, CH5 output
voltage Vo4, Vo5
t
(1)
(3) (2)
(5)
(4)
(6)’
(1) to (2)
(3)
(4) to (5)
(6) to (7)
(6)’ to (7)’
(6)
(7)
(7)’
: CH6 soft start interval
: VREF Output start
: CH1 to CH3 soft start interval
: CH4, CH5 soft start interval
: CH4 (CH5) soft start interval (waveform) as CTL4 (CTL5) go “H”
from “L” during CH1 to CH3 soft start interval
Note : Each of the terminals CTL1,2, CTL3, CTL4, and CTL5 can be switched on or off independently. When any of
these CTL terminals is switched on, a soft start operation is provided as shown in the above timing chart.
21
MB3883
2. Soft Start Settings
• CH6 soft start time
The soft start operation is determined by the capacitor (C+IN6) connected to the C+IN6 terminal (pin 5). The
soft start time depends on the input voltage and load current.
CH6 soft start time
ts (s) = − C+IN6 (F) × 37.5 (kΩ) × 62.5 (kΩ) ln
100 (kΩ)
(
1−
VC+IN6 (V)
1.26 (V)
Error
Amp.6
(VB : 2 V)
VC+IN6
−
(37.5 kΩ)
C+IN6
+
5
(1.26 V)
C+IN6
)
(62.5 kΩ)
CH6 soft start equivalent circuit
Example: The soft start time until CH6 output voltage reaches 95% of the set voltage is determined as follows:
ts (s) =: 0.07 × C+IN6 (µF)
• CH1 to CH5 soft start time
CH1 to CH5 soft start time
ts (s) =: 1.25 × CS (µF)
Note : The short-circuit detection function remains working during soft start operation on channels 1 through 5.
■ SETTING THE TRIANGULAR OSCILLATOR FREQUENCY
The triangular oscillator frequency is determined by the timing capacitor (CT) connected to the CT terminal (pin
26), and the timing resistor (RT) connected to the RT terminal (pin 25).
Triangular oscillator frequency
fOSC (kHz) =:
22
900000
CT (pF) •RT (kΩ)
MB3883
■ SETTING THE OUTPUT VOLTAGE
• CH1 to CH3, CH5
VO
FB1
35
−
+
+
34
R2
1.25 V
(R1 + R2 )
R2
VO =
V−IN (A) 4 − VOUT (A) 4
R1
R2
Error
Amp.1
R1
−IN1
VO =
1.25 V
−
+
+
SCP
Comp.1
1.0 V
• CH4
VO
R1
−IN (A) 4
9
−
INV
Amp.4
[ VOUT (A) 4 = V−IN4 ]
+
R2
OUT (A) 4
10
R3
FB4 11
12
−IN4
Error
Amp.4
−
+
+
1.25 V
23
MB3883
• CH6
VO
FB6
VO =
3
Error
Amp.6
(VB : 2 V)
R1
−
4
37.5 kΩ
−IN6
R2
1.26 V
+
62.5 kΩ
C+IN6
5
24
1.26 V
R2
(R1 + R2)
MB3883
■ SETTING THE OUTPUT CURRENT
The output circuit (drive 6) is structured as illustrated below (in the output circuit diagram). As found in “Output
Current Waveform” below, the source current value of the output current waveform has a constant current setting.
Note that the source current is set by the following equation:
• Output source current = (VB / RB) × 80 (A)
42 VCC (O)
80 I
Source current
External NPN transistor
Output source
current
× 33
47
OUT6
Output sink
current
I
Sink current
70 kΩ
× 33
48
RB6
0.6 V
RB
VB
44 GND (O)
In the output circuit diagram
Output source current (Peak)
Output current
Output source
current
0
Output sink current (Peak)
t
Output current waveform
25
MB3883
■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
The short detection comparator (SCP comparator) in each channel monitors the output voltage.
While the switching regulator load conditions are stable on all channels, the LOG_SCP output remains at “H”
level, transistor Q1 is turned on, and the CSCP terminal (pin 18) is held at “L” level.
If the load condition on a channel changes rapidly due to a short of the load, causing the output voltage to drop,
the output of the short detection comparator on that channel goes to “H” level. This causes transistor Q1 to be
turned off and the external short protection capacitor CSCP connected to the CSCP terminal to be charged at 1.0
µA.
Short detection time (tPE)
tPE (s) =: 0.70 × CSCP (µF)
When the capacitor CSCP is charged to the threshold voltage (VTH =: 0.70 V), the latch is set and the external
FET is turned off (dead time is set to 100%). At this point, the latch input is closed and the CSCP terminal is
held at “L” level.
External FET
A
R1
−
34
−IN1
SCP
Comp.1
Drive
1−1
+
R2
37
OUT1−1
1.0 V
Drive
1−2
−
+
38
OUT1−2
SCP
Comp.6
LOG_SCP
0.9 V
Drive
6
1 µA
CSCP
bias
bias
18
CSCP
Q1
R
S
Timer-latch short
protection circuit
UVLO
Ref
Power
ON/OFF CTL
Timer-latch short circuit protection circuit
26
47
OUT6
20
CTL
MB3883
■ TREATMENT WITHOUT USING CSCP
When not using the timer-latch short protection circuit, connect the CSCP terminal (pin 18) to GND with the
shortest distance.
CSCP
18
Treatment without using CSCP
■ OPERATING WITHOUT THE SOFT START FUNCTION
To disable the CH1 to CH5 soft start function, leave the CS terminal (pin 15) open.
To disable the CH6 soft start function, leave the C+IN6 terminal (pin 5) open.
“Open”
CS
15
“Open”
5
C+IN6
When no soft start time is set
27
MB3883
■ SETTING THE DEAD TIME
When the device is set for step-up inverted output based on the step-up or step-up/down Zeta method or flyback
method, the FB pin voltage may reach and exceed the rectangular wave voltage due to load fluctuation. If this
is the case, the output transistor is fixed to a full-ON state (ON duty = 100 %). To prevent this, set the maximum
duty of the output transistor. To set it, set the voltage at the DTC1 terminal (pin 36) by applying a resistive voltage
divider to the VREF voltage as shown below.
When the voltage at the DTC1 terminal (pin 36) is higher than the triangular wave voltage (CT1), the output
transistor is turned on. The maximum duty calculation formula assuming that triangular wave amplitude =: 0.7
V and triangular wave minimum voltage =: 1.1 V is given below. (Same to other channels.)
DUTY (ON) max=:
Vdt − 1.1 V
× 100 (%) , Vdt =
0.7 V
Rb
Ra + Rb
× VREF
When the DTC1 terminal is not used, connect it directly to the VREF terminal (pin 16) as shown below (when
no dead time is set). (Same to other channels.)
VREF
16
DTC1
36
Ra
Rb
Vdt
When using DTC to set dead time (Same to other channels.) ( CH1)
VREF
16
DTC1
36
When no dead time is set ( Same to other channels.) ( CH 1)
28
MB3883
■ TREATMENT WITHOUT USING CH4 INV Amp.
When not using the CH4 INV Amp., connect the -IN(A)4 terminal (pin 9) to the OUT(A)4 terminal (pin 10) with
the shortest distance.
9 −IN(A)4
10 OUT(A)4
Treatment without using CH4 INV Amp.
29
MB3883
■ APPLICATION EXAMPLE
VCC (O)
42
A
FB1
R12
35
C23
2.7 kΩ
0.1 µF
R13
R6
22 kΩ
1 kΩ
34
−IN1
R14
15 kΩ
R15
24 kΩ
C17
2.2 µF
OUT1-2
38
C10
3300 pF
R24
24 kΩ
E
R26
120 kΩ
C18
2.2 µF
OUT2-2
40
CH2
C11
2700 pF
Vo2
(2.5 V)
(150 mA)
L4
22 µH
L3
22 µH
R2
300 Ω
OUT2-1
39
C4
4.7 µF
D2
Q4
Vo6
(5.0 V)
C
D3
4
CH3
6
8
1
7
D4
OUT3
41
C6
1 µF
Q5
DTC3
30
R25
47 kΩ
<CCD>
Vo3-1
(15 V)
(12 mA)
Vo3-2
(−7.5 V)
(2.5 mA)
C5
1 µF
5
3
2
C19
2.2 µF
VREF
D
R3
18 kΩ
−IN (A) 4
Q7
9
R27
VIN
10 kΩ OUT (A) 4
(1.8 V ~
10
5.0 V)
FB4
R28
11
10 kΩ 0.1C26
µF
R9
1 kΩ
12
−IN4
D
R4
27 kΩ
E
C7 Vo6
D5 1 µF (5.0 V)
5
1
CH4
3
2 D6
6
C20
2.2 µF
C8
1 µF
C9
1 µF
4
7
OUT4
43
13
R29 −IN (S) 4
47 kΩ
R30
DTC4
24 kΩ
14
R31
47 kΩ
D7
8
Q6
L5
15 µH F
FB5
F
R32
7
C27
15 kΩ 0.1 µF
R33
R10
30 kΩ 1 kΩ
8
−IN5
R34
15 kΩ
R35
24 kΩ
C3
4.7 µF B
Q2
FB2
C24
B
32
R17 0.1 µF
15 kΩ
R7
1 kΩ
31
−IN2
R18
15 kΩ
R19
DTC2
24 kΩ
33
R20
47 kΩ
FB3
C
29
R21
C25
15 kΩ 0.1 µF
R22
R8
150 kΩ
1 kΩ
28
−IN3
R23
15 kΩ
C2
4.7 µF
D1
Q3
DTC1
36
R16
47 kΩ
Vo1
(3.3 V)
(250 mA)
L2
22 µH
L1
15 µH
R1
150 Ω
OUT1-1
37
CH1
C1
4.7 µF A
Q1
Q10
Vo5
(5.0 V)
(100 mA)
D8
OUT5-1
45
<LCD>
Vo4-3
(−15 V)
(4 mA)
Vo4-2
(6.5 V)
(6 mA)
Vo4-1
(13.5 V)
(2.7 mA)
Q9
Q8
C21
2.2 µF
CH5
C12
4.7 µF
C13
2.2 µF
OUT5-2
46
DTC5
6
R36
47 kΩ
L6
22 µH
G
G
FB6
3
R37
C28
15 kΩ 0.1 µF
R38
R11
30 kΩ 1 kΩ
4
−IN6
R39
15 kΩ
Vo6
(5.0 V)
Q12
D9
C22
2.2 µF
OUT6
47
RB6 Q11
48
CH6
C14
4.7 µF
C15
2.2 µF
C16
56 pF
C+IN6
5
R5
20 kΩ
SWOUT
C29
0.33 µF
1
44
CTL1, 2 21
CTL4 23
2 SWIN
VCC
19
(5.0 V)
CTL5 24
20 CTL
CTL3 22
15
CS
C30
0.1 µF
27 25
VB RT
26
18
CT CSCP
C31 R40
C32
0.1 µF 18 kΩ 100 pF
30
GND (O)
16
C33
0.1 µF
VREF
H: SWOUT = L
L: SWOUT = H
H : ON (Power/CH6)
L : OFF (Standby mode)
17
GND
(48 Pin)
MB3883
• Application example (Expansion1/2)
A
FB1
R12
35
C23
2.7 kΩ
0.1 µF
R13
R6
22 kΩ
1 kΩ
34
−IN1
R14
15 kΩ
R15
24 kΩ
VCC (O)
42
OUT1-1
37
CH1
C17
2.2 µF
OUT1-2
38
R1
150 Ω
C10
3300 pF
OUT2-1
39
CH2
C18
2.2 µF
OUT2-2
40
C3
4.7 µF B
R2
300 Ω
C11
2700 pF
Vo2
(2.5 V)
(150 mA)
L4
22 µH
L3
22 µH
C4
4.7 µF
D2
Q4
Vo6
(5.0 V)
C
D3
4
C19
2.2 µF
CH3
6
3
2
8
1
7
D4
OUT3
41
C6
1 µF
Q5
DTC3
30
VREF
D
−IN (A) 4
R3
18 kΩ
Q7
9
R27
VIN
10 kΩ OUT (A) 4
(1.8 V ~
10
5.0 V)
FB4
R28
11
C26
10 kΩ 0.1 µF
R9
1 kΩ
12
−IN4
D
13
R29 −IN (S) 4
47 kΩ
R30
DTC4
24 kΩ
14
R31
47 kΩ
E
C7 Vo6
D51 µF (5.0 V)
5
1
CH4
3
2 D6
6
C20
2.2 µF
4
OUT4
43
7
8
Q6
<CCD>
Vo3-1
(15 V)
(12 mA)
Vo3-2
(−7.5 V)
(2.5 mA)
C5
1 µF
5
R25
47 kΩ
E
R26
120 kΩ
C2
4.7 µF
D1
Q3
Q2
FB2
C24
B
32
R17 0.1 µF
15 kΩ
R7
1 kΩ
31
−IN2
R18
15 kΩ
R19
DTC2
24 kΩ
33
R20
47 kΩ
FB3
C
29
R21
C25
15 kΩ 0.1 µF
R22
R8
150 kΩ
1 kΩ
28
−IN3
R23
15 kΩ
Vo1
(3.3 V)
(250 mA)
L2
22 µH
L1
15 µH
DTC1
36
R16
47 kΩ
R24
24 kΩ
C1
4.7 µF A
Q1
D7
C8
1 µF
C9
1 µF
R4
27 kΩ
<LCD>
Vo4-3
(−15 V)
(4 mA)
Vo4-2
(6.5 V)
(6 mA)
Vo4-1
(13.5 V)
(2.7 mA)
31
MB3883
• Application example (Expansion 2/2)
L5
15 µH F
Vo5
(5.0 V)
(100 mA)
D8
FB5
F
R32
7
C27
15 kΩ 0.1 µF
R33
R10
30 kΩ 1 kΩ
8
−IN5
R34
15 kΩ
R35
24 kΩ
Q10
OUT5-1
45
Q9
Q8
C21
2.2 µF
CH5
C12
4.7 µF
C13
2.2 µF
OUT5-2
46
DTC5
6
R36
47 kΩ
L6
22 µH
G
G
FB6
3
R37
C28
15 kΩ 0.1 µF
R38
R11
30 kΩ 1 kΩ
4
−IN6
R39
15 kΩ
Vo6
(5.0 V)
Q12
OUT6
47
RB6 Q11
48
CH6
D9
C22
2.2 µF
C14
4.7 µF
C15
2.2 µF
C16
56 pF
C+IN6
5
R5
20 kΩ
SWOUT
C29
0.33 µF
1
44
CTL1, 2 21
CTL4 23
2 SWIN
VCC
19
(5.0 V)
CTL5 24
20 CTL
CTL3 22
15
CS
C30
0.1 µF
27 25
VB RT
26
18
CT CSCP
C31 R40
C32
0.1 µF 18 kΩ 100 pF
32
GND (O)
16
C33
0.1 µF
VREF
H: SWOUT = L
L: SWOUT = H
H : ON (Power/CH6)
L : OFF (Standby mode)
17
GND
(48 Pin)
MB3883
■ PARTS LIST
COMPONENT
ITEM
SPECIFICATION
VENDOR
PARTS NO.
Q1, Q2
Q3 to Q6, Q8
Q9, Q10, Q12
Q7, Q11
PNP Tr
FET
FET
NPN Tr
VCEO = −12 V
VDSS = 30 V
VDSS = −20 V
VCEO = 15 V
SANYO
Fairchild
SANYO
SANYO
CPH3106
NDS355AN
CPH3303
CPH3206
D1, D2, D8, D9
D3 to D7
Diode
Diode
VF = 0.40 V (Max.) , IF = 1 A
VF = 0.55 V (Max.) , IF = 500 mA
SANYO
SANYO
SBS004
SB05-05CP
L1, L5
L2 to L6
Coil
Coil
15 µH
22 µH
1 A, 74.5 mΩ
0.77 A, 104 mΩ
TDK
TDK
SLF6028T-150M1R0
SLF6028T-220MR77
C1 to C4
C5 to C9
C10
C11
C12, C14
C13, C15
C16
C17 to C22
C23 to C28
C29
C30, C31, C33
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
Ceramics Condensor
4.7 µF
1 µF
3300 pF
2700 pF
4.7 µF
2.2 µF
56 pF
2.2 µF
0.1 µF
0.33 µF
0.1 µF
10 V
25 V
50 V
50 V
10 V
16 V
50 V
16 V
16 V
10 V
16 V
R1
R2
R3
R4
R5
R8 to R11
R12
R13
R14
R15, R19, R24
R16, R20, R25
R17, R18, R21
R22
R23, R39
R26
R27, R28
R29, R31, R36
R30, R35
R32, R34, 37
R33, R38
R40
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
150 Ω
300 Ω
18 kΩ
27 kΩ
20 kΩ
1 kΩ
2.7 kΩ
22 kΩ
15 kΩ
24 kΩ
47 kΩ
15 kΩ
150 kΩ
15 kΩ
120 kΩ
10 kΩ
47 kΩ
24 kΩ
15 kΩ
30 kΩ
18 kΩ
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
1/16 W
Note : SANYO : SANYO Electric Co., Ltd.
Fairchild : Fairchild Semiconductor Corporation
TDK : TDK Corporation
33
MB3883
■ REFERENCE DATA
Conversion efficiency vs. load current
(CH1 : Zeta method with synchronous rectification)
Iin
90
86
R1
82 Ω
To OUT1-1
84
C17
2.2 µF
82
80
C1
4.7 µF A
L1
10 µH
Vin
88
Conversion efficiency η (%)
Q1
IL
C10
3300 pF
Vin = 2.5 V
Vin = 3 V
Vin = 3.6 V
Vin = 4.2 V
76
74
D1
Q3
To OUT1-2
78
Vo1
(3.3 V)
L2
22 µH
η (%) =
C2
4.7 µF
Vo1 × IL
× 100
Vin × Iin
Ta = +25 °C
3.3 V output
VCC = VCC(O) = 5 V
72
70
0
50
100 150 200 250 300 350 400 450 500
Load current IL (mA)
Conversion efficiency vs. load current
(CH2 : Zeta method with synchronous rectification)
Iin
90
86
To OUT2-1
84
C18
2.2 µF
82
80
C3
4.7 µF B
L3
15 µH
Vin
88
Conversion efficiency η (%)
Q2
R2
110 Ω
IL
C11
3300 pF
Q4
To OUT2-2
78
Vin = 2.5 V
Vin = 3 V
Vin = 3.6 V
Vin = 4.2 V
76
74
Vo2
(2.5 V)
L4
22 µH
η (%) =
D2
C4
4.7 µF
Vo2 × IL
× 100
Vin × Iin
Ta = +25 °C
2.5 V output
VCC = VCC(O) = 5 V
72
70
0
50
100 150 200 250 300 350 400 450 500
Load current IL (mA)
Note : The above application uses a constant of
Vin=2.5 V, with settings made at maximum load.
(Continued)
34
MB3883
(Continued)
Conversion efficiency vs. load current
(CH5 : Up conversion method with synchronous rectification)
Iin
100
Ta = +25 °C
5 V output
VCC = VCC(O) = 5 V
Conversion efficiency η (%)
99
98
L5
10 µH F
Q10
Vin
Q9
To OUT5-1
Q8
C21
2.2 µF
97
96
Vo5
(5.0 V)
D8
IL
C12
4.7 µF
C13
2.2 µF
95
94
To OUT5-2
93
To SWOUT
η (%) =
92
Vin = 2.5 V
Vin = 3 V
Vin = 3.6 V
Vin = 4.2 V
91
90
0
50
100
150
200
250
Vo5 × IL
× 100
Vin × Iin
300
Load current IL (mA)
Note : The above application uses a constant of
Vin=2.5V, with settings made at maximum load.
35
MB3883
■ USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
•
•
•
•
Containers for semiconductor materials should have anti-static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ ORDERING INFORMATION
Part number
36
Package
MB3883PFV
48-pin plastic LQFP
(FPT-48P-M05)
MB3883PV
48-pad plastic BCC
(LCC-48P-M02)
Remarks
MB3883
■ PACKAGE DIMENSIONS
48-pin plastic LQFP
(FPT-48P-M05)
Note : Pins width and pins thickness include plating thickness.
9.00±0.20(.354±.008)SQ
7.00±0.10(.276±.004)SQ
36
0.145±0.055
(.006±.002)
25
24
37
0.08(.003)
Details of "A" part
+0.20
1.50 –0.10
+.008
.059 –.004
INDEX
13
48
"A"
0°~8°
LEAD No.
1
0.50(.020)
C
(Mounting height)
0.10±0.10
(.004±.004)
(Stand off)
12
0.20±0.05
(.008±.002)
0.08(.003)
M
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.25(.010)
2000 FUJITSU LIMITED F48013S-c-4-8
Dimensions in mm (inches)
(Continued)
37
MB3883
(Continued)
48-pin plastic BCC
(LCC-48P-M02)
6.15(.242)TYP
5.00(.197)TYP
7.00±0.10(.276±.004)
37
(0.80(.031)MAX)
(Total height)
25
0.50(.020)
TYP
0.50±0.10
(.020±.004)
"C"
25
37
0.085±0.040
(.003±.002)
(Stand off)
7.00±0.10
(.276±.004)
0.50(.020)
TYP
6.15(.242)
TYP
5.00(.197)
TYP
0.50±0.10
(.020±.004)
6.20(.244)
TYP
48
48
13
1
13
Details of "A" part
0.05(.002)
C0.2(.008)
0.45±0.10
(.018±.004)
C
1
"B"
6.20(.244)TYP
Details of "B" part
0.45±0.10
(.018±.004)
0.40±0.10
(.016±.004)
0.30±0.10
(.012±.004)
"A"
Details of "C" part
0.45±0.10
(.018±.004)
0.45±0.10
(.018±.004)
1998 FUJITSU LIMITED C48055SC-1-1
Dimensions in mm (inches)
38
MB3883
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
Shinjuku Dai-Ichi Seimei Bldg. 7-1,
Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0721, Japan
Tel: +81-3-5322-3347
Fax: +81-3-5322-3386
http://edevice.fujitsu.com/
North and South America
FUJITSU MICROELECTRONICS, INC.
3545 North First Street,
San Jose, CA 95134-1804, U.S.A.
Tel: +1-408-922-9000
Fax: +1-408-922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: +1-800-866-8608
Fax: +1-408-922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Am Siebenstein 6-10,
D-63303 Dreieich-Buchschlag,
Germany
Tel: +49-6103-690-0
Fax: +49-6103-690-122
http://www.fujitsu-fme.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
#05-08, 151 Lorong Chuan,
New Tech Park,
Singapore 556741
Tel: +65-281-0770
Fax: +65-281-0220
http://www.fmap.com.sg/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
1702 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100
Fax: +82-2-3484-7111
F0101
 FUJITSU LIMITED Printed in Japan
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The contents of this document may not be reproduced or copied
without the permission of FUJITSU LIMITED.
FUJITSU semiconductor devices are intended for use in standard
applications (computers, office automation and other office
equipments, industrial, communications, and measurement
equipments, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage, or
where extremely high levels of reliability are demanded (such as
aerospace systems, atomic energy controls, sea floor repeaters,
vehicle operating controls, medical devices for life support, etc.)
are requested to consult with FUJITSU sales representatives before
such use. The company will not be responsible for damages arising
from such use without prior approval.
Any semiconductor devices have inherently a certain rate of failure.
You must protect against injury, damage or loss from such failures
by incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Control Law of Japan, the
prior authorization by Japanese government should be required for
export of those products from Japan.