FUJITSU MB85R1001A

FUJITSU SEMICONDUCTOR
DATA SHEET
DS501-00003-0v01-E
Memory FRAM
CMOS
1 M Bit (128 K × 8)
MB85R1001A
■ DESCRIPTIONS
The MB85R1001A is an FRAM (Ferroelectric Random Access Memory) chip consisting of 131,072
words × 8 bits of nonvolatile memory cells created using ferroelectric process and silicon gate CMOS process
technologies.
The MB85R1001A is able to retain data without using a back-up battery, as is needed for SRAM.
The memory cells used in the MB85R1001A can be used for 1010 read/write operations, which is a significant
improvement over the number of read and write operations supported by Flash memory and E2PROM.
The MB85R1001A uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM.
■ FEATURES
•
•
•
•
•
•
Bit configuration
Read/write endurance
Operating power supply voltage
Operating temperature range
Data retention
Package
: 131,072 words × 8 bits
: 1010 times
: 3.0 V to 3.6 V
: − 40 °C to + 85 °C
: 10 years ( + 55 °C)
: 48-pin plastic TSOP (1)
Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2011.1
MB85R1001A
■ PIN ASSIGNMENTS
(TOP VIEW)
A11
A9
NC
A8
A13
WE
CE2
A15
NC
VDD
NC
NC
VSS
NC
NC
VDD
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE
NC
VSS
A10
CE1
NC
I/O8
I/O7
I/O6
I/O5
I/O4
VDD
NC
I/O3
I/O2
I/O1
NC
NC
NC
A0
A1
VSS
A2
A3
(FPT-48P-M48)
■ PIN DESCRIPTIONS
Pin Number
Pin Name
1, 2, 4, 5, 8, 18 to 26, 28, 29, 45
A0 to A16
33 to 35, 38 to 42
I/O1 to I/O8
Data Input/Output pins
44
CE1
Chip Enable 1 Input pin
7
CE2
Chip Enable 2 Input pin
6
WE
Write Enable Input pin
48
OE
Output Enable Input pin
10, 16, 37
VDD
Supply Voltage pins
13, 27, 46
VSS
Ground pins
3, 9, 11, 12, 14, 15, 17, 30 to
32, 36, 43, 47
NC
No Connect pins
2
Functional Description
Address Input pins
DS501-00003-0v01-E
MB85R1001A
■ BLOCK DIAGRAM
Address Latch
to
·
·
·
Row Decoder
A0
FRAM Array
131,072 × 8
A16
Column Decoder
intCE2
S/A
intCE2
CE2
intOE
intWE
intCE2
intCEB
I/O1 to I/O8
WE
OE
I/O8
CE1
·
·
intCEB
to
I/O1
■ FUNCTIONAL TRUTH TABLE
Operation Mode
Standby Precharge
Read
Read
(Pseudo-SRAM, OE control*1)
CE1
CE2
WE
OE
H
X
X
X
X
L
X
X
X
X
H
H
H
L
H
L
L
H
L
Hi-Z
Standby
(ISB)
H
L
Operation
(ICC)
H
L
Write
(Pseudo-SRAM, WE control*2)
Supply Current
Data Output
H
Write
I/O1 to I/O8
Data Input
H
H
Note: L = VIL, H = VIH, X can be either VIL or VIH, Hi-Z = High Impedance
: Latch address and latch data at falling edge,
: Latch address and latch data at rising edge
*1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read.
*2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write.
DS501-00003-0v01-E
3
MB85R1001A
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Min
Max
Unit
Power Supply Voltage*
VCC
− 0.5
+ 4.0
V
Input Pin Voltage*
VIN
− 0.5
VCC + 0.5 ( ≤ 4.0)
V
VOUT
− 0.5
VCC + 0.5 ( ≤ 4.0)
V
TA
− 40
+ 85
°C
Tstg
− 40
+ 125
°C
Output Pin Voltage*
Operating Temperature
Storage Temperature
* : All voltages are referenced to VSS (ground 0 V).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Value
Symbol
Min
Typ
Max
Unit
Power Supply Voltage*
VCC
3.0
3.3
3.6
V
High Level Input Voltage*
VIH
VCC × 0.8
⎯
VCC + 0.5( ≤ 4.0)
V
Low Level Input Voltage*
VIL
− 0.5
⎯
+ 0.6
V
Operating Temperature
TA
− 40
⎯
+ 85
°C
* : All voltages are referenced to VSS (ground 0 V).
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
4
DS501-00003-0v01-E
MB85R1001A
■ ELECTRICAL CHARACTERISTICS
1. DC Characteristics
Parameter
Symbol
Condition
(within recommended operating conditions)
Value
Unit
Min
Typ
Max
Input Leakage Current
|ILI|
VIN = 0 V to VCC
⎯
⎯
TBD
μA
Output Leakage Current
|ILO|
VOUT = 0 V to VCC,
CE1 = VIH or OE = VIH
⎯
⎯
TBD
μA
Operating Power Supply
Current
ICC
CE1 = 0.2 V, CE2 = VCC−0.2 V,
Iout = 0 mA*1
⎯
TBD
TBD
mA
⎯
TBD
TBD
μA
VCC ×
0.8
⎯
⎯
V
⎯
⎯
0.4
V
CE1 ≥ VCC−0.2 V
Standby Current
ISB
CE2 ≤ 0.2 V*2
OE ≥ VCC−0.2 V, WE ≥ VCC−0.2 V*2
High Level Output Voltage
VOH
IOH = −1.0 mA
Low Level Output Voltage
VOL
IOL = 2.0 mA
*1 : During the measurement of ICC, the Address, Data In were taken to only change once per active cycle.
Iout: output current
*2 : All pins other than setting pins should be input at the CMOS level voltages such as H ≥ VCC − 0.2 V, L ≤ 0.2 V.
DS501-00003-0v01-E
5
MB85R1001A
2. AC Characteristics
• AC Test Conditions
Supply Voltage
Operating Temperature
Input Voltage Amplitude
Input Rising Time
Input Falling Time
Input Evaluation Level
Output Evaluation Level
Output Impedance
: 3.0 V to 3.6 V
: −40 °C to +85 °C
: 0.3 V to 2.7 V
: 5 ns
: 5 ns
: 2.0 V / 0.8 V
: 2.0 V / 0.8 V
: 50 pF
(1) Read Cycle
(within recommended operating conditions)
Parameter
Symbol
Value
Min
Max
Unit
Read Cycle Time
tRC
150
⎯
ns
CE1 Active Time
tCA1
120
⎯
ns
CE2 Active Time
tCA2
120
⎯
ns
OE Active Time
tRP
120
⎯
ns
Precharge Time
tPC
20
⎯
ns
Address Setup Time
tAS
0
⎯
ns
Address Hold Time
tAH
50
⎯
ns
OE Setup Time
tES
0
⎯
ns
Output Hold Time
tOH
0
⎯
ns
Output Set Time
tLZ
30
⎯
ns
CE1 Access Time
tCE1
⎯
100
ns
CE2 Access Time
tCE2
⎯
100
ns
OE Access Time
tOE
⎯
100
ns
Output Floating Time
tOHZ
⎯
20
ns
(2) Write Cycle
(within recommended operating conditions)
Parameter
Symbol
Value
Min
Max
Unit
Write Cycle Time
tWC
150
⎯
ns
CE1 Active Time
tCA1
120
⎯
ns
CE2 Active Time
tCA2
120
⎯
ns
Precharge Time
tPC
20
⎯
ns
Address Setup Time
tAS
0
⎯
ns
Address Hold Time
tAH
50
⎯
ns
Write Pulse Width
tWP
120
⎯
ns
Data Setup Time
tDS
0
⎯
ns
Data Hold Time
tDH
50
⎯
ns
Write Setup Time
tWS
0
⎯
ns
6
DS501-00003-0v01-E
MB85R1001A
3. Pin Capacitance
Parameter
Input Capacitance
Output Capacitance
DS501-00003-0v01-E
Symbol
CIN
COUT
Condition
VIN = VOUT = 0 V,
f = 1 MHz, TA = +25 °C
Value
Unit
Min
Typ
Max
⎯
⎯
10
pF
⎯
⎯
10
pF
7
MB85R1001A
■ TIMING DIAGRAMS
1. Read Cycle Timing (CE1, CE2 Control)
tRC
tCA1
tPC
CE1
tCA2
CE2
tAS
A0 to A16
tAH
Valid
H or L
tES
tRP
OE
tCE1,
tCE2
tOH
tLZ
I/O1 to I/O8
tOHZ
Hi-Z
Valid
Invalid
Invalid
2. Read Cycle Timing (OE Control)
tCA1
CE1
CE2
tCA2
tAS
A0 to A16
tAH
Valid
H or L
tRC
tPC
tRP
OE
tOE
tOH
tLZ
I/O1 to I/O8
Hi-Z
Valid
Invalid
8
tOHZ
Invalid
DS501-00003-0v01-E
MB85R1001A
3. Write Cycle Timing (CE1, CE2 Control)
tWC
tCA1
tPC
CE1
CE2
tCA2
tAH
tAS
A0 to A16
Valid
H or L
tWS
tWP
WE
tDS
tDH
Hi-Z
Valid
Data In
H or L
4. Write Cycle Timing (WE Control)
tCA1
CE1
tCA2
CE2
tAS
A0 to A16
tAH
Valid
H or L
tWC
tWP
tPC
WE
tDS
tDH
Hi-Z
Data In
DS501-00003-0v01-E
Valid
H or L
9
MB85R1001A
■ POWER ON/OFF SEQUENCE
tpd
tr
tpu
VCC
VCC
CE2
CE2
3.0 V
3.0 V
VIH (Min)
VIH (Min)
1.0 V
1.0 V
VIL (Max)
VIL (Max)
CE2 ≤ 0.2 V
0V
0V
CE1 > VCC × 0.8*
CE1 : Don't Care
CE1 > VCC × 0.8*
CE1
CE1
* : CE1 (Max) < VCC + 0.5 V
Notes: • Use either of CE1 or CE2, or both for disable control of the device.
• Because turning the power-on from an intermediate level cause malfunction, when the
power is turned on, VCC is required to be started from 0 V.
• If the device does not operate within the specified conditions of read cycle, write cycle,
power on/off sequence, memory data can not be guaranteed.
• When turning the power on or off, it is recommended that CE2 is connected to ground to
prevent unexpected writing.
(within recommended operating conditions)
Parameter
Symbol
Value
Min
Typ
Max
Unit
CE1 level hold time for Power OFF
tpd
85
⎯
⎯
ns
CE1 level hold time for Power ON
tpu
85
⎯
⎯
ns
Power supply rising time
tr
0.05
⎯
200
ms
■ NOTES ON USE
After the IR reflow completed, it is not guaranteed to save the data written prior to the IR reflow.
10
DS501-00003-0v01-E
MB85R1001A
■ ORDERING INFOMATION
Part Number
TBD
Package
48-pin plastic TSOP(1)
(FPT-48P-M48)
Note: Please confirm the ordering information with the sales representatives.
DS501-00003-0v01-E
11
MB85R1001A
■ PACKAGE DIMENSIONS
48-pin plastic TSOP
Lead pitch
0.50 mm
Package width ×
package length
12.00 mm × 12.40 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.20 mm MAX
Weight
0.36 g
(FPT-48P-M48)
Note 1) # : Resin protrusion. (Each side : +0.15 (.006) Max).
Note 2) * : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
48-pin plastic TSOP
(FPT-48P-M48)
0.10±0.05 (.004±.002)
(STAND OFF)
1
48
0.50(.020)
INDEX
#12.00±0.10
(.472±.004)
+0.05
0.22 –0.04
(.009 +.002
–.002 )
24
0.10(.004)
M
25
1.13±0.07 (.044±.003)
(MOUNTING HEIGHT)
Details of A part
14.00±0.20(.551±.008)
*12.40±0.10(.488±.004)
0.25(.010)
+0.05
0.145 –0.03
(.006 +.002
–.001 )
C
0.08(.003)
A
2010 FUJITSU SEMICONDUCTOR LIMITED F48048Sc-1-1
0.60±0.15
(.024±.006)
0~8
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please check the latest package dimension at the following URL.
http://edevice.fujitsu.com/package/en-search/
12
DS501-00003-0v01-E
MB85R1001A
MEMO
DS501-00003-0v01-E
13
MB85R1001A
MEMO
14
DS501-00003-0v01-E
MB85R1001A
MEMO
DS501-00003-0v01-E
15
MB85R1001A
FUJITSU SEMICONDUCTOR LIMITED
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Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
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http://www.fujitsu.com/sg/services/micro/semiconductor/
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Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
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Tel : +852-2377-0226 Fax : +852-2376-3269
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Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does
not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
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Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
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limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
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Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products.
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by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of overcurrent levels and other abnormal operating conditions.
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Edited: Sales Promotion Department