VTM
V•I Chip – VTM
Voltage Transformation Module
TM
• 48 V to 1.5 V V•I Chip Converter
• 125°C operation
• 90 A (135 A for 1 ms)
• 1 µs transient response
V048K015T090
K indicates BGA configuration. For other
mounting options see Part Numbering below.
Vf = 26 - 55 V
VOUT = 0.8 - 1.7 V
IOUT = 90 A
K = 1/32
ROUT = 1.2 mΩ max
• High density – 360 A/in
• >3.5 million hours MTBF
• Small footprint – 84 A/in2
• Typical efficiency 93% at 1.5 V/50 A
• Low weight – 0.5 oz (14 g)
• No output filtering required
• Pick & Place / SMD
• BGA or J-Lead packages
3
©
Actual size
Product Description
Absolute Maximum Ratings
The V048K015T090 V•I Chip Voltage Transformation
Module (VTM) breaks records for speed, density and
efficiency to meet the demands of advanced DSP,
FPGA, ASIC, processor cores and microprocessor
applications at the point of load (POL) while providing
isolation from input to output. It achieves a response
time of less than 1 µs and delivers up to 90 A in a
volume of less than 0.25 in3 while providing low output
voltages with unprecedented efficiency. It may be
paralleled to deliver hundreds of amps at an output
voltage settable from 0.8 to 1.7 Vdc.
Parameter
-1.0 to 60.0
Vdc
+In to -In
100
Vdc
PC to -In
-0.3 to 7.0
Vdc
-0.3 to 7.0
Vdc
TM to -In
VC to -In
+Out to -Out
Isolation voltage
L
E
R
The 1.5 V VTM achieves break-through current density
of 360 A/in3 in a V•I Chip package compatible with
standard pick-and-place and surface mount assembly
processes. The V•I Chip BGA package supports in-board
mounting with a low profile of 0.16" (4 mm) over the
board. A J-lead package option supports on-board
surface mounting with a profile of only 0.25" (6 mm)
over the board. The VTM’s fast dynamic response and
low noise eliminate the need for bulk capacitance at the
load, substantially increasing the POL density while
improving reliability and decreasing cost.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Unit
+In to -In
The VTM V048K015T090’s nominal output voltage is
1.5 Vdc from a 48 Vdc input factorized bus, Vf, and is
controllable from 0.8 to 1.7 Vdc at no load, and from
0.8 to 1.6 Vdc at full load, over a Vf input range of 26
to 55 Vdc. It can be operated either open- or closed-loop
depending on the output regulation needs of the
application. Operating open-loop, the output voltage
tracks its Vf input voltage with a transformation ratio,
K = 1/32, and an output resistance, ROUT = 1.0 milliohm, to
enable applications requiring a programmable low
output voltage at high current and high efficiency.
Closing the loop back to an input Pre-Regulation
Module (PRM) or DC-DC converter can compensate
for ROUT.
P
Values
I
IM
Peak output current
Y
R
A
N
Vdc
-0.1 to 4.0
Vdc
2,250
Vdc
-40 to 125
°C
See Note
90
A
Continuous
For 1 ms
Case temperature during reflow
Storage temperature
For 100 ms
-0.3 to 19.0
Operating junction temperature
Output current
Notes
135
A
208
°C
Input to Output
-40 to 150
°C
Output power
145
W
Continuous
Peak output power
217
W
For 1 ms
Note: The referenced junction is defined as the semiconductor having the highest temperature.
This temperature is monitored by the temperature monitor (TM) signal and by a shutdown comparator.
Part Numbering
V
048
Voltage
Transformation
Module
K
Input Voltage
Designator
Configuration Options
A = On-board, elevated (Fig.16)
F = On-board (Fig.15)
K = In-board (Fig.14)
V•I Chip Voltage Transformation Module
015
T
Output Voltage
Designator
(=VOUT x10)
090
Output Current
Designator
(=IOUT)
Product Grade Temperatures (°C)
Grade
Storage
Operating
T
-40 to150 -40 to125
V048K015T090
Rev. 1.0
Page 1 of 16
Specifications
INPUT (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Input voltage range
Input dV/dt
Input overvoltage turn-on
Input overvoltage turn-off
Input current
Input reflected ripple current
No load power dissipation
Internal input capacitance
Internal input inductance
Min
26
Typ
48
Max
55
1
57.6
59.0
3.2
135
2.50
4
20
3.5
Unit
Vdc
V/µs
Vdc
Vdc
Adc
mA p-p
W
µF
nH
Note
Operable down to zero V with external bias voltage
Using test circuit in Fig.17; See Fig.1
OUTPUT (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Rated DC current
Min
0
Typ
Peak repetitive current
DC current limit
Current share accuracy
Efficiency
Half load
Full load
Internal output inductance
Internal output capacitance
Load capacitance
Output overvoltage setpoint
Output ripple voltage
No external bypass
200 µF bypass capacitor
Effective switching frequency
Line regulation
K
Load regulation
ROUT
Transient response
Voltage overshoot
Response time
Recovery time
92
L
E
PR
92.5
91.0
Max
90
Unit
Adc
135
A
126
10
Adc
%
N
I
IM
108
5
93.4
91.5
1.6
306
100,000
1.80
110
2.4
62
2
2.5
0.0309
1/32
0.0316
1.0
1.2
20
200
1
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Note
2.6
Y
AR
Max pulse width 1ms, max duty cycle 10%,
baseline power 50%
See Parallel Operation on page 10
%
%
nH
µF
µF
Vdc
See Fig.3, 1.5 Vout
See Fig.3, 1.5 Vout
mV
mV
MHz
See Figs.2 and 5
See Fig.6
Fixed, 1.25 MHz per phase
Effective value
VOUT = K•VIN at no load
mΩ
See Fig.20
mV
ns
µs
90 A load step with 100 µF CIN; See Figs.7 and 8
See Figs.7 and 8
See Figs.7 and 8
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 2 of 16
Specifications
WAVEFORMS
Output Ripple (mV)
Output Ripple vs Load
65
60
55
50
45
40
35
30
25
20
15
10
5
0
0
10
20
30
40
50
60
70
80
90
Output Current (A)
Figure 1— Input reflected ripple current at full load and 48 Vin
Figure 2— Output voltage ripple vs. output current at 1.5 Vout
with no POL bypass capacitance.
Power Dissipation vs. Output Current
Efficiency vs. Output Current
93
1.6V
1.5V
1.2V
Efficiency (%)
91
89
1.0V
87
0.8V
85
83
81
79
77
75
0
10
20
30
40
50
60
70
80
90
Power Dissipation (W)
95
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1.5V
1.2V
1.0V
0.8V
0
10
20
Output Current (A)
30
40
50
60
70
80
90
Output Current (A)
Figure 3— Efficiency vs. output current and output voltage
Figure 4—Power dissipation as a function of output current and
output voltage
Figure 5— Output voltage ripple at full load and 1.5 Vout;
without any external bypass capacitor.
Figure 6—Output voltage ripple at full load and 1.5 Vout with
200 µF ceramic external bypass capacitance and 20 nH
distribution inductance.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 3 of 16
PRELIMINARY
Specifications, continued
Figure 7— 0-90 A step load change with 100 µF input
capacitance and no output capacitance.
Figure 8— 90-0 A step load change with 100 µF input
capacitance and no output capacitance.
GENERAL
Parameter
MTBF
MIL-HDBK-217F
Isolation specifications
Voltage
Capacitance
Resistance
Agency approvals (pending)
Min
Typ
Max
Unit
Note
3.5
Mhrs
25°C, GB
2,500
Vdc
pF
MΩ
Input to Output
Input to Output
Input to Output
UL/CSA 60950, EN 60950
Low voltage directive
See mechanical drawing, Figs.10 and 12
2,250
10
cTÜVus
CE Mark
Mechanical parameters
Weight
Dimensions
Length
Width
Height
0.5 / 14.0
oz / g
1.26 / 32
0.85 / 21.5
0.23 / 5.9
in / mm
in / mm
in / mm
Auxiliary Pins (Conditions are at 48 Vin, full load, and 25°C ambient unless otherwise specified)
Parameter
Primary Control (PC)
DC voltage
Module disable voltage
Module enable voltage
Current limit
Disable delay time
Temperature Monitor (TM)
27°C setting
Temperature coefficient
Full range accuracy
Current limit
VTM Control (VC)
External boost voltage
External boost duration
Min
Typ
Max
Unit
Note
4.8
2.4
5.0
2.5
2.5
2.5
4
5.2
Vdc
Vdc
Vdc
mA
µs
Source only
PC low to Vout low
2.4
2.6
2.9
10
3.00
10
±5
Vdc
mV/°C
°C
µA
100
12.0
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
14.0
10
19.0
Vdc
ms
Operating junction temperature
Operating junction temperature
Source only
Required for VTM start up without PRM
Vin must be >26 V for VTM to remain operating
without boost voltage.
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 4 of 16
Specifications, continued
THERMAL
Symbol
RθJC
RθJB
RθJA
RθJA
Parameter
Over temperature shutdown
Thermal capacity
Junction-to-case thermal impedance
Junction-to-BGA thermal impedance
Junction-to-ambient 1
Junction-to-ambient 2
Min
125
Typ
130
0.61
1.1
2.1
6.5
5.0
Max
135
Unit
°C
Ws/°C
°C/W
°C/W
°C/W
°C/W
Note
Junction temperature
Notes
1. V048K015T090 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM.
2. V048K015T090 with optional 0.25"H Pin Fins surface mounted on FR4 board, 300 LFM.
V•I CHIP STRESS DRIVEN PRODUCT QUALIFICATION PROCESS
Test
High Temperature Operational Life (HTOL)
Temperature cycling
High temperature storage
Moisture resistance
Temperature Humidity Bias Testing (THB)
Pressure cooker testing (Autoclave)
Highly Accelerated Stress Testing (HAST)
Solvent resistance/marking permanency
Mechanical vibration
Mechanical shock
Electro static discharge testing – human body model
Electro static discharge testing – machine model
L
E
PR
Highly Accelerated Life Testing (HALT)
Standard
JESD22-A-108-B
JESD22-A-104B
JESD22-A-103A
JESD22-A113-B
EIA/JESD22-A-101-B
JESD22-A-102-C
JESD22-A-110B
JESD22-B-107-A
JESD22-B-103-A
JESD22-B-104-A
EIA/JESD22-A114-A
EIA/JESD22-A115-A
Per Vicor Internal
Test Specification*
I
IM
Per Vicor internal
test specification*
Dynamic cycling
Y
R
NA
Environment
125°C, Vmax, 1,008 hrs
-55°C to 125°C, 1,000 cycles
150°C, 1,000 hrs
Moisture sensitivity Level 5
85°C, 85% RH, Vmax, 1,008 hrs
121°C, 100% RH, 15 PSIG, 96 hrs
130°C, 85% RH, Vmax, 96 hrs
Solvents A, B & C as defined
20g peak, 20-2,000 Hz, test in X, Y & Z directions
1,500g peak 0.5 ms pulse duration, 5 pulses in 6 directions
Meets or exceeds 2,000 Volts
Meets or exceeds 200 Volts
Operation limits verified, destruct margin determined
Constant line, 0-100% load,
-20°C to 125°C
* For details of the test protocols see Vicor’s website.
V•I CHIP BALL GRID ARRAY INTERCONNECT QUALIFICATION
Test
BGA solder fatigue evaluation
Solder ball shear test
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
Standard
IPC-9701
IPC-SM-785
Environment
Cycle condition: TC3 (-40 to +125°C)
Test duration: NTC-B (500 failure free cycles)
IPC-9701
Failure through bulk solder or copper pad lift-off
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 5 of 16
PRELIMINARY
Pin/Control Functions
+IN/-IN DC VOLTAGE PORTS
The VTM input should not exceed the high end of the range
specified. Be aware of this limit in applications where the VTM
is being driven above its nominal output voltage. A 14 V source
must be applied to the VC pin and voltage must be present at
the +In and -In ports in order for the VTM to process power. If
the input voltage exceeds the over voltage lock-out, the VTM
will shutdown. The VTM does not have internal input reverse
polarity protection. Adding a properly sized diode in series with
the positive input or a fused reverse-shunt diode will provide
reverse polarity protection.
4 3
+Out
-Out
+Out
VC – VTM Control
-Out
The VC port is multiplexed. It receives the initial Vcc voltage
from an upstream PRM, synchronizing the output rise of the
VTM with the output rise of the PRM. Additionally, the VC
port provides feedback to the PRM to compensate for the VTM
output resistance. In typical applications using VTMs powered
from PRMs, the PRM’s VC port should be connected to the
VTM VC port.
In applications where a VTM is being used without a PRM,
14 V must be supplied to the VC port for approximately 10 ms in
order for the VTM to startup. The VTM can be operated at
input voltages below 26 V as long as the VC voltage is applied.
PC – Primary Control
L
E
PR
Disable – If the PC is left floating, the VTM output
is enabled. To disable the output, the PC pin must be pulled
lower than 2.4 V, referenced to -In. Optocouplers, open
collector transistors or relays can be used to control the PC
pin. Once disabled, 14 V must be re-applied to the VC pin
in order to restart the VTM
Primary Auxiliary Supply – The PC port can source up to
2.4 mA at 5 Vdc.
TM – Temperature Monitor
The Temperature Monitor (TM) provides a linear output
proportional to the internal temperature of the VTM. At 300ºK
(+27ºC) the TM output is 3.0 V referenced to -In and varies
10 mV/ºC. TM accuracy is +/-5ºC. This feature is useful for
validating the thermal design of the system as well as
monitoring the VTM temperature in the final application.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
+In
Temp.
Monitor
VTM Control
Primary
Control
-In
Bottom View
Figure 9—VTM BGA configuration
I
IM
The Primary Control (PC) pin is a multifunction pin for
controlling the VTM as follows:
21
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
Signal
Name
+In
–In
TM
VC
PC
BGA
Designation
A1-L1, A2-L2
AA1-AL1, AA2-AL2
P1, P2
T1, T2
V1, V2
A3-G3, A4-G4,
U3-AC3, U4-AC4
J3-R3, J4-R4,
AE3-AL3, AE4-AL4
Y
R
NA
+Out
–Out
+OUT/-OUT DC Voltage Output Ports
The output (+OUT) and output return (-OUT) are through two
sets of contact locations. The respective +OUT and –OUT
groups must be connected in parallel with as low an
interconnect resistance as possible. Within the specified input
voltage range, the Level 1 DC behavioral model shown in
Figure 20 defines the output voltage of the VTM. The current
source capability of the VTM is shown in the specification table.
To take full advantage of the VTM, the user should note the
low output impedance of the device. The low output impedance
provides fast transient response without the need for bulk POL
capacitance. Limited-life electrolytic capacitors required with
conventional converters can be reduced or even eliminated,
saving cost and valuable board real estate.
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 6 of 16
PRELIMINARY
Mechanical Drawings
1,00
0.039
5,9
0.23
21,5
0.85
SOLDER BALL
#A1 INDICATOR
1,00
0.039
18,00
0.709
9,00
0.354
(106) X Ø 0.020 SOLDER BALL
0.51
SOLDER BALL #A1
OUTPUT
28,8
1.13
30,00
1.181
INPUT
OUTPUT
32,0
1.26
INPUT
1,00 TYP
0.039
C
L
15,00
0.591
16,0
0.63
C
L
1,6
0.06
TOP VIEW (COMPONENT SIDE)
1,00
0.039
BOTTOM VIEW
3,9
0.15
15,6
0.62
NOTES:
mm
1- DIMENSIONS ARE inch .
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
3- PRODUCT MARKING ON TOP SURFACE
SEATING PLANE
Figure 10—VTM BGA mechanical outline; In-board mounting
IN-BOARD MOUNTING
BGA surface mounting requires a
cutout in the PCB in which to recess the V•I Chip
1,50
0.059
( 1,00 )
0.039
0,51
(ø
)
0.020
0,50
0.020
ø 0,53 PLATED VIA
0.021
CONNECT TO
INNER LAYERS
SOLDER MASK
DEFINED PADS
0,50
0.020
( 1,00 )
0.039
1,00
0.039
1,00
0.039
18,00
0.709
1,00
0.039
9,00
0.354
SOLDER PAD #A1
1
(4) X 6,00
0.236
+IN
+OUT1
(2) X 10,00
0.394
-OUT1
(COMPONENT SIDE SHOWN)
29,26
1.152
VC
TM
RECOMMENDED LAND AND VIA PATTERN
PCB CUTOUT
24,00
0.945
-OUT2
-IN
PC
+OUT2
20,00
0.787 17,00
0.669 15,00 13,00
0.591
0.512
16,00
0.630
NOTES:
mm
1- DIMENSIONS ARE inch .
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
8,00
0.315
31
(106) X ø
0,51
0.020
0,37
0.015
8,08
0.318
SOLDER MASK
DEFINED PAD
16,16
0.636
1,6
(4) X R 0.06
Figure 11— VTM BGA PCB land/VIA layout information; In-board mounting
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 7 of 16
PRELIMINARY
Mechanical Drawings
6,1
0.24
22,0
0.87
9,3
0.37
15,99
0.630
3,01
0.118
3,01
0.118
(4) PL. 7,10
0.280
OUTPUT
INPUT
INPUT
24,00
0.945
OUTPUT
32,0
1.26
11,10 (2) PL.
0.437
CL
16,00
0.630
15,55
0.612
12,94
0.509
8,00
0.315
(Elevated Option)
20,00
0.787
C
L
0,45
0.018
TOP VIEW (COMPONENT SIDE)
14,94
0.588
16,94
0.667
BOTTOM VIEW
NOTES:
1- DIMENSIONS ARE mm/[INCH].
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
(Elevated Option)
3- PRODUCT MARKING ON TOP SURFACE
3,5
0.14
Figure 12—VTM J-lead mechanical outline; On-board mounting
3,26
0.128
3,26
0.128
15,74
0.620
0,51
TYP
0.020
PC VC TM
-IN
-OUT2
(2) X14,94
0.588
12,94
(2) X 0.509
+OUT2
20,00
(2) X 0.787
(2) X16,94
0.667
7,48
(8) X 0.295
-OUT1
1,60
(6) X
0.063
+OUT1
(4) X 11,48
0.452
+IN
1,38
0.054 TYP
(2) X 24,00
0.945
(2) X 16,00
0.630
8,00
(2) X 0.315
RECOMMENDED LAND PATTERN
(COMPONENT SIDE SHOWN)
NOTES:
1- DIMENSIONS ARE mm/[INCH].
2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
.X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005]
Figure 13— VTM J-lead PCB land layout information; On-board mounting
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 8 of 16
CONFIGURATION OPTIONS
IN-BOARD*
(Fig. 14)
ON-BOARD*
(Fig. 15)
IN-BOARD WITH 0.25"
PIN FINS**
ON-BOARD WITH 0.25"
PIN FINS**
Effective Current Density
525 A/in3
328 A/in3
205 A/in3
164 A/in3
Junction-Board
Thermal Resistance
2.1 °C/W
2.4 °C/W
2.1 °C/W
2.4 °C/W
Junction-Case
Thermal Resistance
1.1 °C/W
1.1 °C/W
N/A
N/A
Junction-Ambient
Thermal Resistance 300LFM
6.5 °C/W
6.8 °C/W
5.0 °C/W
5.0 °C/W
CONFIGURATION
*Surface mounted to a 2" x 2" FR4 board, 4 layers 2 oz Cu
**Pin Fin heat sink available as a separate item
21.5
0.85
22.0
0.87
32.0
1.26
32.0
1.26
4.0
0.16
Y
R
A
N
6.3
0.25
L
E
PR
Figure 14—In-board mounting – package K
22.0
0.87
I
IM
mm
in
IN–BOARD MOUNT
(V•I Chip recessed into PCB)
ON–BOARD MOUNT
mm
in
Figure 15—On-board mounting – package F
32.0
1.26
9.5
0.37
mm
in
Figure 16— On-board elevated mounting – package A
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 9 of 16
PRELIMINARY
Configuration Options (Cont.)
Input reflected ripple
measurement point
F1
7A
Fuse
+Out
+In
+
15 mΩ
-Out
C1
100 µF
Al electrolytic
TM
VC
PC
C2
0.47 µF
ceramic
14 V
+
–
-In
VTM
Load
+Out
K
Ro
-Out
C3
200 µF
–
+
Temperature Monitor
–
Notes:
C3 should be placed close to the load
Figure 17—VTM test circuit
Application Note
Parallel Operation
In applications requiring higher current or redundancy, VTMs
can be operated in parallel without adding control circuitry or
signal lines. To maximize current sharing accuracy, it is imperative
that the source and load impedance on each VTM in a parallel
array be equal. If VTMs are being fed by an upstream PRM, the
VC nodes of all VTMs must be connectd to the PRM VC.
To achieve matched impedances, dedicated power planes
within the PC board should be used for the output and output
return paths to the array of paralleled VTMs. This technique is
preferable to using traces of varying size and length.
The VTM power train and control architecture allow bi-directional
power transfer when the VTM is operating within its specified
ranges. Bi-directional power processing improves transient
response in the event of an output load dump. The VTM may
operate in reverse, returning output power back to the input
source. It does so efficiently.
Thermal Management
The high efficiency of the VTM results in low power
dissipation minimizing temperature rise, even at full output
current. The heat generated within the internal semiconductor
junctions is coupled through very low thermal resistances, RθJC
and RθJB (see Figure 18), to the PC board allowing flexible
thermal management.
CASE 1 Convection via optional Pin Fins to air (Pin Fins
available as a separate item.)
In an environment with forced convection over the surface
of a PCB with 0.4" of headroom, a VTM with Pin Fins offers
a simple thermal management option. The total Junction to
Ambient thermal resistance of a surface mounted
V048K015T090 with pin fins attached is 4.8 ºC/W in 300 LFM
airflow, (see Figure 19).
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
At 1.5 Vout and full rated current (90A), the VTM dissipates
approximately 13 W per Figure 4. This results in a temperature
rise of approximately 60 ºC, allowing operation in an air
temperature of 65 ºC without exceeding the 125 ºC max
junction temperature.
CASE 2 Conduction to the PC board
The low Junction to BGA thermal resistance allows the use
of the PC board as a means of removing heat from the VTM.
Convection from the PC board to ambient, or conduction to a
cold plate, enable flexible thermal management options.
2
With a VTM mounted on a 2.0 in area of a multi-layer PC
board with appropriate power planes resulting in 8 oz of
effective copper weight, the Junction-to-BGA thermal
resistance, RθJB, is 2.1 ºC/W in 300 LFM of air. With a
maximum junction temperature of 125 ºC and 13 W of
dissipation at full current of 90 A, the resulting temperature
rise of 26 ºC allows the VTM to operate at full rated current
up to a 99 ºC board temperature. See thermal resistances
on page 9 for additional details on this thermal management
option.
Adding low-profile heat sinks to the PC board can lower the
thermal resistance of the PC board surrounding the VTM.
Additional cooling may be added by coupling a cold plate to
the PC board with low thermal resistance stand offs.
CASE 3 Combined direct convection to the air and conduction
to the PC board.
A combination of cooling techniques that utilize the power
planes and dissipation to the air will also reduce the total
thermal impedance. This is the most effective cooling
method. To estimate the total effect of the combination, treat
each cooling branch as one leg of a parallel resistor network.
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 10 of 16
PRELIMINARY
Application Note (continued)
VTM with optional 0.25'' Pin Fins
10
9
8
Tja
7
6
5
4
3
0
100
200
300
400
500
600
Airflow (LFM)
Figure 19—Junction-to-ambient thermal resistance of VTM
with 0.25" Pin Fins. (Pin Fins are available as a seperate item.)
Figure 18—Thermal resistance
V•I Chip VTM LEVEL 1 DC BEHAVIORAL MODEL for 48V to 1.5V, 90A
ROUT
IOUT
+
+
1.0 mΩ
V•I
1/32 • Iout
VIN
IQ
52 mA
1/32 • Vin
+
+
–
VOUT
–
K
-
–
©
Figure 20—This model characterizes the DC operation of the V•I Chip VTM, including the converter transfer function
and its losses. The model enables estimates or simulations of output voltage as a function of input voltage and output load, as
well as total converter power dissipation or heat generation.
V•I Chip VTM LEVEL 2 TRANSIENT BEHAVIORAL MODEL for 48V to 1.5V, 90A
0.15 nH
LIN = 20 nH
ROUT
IOUT
+
+
1.0 mΩ
RCIN
1.3 mΩ
CIN
VIN
LOUT = 1.6 nH
4 µF
IQ
52 mA
V•I
1/32 • Iout
+
+
–
RCOUT
0.6 mΩ
1/32 • Vin
65 µΩ
COUT
306 µF
VOUT
–
K
–
–
©
Figure 21—This model characterizes the AC operation of the V•I Chip VTM including response to output load or input voltage
transients or steady state modulations. The model enables estimates or simulations of input and output voltages under transient
conditions, including response to a stepped load with or without external filtering elements.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 11 of 16
Application Note (continued)
In figures 22 – 25;
K = VTM Transformation Ratio
Ro = VTM Output Resistance
Vf = PRM Output (Factorized Bus Voltage)
Vo = VTM Output
VL = Desired Load Voltage
FPA Adaptive Loop
Vo = VL ± 1.0%
VC
PC
TM
IL
NC
PR
VH
SC
SG
OS
NC
CD
PRM-AL
+In
+Out
Vf =
–In
L
O
A
D
-Out
VTM
TM
VC
PC
Vin
+Out
+In
Factorized
Power Bus
Rs
VL (Io•Ro)
+
K
K
+Out
-In
–Out
K
Ro
-Out
Figure 22 — The PRM controls the factorized bus voltage, Vf, in proportion to output current to compensate for the output resistance,
Ro, of the VTM. The VTM output voltage is typically within 1% of the desired load voltage (VL) over all line and load conditions.
FPA Non-isolated Remote Loop
Remote
Loop
Control
VC
PC
TM
IL
NC
PR
VH
SC
SG
OS
NC
CD
PRM-AL
+In
Vin
+S
-Out
VTM
TM
VC
PC
+Out
+Out
Vf = f (Vs)
–In
+Out
+In
Factorized
Power Bus
Vo = VL ± 0.4%
-In
–Out
K
Ro
–S
L
O
A
D
-Out
Figure 23 — An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output – the
factorized bus – as a function of output current, compensating for the output resistance of the VTM and for distribution resistance.
FPA Isolated Remote Loop
Remote
Loop
Control
Vo = VL ± 0.4%
VC
PC
TM
IL
NC
PR
PRM-IF
+In
VS
FB
FG
NC
NC
NC
Factorized
Power Bus
+Out
+S
-Out
TM
VC
PC
Vf = f (Vs)
Vin
–In
–Out
+Out
+In
-In
VTM
+Out
K
Ro
–S
L
O
A
D
-Out
Figure 24—An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output – the
factorized bus – as a function of output current, compensating for the output resistance of the VTM and for distribution
resistance. The factorized bus voltage (Vf) increases in proportion to load current. The remote feed back loop is isolated within
the PRM to support galvanic isolation and hipot compliance at the system level.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 12 of 16
PRELIMINARY
Application Notes
VR Example
{
VID0
VID1
VID2
VID3
VID4
VID5
PI1004
EAIN
EAIP
REFIN
IAVP
ISP
ISN
OVP
PWRGD
ENABLE
SS
VO
RG
From CPU
SGND
NC
NC
VCC
REFOUT
EAO
CPU Power Application
OVP Out
Vcc PWRGD Out
VID PWRGD from Vcc VID VR
VC
PC
TM
IL
NC
PR
PRM-AL
+In
+In
VH
SC
SG
OS
NC
CD
+Out
-Out
48V
12V
C1
TM
VC
PC
-In
–In
+Out
+In
–Out
CPU
VTM
+Out
K
Ro
Ceramic
Bypass
-Out
–In
V f= 26 - 55 Vdc
VL = 0.8 - 1.7 Vdc
C1= Ceramic Cap
Figure 25— PRM, POLIC and VTM system to provide VRD/VRM type solution for microprocessor applications.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 13 of 16
Application Note (continued)
PRELIMINARY
V•I Chip Soldering Recommendations
V•I Chip modules are intended for reflow soldering processes.
The following information defines the processing conditions
required for successful attachment of a V•I Chip to a PCB.
Failure to follow the recommendations provided can result in
aesthetic or functional failure of the module.
Inspection
For the BGA-version, a visual examination of the post-reflow
solder joints should show relatively columnar solder joints with
no bridges. An inspection using x-ray equipment can be done,
but the module’s materials may make imaging difficult.
Storage
V•I Chip modules are currently rated at MSL 5. Exposure to
ambient conditions for more than 72 hours requires a 24 hour
bake at 125ºC to remove moisture from the package.
The J-Lead version’s solder joints should conform to IPC 12.2
• Properly Wetted Fillet must be evident
• Heel fillet height must exceed lead thickness plus solder thickness.
Solder Paste Stencil Design
Solder paste is recommended for a number of reasons, including
overcoming minor solder sphere co-planarity issues as well as
simpler integration into overall SMD process.
63/37 SnPb, either no-clean or water-washable, solder paste
should be used. Pb-free development is underway.
The recommended stencil thickness is 6 mils. The apertures
should be 20 mils in diameter for the In-Board (BGA)
application and 0.9-0.9:1 for the On-Board (J-Leaded).
Pick & Place
In-Board (BGA) modules should be placed as accurately as
possible to minimize any skewing of the solder joint; a maximum
offset of 10 mils is allowable. On-Board (J-Leaded) modules
should be placed within ±5 mils.
To maintain placement position, the modules should not be
subjected to acceleration greater than 500 in/sec2 prior to reflow.
Reflow
There are two temperatures critical to the reflow process; the
solder joint temperature and the module’s case temperature. The
solder joint’s temperature should reach at least 220ºC, with a
time above liquidus (183ºC) of ~30 seconds.
The module’s case temperature must not exceed 208 ºC at
anytime during reflow.
Removal and Rework
V•I Chip modules can be removed from PCBs using special tools
such as those made by Air-Vac. These tools heat a very localized
region of the board with a hot gas while applying a tensile force
to the component (using vacuum). Prior to component heating
and removal, the entire board should be heated to 80-100ºC to
decrease the component heating time as well as local PCB
warping. If there are adjacent moisture-sensitive components, a
125ºC bake should be used prior to component removal to
prevent popcorning. V•I Chip modules should not be expected to
survive a removal operation.
239
Joint Temperature, 220ºC
Case Temperature, 208ºC
183
165
degC
91
16
Soldering Time
Figure 26—Thermal profile diagram
Because of the ∆T needed between the pin and the case, a forcedair convection oven is preferred for reflow soldering. This
reflow method generally transfers heat from the PCB to the
solder joint. The module’s large mass also reduces its
temperature rise. Care should be taken to prevent smaller
devices from excessive temperatures. Reflow of modules onto a
PCB using Air-Vac-type equipment is not recommended due to
the high temperature the module will experience.
Figure 27— Properly reflowed V•I Chip J-Lead.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 14 of 16
Application Note (continued)
PRELIMINARY
Input Impedance Recommendations
Input Fuse Recommendations
To take full advantage of the VTM’s capabilities, the impedance
of the source (input source plus the PC board impedance) must be
low over a range from DC to 5 MHz. The input of the VTM
(factorized bus) should be locally bypassed with a 8 µF low Q
aluminum electrolytic capacitor. Additional input capacitance
may be added to improve transient performance or compensate
for high source impedance. The VTM has extremely wide
bandwidth so the source response to transients is usually the
limiting factor in overall output response of the VTM.
V•I Chips are not internally fused in order to provide flexibility
in power system configuration. However, input line fusing of
V•I Chips must always be incorporated within the power system.
A fast acting fuse, such as NANO2 FUSE 451 Series 7 A 125 V,
is required to meet safety agency Conditions of Acceptability.
The input line fuse should be placed in series with the +IN port.
Anomalies in the response of the source will appear at the output
of the VTM, multiplied by its K factor of 1/32. The DC
resistance of the source should be kept as low as possible to
minimize voltage deviations on the input to the VTM. If the
VTM is going to be operating close to the high limit of its input
range, make sure input voltage deviations will not trigger the
over voltage shutdown.
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use
and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor
shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only.
EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING,
BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer
must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without
prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor
will pay all reshipment charges if the product was defective within the terms of this warranty.
Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for
inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or
design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any
license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life
support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the
user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages.
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module
V048K015T090
Rev. 1.0
Page 15 of 16
Vicor’s comprehensive line of power solutions includes high density AC-DC
and DC-DC modules and accessory components, fully configurable AC-DC
and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is
assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life
support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to
Vicor’s Terms and Conditions of Sale, which are available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (issued U.S. and Foreign Patents and
pending patent applications) relating to the product described in this data sheet including;
• The electrical and thermal utility of the V•I Chip package
• The design of the V•I Chip package
• The Power Conversion Topology utilized in the V•I Chip package
• The Control Architecture utilized in the V•I Chip package
• The Factorized Power Architecture.
Purchase of this product conveys a license to use it. However, no responsibility is assumed
by Vicor for any infringement of patents or other rights of third parties which may result
from its use. Except for its use, no license is granted by implication or otherwise under any
patent or patent rights of Vicor or any of its subsidiaries.
Anybody wishing to use Vicor proprietary technologies must first obtain a license. Potential
users without a license are encouraged to first contact Vicor’s Intellectual Property Department.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
Email
Vicor Express: [email protected]
Technical Support: [email protected]
Vicor Corporation
Tel: 800-735-6200
vicorpower.com
V•I Chip Voltage Transformation Module V048K015T090
Rev. 1.0
Page 16 of 16
09/04/10M