MICREL SY89474U_10

SY89474U
Precision LVDS 2:1 Multiplexer with 1:2
Fanout and Internal Termination
General Description
The SY89474U is a 2.5V precision, high-speed 2:1
differential MUX capable of processing clocks up to
2.5GHz and data up to 2.5Gbps.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that directly interfaces to any
differential signal (AC- or DC-coupled) as small as
100mV (200mVPP) without any level shifting or
termination resistor networks in the signal path. The
output is 325mV LVDS with fast rise/fall times guaranteed
to be less than 150ps.
The SY89474U operates from a 2.5V ±5% supply and is
guaranteed over the full industrial temperature range of
-40°C to +85°C. The SY89474U is part of Micrel’s highspeed, Precision Edge® product line. For multiple clock
switchover solutions, please refer to the SY89840U–
SY89845U family.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
Functional Block Diagram
®
Precision Edge
Features
• Selects between two input channels and provides two
copies of the selected input
• Guaranteed AC performance over temperature and
supply voltage:
− DC to 2.5Gbps data throughput
− DC to 2.5GHz fMAX (clock)
− <470ps In-to-Out tpd
− <150ps tr/tf
− <20ps output-to-output skew
• Unique, patent-pending input isolation design
minimizes crosstalk
• Ultra-low jitter design:
− <1psRMS random jitter
− <10psPP deterministic jitter
− <1psRMS cycle-to-cycle jitter
− <10psPP total jitter (clock)
− <0.7psRMS crosstalk induced jitter
• Unique patent-pending input termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
• 325mV LVDS output swing
• 2.5V ±5% supply voltage
• −40°C to +85°C industrial temperature range
• Available in 24-pin (4mm x 4mm) QFN package
Applications
• Clock switchover
• Data distribution
Markets
•
•
•
•
LAN/WAN
Enterprise Servers
ATE
Test and Measurement
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
August 2005
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SY89474U
Ordering Information (1)
Part Number
Package Type
Operating Range
Package Marking
Lead Finish
SY89474UMG
QFN-24
Industrial
474U with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
SY89474UMGTR (2)
QFN-24
Industrial
474U with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals Only.
2. Tape and Reel.
Pin Configuration
24-Pin QFN
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SY89474U
Pin Description
Pin Number
Pin Name
5, 2,
IN0, /IN0
23, 20
IN1, /IN1
3, 21
VREF-AC0,
VREF-AC1
4, 22
VT0, VT1
1, 6, 9, 10, 13,
19, 24
VCC
7, 8
11, 12
Q0, /Q0
Q1, /Q1
15
SEL
14, 17, 18
GND,
Exposed Pad
Pin Function
Differential Inputs: These input pairs are the differential signal inputs to the
device. They accept AC- or DC-coupled signals as small as 100mV (200mVpp).
Note that these inputs will default to an undetermined state if left open. Each pin
of a pair internally terminates to a VT pin through 50Ω. Please refer to the “Input
Interface Applications” section for more details.
Reference Voltage: These outputs bias to VCC -1.2V. They are used for ACcoupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT
pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source
current is ±1.5mA. Due to the limited drive capability, the VREF-AC pin is only
intended to drive its respective VT pin. Please refer to the “Input Interface
Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates
to a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network
for maximum interface flexibility. Please refer to the “Input Interface Applications”
section for more details.
Positive Power Supply: Connect to +2.5V ±5% power supply. Bypass with
0.1µF//0.01µF low ESR capacitors as close to VCC pins as possible.
Differential Outputs: These differential LVDS output pairs are a logic function of
the IN0, IN1, and SEL inputs. Please refer to the truth table below for details.
Unused output pairs should be terminated with 100Ω across the outputs.
This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor
and will default to a logic HIGH state if left open. VTH = VCC/2. Please refer to the
“Timing Diagram” section for more details.
Ground: Ground pins and exposed pad must be connected to the same ground
plane.
Truth Table
INPUTS
August 2005
OUTPUTS
IN0
/IN0
IN1
/IN1
SEL
Q
/Q
0
1
X
X
0
0
1
1
0
X
X
0
1
0
X
X
0
1
1
0
1
X
X
1
0
1
1
0
3
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SY89474U
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VCC)........................... +2.375V to +2.625V
Ambient Temperature (TA) ......................... –40°C to +85°C
Package Thermal Resistance(3)
QFN (θJA)
Still-Air .............................................................50°C/W
QFN (ΨJB)
Junction-to-Board.............................................30°C/W
Supply Voltage (VCC) ........................................... -0.5V to +4.0V
Input Voltage (VIN) ...................................................-0.5V to VCC
Termination Current
IN, /IN.......................................................................±50mA
VT ...........................................................................±100mA
VREF-AC Current
Source/sink Current on VREF-AC ..................................±2mA
Lead Temperature (soldering, 20 sec.) .......................... +260°C
Storage Temperature (TS) ..................................-65°C to 150°C
DC Electrical Characteristics(4)
TA = –40°C to +85°C; unless otherwise stated.
Symbol
Parameter
VCC
Power Supply
Condition
Min
Typ
Max
Units
2.375
2.5
2.625
V
ICC
Power Supply Current
80
110
mA
RIN
Input Resistance
(IN-to-VT)
No load, max VCC.
45
50
55
Ω
RDIFF_IN
Differential Input Resistance
(IN-to-/IN)
90
100
110
Ω
VIH
Input High Voltage
(IN, /IN)
1.2
VCC
V
VIL
Input Low Voltage
(IN, /IN)
0
VIH-0.1
V
VIN
Input Voltage Swing
(IN, /IN)
See Figure 1a. Note 5.
0.1
VCC
V
VDIFF_IN
Differential Input Voltage Swing
|IN-/IN|
See Figure 1b.
0.2
VT_IN
IN-to-VT
(IN, /IN)
VREF-AC
Output Reference Voltage
VCC-1.3
V
VCC-1.2
1. 28
V
VCC-1.1
V
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions
for extended periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJA and ΨJB
values are determined for a 4-layer board in still air unless otherwise stated.
4.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5.
VIN (max) is specified when VT is floating.
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SY89474U
LVDS Outputs DC Electrical Characteristics(6)
VCC = 2.5V ±5%; TA = -40°C to + 85°C; RL = 100Ω across output pair; unless otherwise stated
Symbol
Parameter
Condition
Min
Typ
Max
Units
VOUT
Output Voltage Swing
Q, /Q
See Figure 1a
250
325
mV
VDIFF_OUT
Differential Output Voltage Swing
Q, /Q
See Figure 1b
500
650
mV
VOCM
Output Common Mode Voltage
ΔVOCM
Change in VOS between
complementary output states
1.125
1.275
V
-50
+50
mV
Max
Units
LVTTL/CMOS DC Electrical Characteristics(6)
VCC = 2.5V ±5%; TA = -40°C to + 85°C; unless otherwise stated
Symbol
Parameter
Condition
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
IIH
Input HIGH Current
-125
IIL
Input LOW Current
-300
Typ
2.0
V
0.8
V
30
µA
µA
Notes:
6.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
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SY89474U
AC Electrical Characteristics(7)
VCC = 2.5V ±5%; TA = -40°C to + 85°C; RL = 100Ω across output pair; unless otherwise stated
Symbol
Parameter
Condition
fMAX
Maximum Operating Frequency
VOUT ≥ 200mV
Min
Typ
Max
Units
NRZ Data
2.5
3.2
Gbps
Clock
2.5
4
GHz
220
320
470
ps
200
350
550
ps
tpd
Differential Propagation Delay In-to-Q
tpd
Tempco
Differential Propagation Delay
Temperature Coefficient
tSKEW
Output-to-Output Skew
Note 8
20
ps
Part-to-Part Skew
Note 9
200
ps
Random Jitter
Note 10
1
psRMS
Deterministic Jitter
Note 11
10
psPP
SEL-to-Q
tJitter
Data
Clock
tr, tf
VTH = VCC/2
fs/oC
158
5
Cycle-to-cycle Jitter
Note 12
1
psRMS
Total Jitter
Note 13
10
psPP
Crosstalk-Induced Jitter
Note 14
0.7
psRMS
Output Rise/Fall Time (20% to 80%)
At full output swing.
150
ps
30
Notes:
7.
High-frequency AC-parameters are guaranteed by design and characterization.
8.
Output-to-output skew is measured between two different outputs under identical transitions.
9.
Part-to-part skew is defined for two parts with identical power supply voltages, at the same temperature, and with no skew of the edges at
the respective inputs.
10. Random Jitter is measured with a K28.7 pattern, measured at ≤ fMAX.
23
11. Deterministic Jitter is measured with both K28.5 and 2 -1 PRBS pattern, measured at ≤ fMAX.
12. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
12
13. Total Jitter definition: With an ideal clock input of frequency <fMAX, no more than one output edge in 10 output edges will deviate by
more than the specified peak-to-peak jitter value.
14. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each
other at the inputs.
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SY89474U
Typical Operating Characteristics
VCC = 2.5V ±5%; VIN > 400mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated.
Functional Characteristics
VCC = 2.5V ±5%; VIN > 400mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated.
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SY89474U
Single-Ended and Differential Swings
Figure 1a. Single-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
Timing Diagrams
Input and Output Stages
Figure 2. Simplified Differential Input Stage
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SY89474U
Input Interface Applications
Option: may connect VT to VCC.
Figure 3a. LVPECL Interface
(DC-Coupled)
Figure 3b. LVPECL Interface
(AC-Coupled)
Figure 3d. CML Interface
(AC-Coupled)
Figure 3e. LVDS Interface
(DC-Coupled)
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Figure 3c. CML Interface
(DC-Coupled)
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SY89474U
LVDS Output Interface Applications
LVDS specifies a small swing of 325mV typical, on a
nominal 1.20V common mode above ground. The
common mode voltage has tight limits to permit large
variations in ground between an LVDS driver and
receiver. Also, change in common mode voltage, as
a function of data input, is kept to a minimum, to
keep EMI low.
Figure 4a. LVDS Differential Measurement
Figure 4b. LVDS Mode Measurement
Related Product and Support Information
Part
Number
Function
Data Sheet Link
SY89473U
Precision LVPECL 2:1 Multiplexer with
1:2 Fanout and Internal Termination
www.micrel.com/product-info/products/sy89473u.shtml
HBW
Solutions
New Products and Applications
www.micrel.com/product-info/products/solutions.shtml
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Micrel, Inc.
SY89474U
Package Information
24-Pin (4mm x 4mm) QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for
its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
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