Ordering number : EN*A0098 Bi-CMOS LSI LV4901H Buit-in 80mW Headphone amplifier BTL 10W×2ch Crass-D Audio Power Amplifier Overview The LV4901H is a 10W per channel stereo digital power amplifier that takes analog inputs. The LV4901H uses unique SANYO-developed feedback technology to achieve excellent audio quality despite being a class D amplifier and can be used to implement high quality flat display panel (FDP) based systems. Features • Supports circuit designs that do not require output LC filters • BTL output, class D amplifier system • Unique SANYO-developed feedback technology achieves superb audio quality • High-efficiency class D amplifier, Low EMI • Soft muting function reduces impulse noise at power on/off • Full complement of built-in protection circuits : overcurrent protection, thermal protection, and low power supply voltage protection circuits • Built in boot strap diode • Built in Headphone amplifier Functions • 10W output (VD = 12V, RL = 8Ω, THD + N = 10%) • Efficiency : η > 85% (VD = 12V, RL = 8Ω, fin = 1kHz, PO = 10W) • 80mW Stereo Headphone amplifier (VD = 12V, RL = 16Ω, THD + N = 10%) • Package HSOP-36 Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 70208 MS PC No.A0098-1/14 LV4901H Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Maximum supply voltage VD Maximum output current IO peak Allowable power dissipation Pd max Conditions Ratings Externally applied voltage Independent package Unit 14 V 3.5 A/ch 886 mW Operating temperature Topr -25 to +75 °C Storage temperature Tstg -50 to +150 °C Recommended Operating Conditions at Ta = 25°C Parameter Symbol Ratings Conditions min Recommended supply voltage range Recommended load resistance VD Externally applied voltage RL (SP) Speaker load RL (HP) Headphone typ Unit max 10 12 4 8 13.5 Ω V 16 Ω Electrical Characteristics at Ta = 25°C Parameter Symbol Ratings Conditions min typ Unit max Digital amplifier block : VD = 12V, RL = 8Ω, L = 22μH, C = 0.33μF, CL = 1μF Ist STBY = L, MUTE = L 13 25 μA Mute current Imute STBY = H, MUTE = L 13 20 mA Quiescent current ICCO STBY = H, MUTE = H 60 70 mA Standby current Voltage gain Output offset voltage VG Voffset fin = 1kHz, VO = 0dBm Rg = 0 Total harmonic distortion THD@1W PO = 1W, fin = 1kHz, AES17 Maximum output PO1@10% THD+N = 10%, AES17 Channel separation CH sep. Ripple rejection ratio SVRR 29 0.2 31 dB 150 mV 0.8 % 8 10 W fin = 1kHz, VO = 0dBm, Rg = 0, DIN AUDIO 55 70 dB fr = 100Hz, Vr = 0dBm, Rg = 0, A-weight 35 Noise VNO Rg = 0, A-weight High-level input voltage VIH STBY pin and MUTE pin Low-level input voltage VIL STBY pin and MUTE pin Power supply voltage drop protection 27 -150 50 200 dB 500 3 μVrms V 1 V UV_UPPER VD pin voltage monitor 8.0 V UV_LOWER VD pin voltage monitor 7.0 V circuit upper limit value Power supply voltage drop protection circuit lower limit value Headphone amplifier block : VD = 12V, RL = 16Ω, fin = 1kHz Quiescent current Voltage gain Total harmonic distortion Maximum output ICCOhp HP_STBY = H VG VO = -10dBm 5.5 9.5 mA 12 14 dB 0.25 0.8 THD PO = 1mW, DIN AUDIO PO THD = 10%, DIN AUDIO 60 80 mW fin = 1kHz, Vr = 0dBm, Rg = 0, DIN AUDIO 35 45 dB fr = 100Hz, Vr = 0dBm, Rg = 0, DIN AUDIO 55 70 dB Channel separation CH sep. Ripple rejection ratio SVRR High-level input voltage VIH HP_STBY pin Low-level input voltage VIL HP_STBY pin Noise 10 VNO Rg = 0Ω, DIN AUDIO 3 % V 1 50 200 V μVrms Note : The values of these characteristics were measured in the SANYO test environment. The actual values in an end system will vary depending on the printed circuit board pattern, the external components actually used, and other factors. No.A0098-2/14 LV4901H Package Dimensions unit : mm (typ) 3235A 0.65 17.8 (6.2) 2.7 1 0.25 2.0 0.8 0.3 0.1 2.45max (2.25) (0.5) 10.5 7.9 (4.9) 36 SANYO : HSOP36(375mil) Block Diagram (RL = 8Ω) 0-5V 1 2 0-5V VIN1 VIN2 1μF 1μF PVD2 OUTPUT STAGE + 5 6 220μF + 8 9 OUT1+ BOOT1+ 4 7 1μF PVD1 3 10μF 1μF STBY MUTE BIASCAP RECEIVER VDD1 CONTROL DELAY VBIAS BOOT1- HP_GND1 OUTPUT STAGE HP_OUT1 VCC OUT1PGND1 PGND1 1μF 36 35 22μH 34 0.1μF 0.33μF 33 32 1μF 1μF 31 0.33μF 0.1μF 30 22μH 29 28 1000μF SEQUENCE 220μF + 10 11 12 13 1μF 14 33μF HP_IN1 HP_IN2 0-5V 1μF 1μF + 15 PGND2 HP_OUT2 PGND2 HP_GND2 OUTPUT STAGE RECEIVER VDD2 CONTROL DELAY RF_CAP BOOT2+ OUTPUT STAGE HEADPHONE 17 HP_STBY OUT2BOOT2- NC MUTE_CAP + VD THERMAL GND 16 18 SUPPLY RL OUT2+ PVD2 PVD2 27 26 22μH 25 0.1μF 0.33μF 24 23 1μF 1μF 22 RL 0.33μF 0.1μF 21 22μH 20 19 1μF No.A0098-3/14 LV4901H Pin Equivalent Circuit Pin No. 1 Pin name STBY I/O I Description Equivalent Circuit Standby mode control VD 100kΩ 1 1kΩ 500kΩ GND 2 MUTE I Muting control VD 100kΩ 1kΩ 2 GND 3 VIN1 I Channel 1 input VD 3 300Ω 30kΩ VBIAS GND 4 VIN2 I Channel 2 input VD 4 300Ω 30kΩ VBIAS GND 5 BIASCAP O Internal regulator decoupling capacitor VD connection 100kΩ 1kΩ 5 100kΩ GND Continued on next page. No.A0098-4/14 LV4901H Continued from preceding page. Pin No. 6 Pin name VBIAS I/O O Description Equivalent Circuit Internal regulator decoupling capacitor VD connection 100Ω 6 100Ω GND 7 HP_GND1 8 HP_OUT1 Headphone ground of channel 1 O Headphone channel 1 output VD2 8 1.2kΩ HP_GND 9 VCC O Internal power supply decoupling capacitor VD connection 9 2kΩ GND 10 GND 11 HP_OUT2 Analog system ground O Headphone channel 2 output VD2 11 1.2kΩ HP_GND 12 HP_GND2 Headphone ground of channel 2 13 NC NC 14 MUTE_CAP O Muting system capacitor connection VCC VDD 1kΩ 1kΩ 14 100kΩ GND *VD2 : 9V line of Headphone Amp block Continued on next page. No.A0098-5/14 LV4901H Continued from preceding page. Pin No. 15 Pin name RF_CAP I/O O Description Headphone Ripple filter Equivalent Circuit VD 1kΩ 500Ω 15 5kΩ 30kΩ HP_GND 16 HP_IN1 I Headphone channel 1 input VD 16 PREVD 200Ω 20kΩ VREF HP_GND 17 HP_IN2 I Headphone channel 2 input VD 17 PREVD 200Ω 20kΩ VREF HP_GND 18 HP_STBY I Headphone standby mode control VD 50kΩ 10kΩ 18 HP_GND 19 PVD2 20 PVD2 21 OUT2+ Channel 2 power system power supply Channel 2 power system power supply O Channel 2 high side output VD 21 GND 22 BOOT2+ I/O Boot strap terminal, Channe 2 positive supply of high side *PREVD : 6V line of Headphone Amp block Continued on next page. No.A0098-6/14 LV4901H Continued from preceding page. Pin No. 23 Pin name VDD2 I/O Description O Channel 2 internal regulator decoupling capacitor Equivalent Circuit VD connection 23 2kΩ GND 24 BOOT2- I/O 25 OUT2- O Boot strap terminal, Channel 2 positive supply of high side Channel 2 low side output VD 25 GND 26 PGND2 Channel 2 power system ground 27 PGND2 Channel 2 power system ground 28 PGND1 Channel 1 power system ground 29 PGND1 Channel 1 power system ground 30 OUT1- O Channel 1 low side output VD 30 GND 31 BOOT1- I/O 32 VDD1 O Boot strap terminal, Channel 1 positive supply of high side Channel 1 internal regulator decoupling capacitor VD connection 32 2kΩ GND 33 BOOT1+ I/O Boot strap terminal, Channel 1 positive supply of high side Continued on next page. No.A0098-7/14 LV4901H Continued from preceding page. Pin No. 34 Pin name OUT1+ I/O O Description Channel 1 high side output Equivalent Circuit VD 34 GND 35 PVD1 Channel 1 power system power supply 36 PVD1 Channel 1 power system power supply Note : Smoothing capacitors must be connected to each power supply pin. No.A0098-8/14 LV4901H LV4901H Customer bread board rev.1.0 Pattern Silk No.A0098-9/14 LV4901H Components * * * Symbol Part No. ----- JK1 Jack for D-Amp input. ----- JK2 Jack for HP output. ----- JK3 Jack for HP input. ----- SW1 STBY switch. Lower position : standby state. ----- SW2 MUTE switch. Lower position : mute state. ----- SW3 CHPO C1, C2 CRFCAP C3 Function HP stanby switch. Lower position : standby state. HP output coupling capacitors. HP_Mute capacitor for soft mute. CIN C4, C5, C10, C11 CBIASCAP C6 Internal regulator (VBIAS) input decoupling capacitor. Input coupling capacitors. CVBIAS C7 Internal regulator (VBIAS) output decoupling capacitor. CVCC C8 Internal regulator (VCC) output decoupling capacitor. CMUTE C9 Soft muting time constant adjustment capacitor. CVDD C12, C13 internal regulator (VDD) output decoupling capacitors. CVD C14, C15 VD high-frequency attenuation capacitors. CBOOT C16, C17, C18, C19 L L1, L2, L3, L4 C C20, C21, C22, C23 CL C24, C25 Capacitor between outputs. CPVD C26 VD power supply capacitor. Boot strap capacitors. Output low-pass filter coils : fc = 1/ (2π√LC) Output low-pass filter capacitors. * CVDD, CVD and CBOOT, Each capacitor is arranged in the neighborhood of IC as much as possible No.A0098-10/14 LV4901H Digital amplifier block characteristics Ist -- VD 16 Imute -- VD 16 RL = 8Ω Rg = 0 STBY = L MUTE = L Muting current, Imute – mA Standby current, Ist – μA 20 12 8 4 0 RL = 8Ω Rg = 0 STBY = H MUTE = L 12 8 4 0 0 2 4 6 8 10 12 14 0 2 Externally applied voltage, VD – V ICCO -- VD 60 6 8 10 12 14 12 14 12 14 VCC -- VD 10 RL = 8Ω Rg = 0 STBY = H MUTE = H Supply voltage, VCC – V Quiescent current, ICCO – mA 80 4 Externally applied voltage, VD – V 40 20 0 RL = 8Ω Rg = 0 8 6 4 2 0 0 2 4 6 8 10 12 0 14 2 Externally applied voltage, VD – V VBIAS -- VD 8 4 6 8 10 Externally applied voltage, VD – V 6 RL = 8Ω Rg = 0 VDD -- VD RL = 8Ω Rg = 0 Supply voltage, VDD – V 5 VBIAS – V 6 4 2 4 3 2 1 0 0 2 4 6 8 10 12 0 0 14 2 Externally applied voltage, VD – V 10 7 5 3 2 Power -- VIN 20 VD = 12V fin = 1kHz 2ch-Drive AES17 16 1.0 7 5 3 2 RL = Power – W Power – W 100 7 5 3 2 4Ω RL = 8Ω 0.1 7 5 3 2 6 8 10 Power -- VD fin = 1kHz THD+N = 10% 2ch-Drive AES17 RL = 12 4Ω RL = 8Ω 8 4 0.01 10 4 Externally applied voltage, VD – V 2 3 5 7 100 2 3 Input voltage, VIN – mVp 5 7 1000 0 10 11 12 14 13 Externally applied voltage, VD – V No.A0098-11/14 LV4901H THD+N – % 3 2 THD+N -- Power fin = 1kHz 3 2 0.1 7 5 0.1 7 5 3 2 0.01 7 5 3 2 fin = 100Hz 3 2 0.01 0.001 2 3 VD = 12V RL = 8Ω PO = 1W 2ch-Drive AES17 1 7 5 3 2 fin = 6.67kHz 1 7 5 THD+N -- Frequency 10 7 5 3 2 VD = 12V RL = 8Ω 2ch-Drive AES17 THD+N – % 10 7 5 0.001 5 70.01 2 3 5 7 0.1 2 3 5 7 1 2 3 5 7 10 10 2 3 5 7 100 Power – W 10 Response -- Frequency Phase – deg Response – dB 2 3 5 7100k 2 3 5 7100k 0 – 20 – 40 – 60 VD = 12V RL = 8Ω PO = 1W – 80 – 30 – 100 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k 10 2 3 5 7 100 Frequency, f – Hz CH Sep. -- Frequency 5 7 1k 2 3 5 7 10k VNO -- Rg 1 VD = 12V RL = 8Ω Rg = 0 VO = 0dBm DIN AUDIO 7 5 – 40 – 60 2 3 Frequency, f – Hz Noise, VNO – mVrms Channel separation, CH Sep. – dB 5 7 10k 20 – 20 CH1→CH2 VD = 12V RL = 8Ω A-weight 3 2 CH1 CH2 0.1 7 5 3 2 CH2→CH1 – 80 0.01 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 710k 2 3 5 7100k 1 2 3 5 7 10 2 3 5 7100 2 3 5 7 1k Rg – Ω Frequency, f – Hz – 10 – 20 SVRR -- Ripple Frequency 2 3 5 710k 2 3 5 7100k Efficiency -- Power 100 VD = 12V RL = 8Ω Rg = 0 VDr = 0dBm A-weight RL = 8Ω 80 Efficiemcy – % 0 Ripple rejection ratio, SVRR – dB 2 3 Phase -- Frequency 40 VD = 12V RL = 8Ω PO = 1W – 10 – 20 5 7 1k Frequency, f – Hz 0 0 2 3 – 30 – 40 RL = 4Ω 60 40 – 50 VD = 12V fin = 1kHz 2ch-Drive AES17 20 – 60 CH1 CH2 – 70 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k Ripple Frequency – Hz 2 3 5 7100k 0 0 2 4 6 8 10 12 14 16 Power – W No.A0098-12/14 LV4901H Headphone amplifier block characteristics ICCOhp -- VD 10 Headphone output, HP_OUT – V 6 ICCOhp – mA HP_OUT -- VD 4 RL = 16Ω Rg = 0 HP_STBY = H 4 2 0 RL = 16Ω Rg = 0 3 2 1 0 0 2 4 6 8 10 12 0 14 2 Externally applied voltage, VD – V Power -- VD 100 Power – W Power – W 60 40 RL = 16Ω fin = 1kHz THD+N = 10% 2ch-Drive 20 11 12 13 14 0.001 7 5 3 2 0.0001 7 5 3 2 0.00001 10 100 7 5 3 2 fin = 1kHz –1 7 5 3 2 fin = 100Hz 0.1 7 5 3 2 THD+N – % THD+N – % 10 7 5 3 2 2 3 5 710 2 3 5 7100 2 3 5 10 7 5 3 2 2 100 3 5 7 1k THD+N -- Frequency 1 7 5 3 2 0 Channel separation, CH Sep. – dB VD = 12V RL = 16Ω PO = 10mW 0 Response – dB 7 2 3 5 7 100 – 10 – 20 – 30 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7 100k Frequency, f – Hz Response -- Frequency 10 14 VD = 12V RL = 16Ω fin = 1kHz 2ch-Drive Power – mW 0 12 VD = 12V RL = 16Ω PO = 10mW 2ch-Drive DIN AUDIO 0.1 7 5 3 2 0.01 10 fin = 10kHz 0.01 0.001 2 3 5 70.01 2 3 5 70.1 2 3 5 7 1 10 Input voltage, VIN – mVp THD+N -- Power VD = 12V RL = 16Ω 2ch-Drive DIN AUDIO 8 0.1 7 5 3 2 0.01 7 5 3 2 Externally applied voltage, VD – V 100 7 5 3 2 6 Power -- VIN 1 7 5 3 2 80 0 10 4 Externally applied voltage, VD – V – 20 CH Sep. -- Frequency VD = 12V RL = 16Ω fin = 1kHz Rg = 0 VO = 0dBm DIN AUDIO – 40 CH2→CH1 CH1→CH2 – 60 2 3 5 7100 2 3 5 7 1k 2 3 5 710k 2 3 5 7100k 2 3 5 71000k Frequency, f – Hz 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k Frequency, f – Hz No.A0098-13/14 LV4901H VNO -- Rg 0 Noise, VNO – mVrms 7 CH1 5 CH2 3 2 VD = 12V RL = 16Ω DIN AUDIO 0.01 1 2 3 5 7 10 Ripple rejection ratio, SVRR – dB 0.1 – 20 SVRR -- Ripple Frequency VD = 12V RL = 16Ω fin = 100Hz Rg = 0 VDr = 0dBm DIN AUDIO – 40 – 60 CH1 – 80 CH2 – 80 2 3 5 7100 2 3 5 7 1k 2 3 5 710k 2 3 5 7100k Rg – Ω 10 2 3 5 7 100 2 3 5 7 1k 2 3 5 7 10k 2 3 5 7100k Ripple Frequency – Hz SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of July, 2008. Specifications and information herein are subject to change without notice. PS No.A0098-14/14