Ordering number : ENA0596 Monolithic Linear IC LA6541NH For CD Players and Recorders Four-Channel Driver IC Overview The LA6541NH is a four-channel driver IC for CD players and recorders (four BTL amplifier channels). Functions • Four BTL connection power amplifier channels • IO max 0.7A • Built-in level shifters • Muting circuit (on/off control of all outputs) (This circuit applies to the BTL amplifier circuits. It does not control operation of the regulator.) • Built-in regulator (provides a 5V output using an external pnp transistor) • Thermal protection circuit (thermal shutdown circuit) Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Symbol Conditions Ratings Unit VCC max 14 V Maximum input voltage VIN 13 V Maximum output current IO max Muting pin application voltage VMUTE Allowable power dissipation Pd max For each of the channel 1 to 4 outputs Independent IC Specified circuit board 0.7 A 13 V 0.8 W 1.8 W Operating temperature Topr -30 to +85 °C Storage temperature Tstg -55 to +150 °C * Specified substrate : 76.1mm×114.3mm×1.6mm, glass epoxy board. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 22107 MS PC B8-7421 No.A0596-1/9 LA6541NH Recommended Operating Conditions at Ta = 25°C Parameter Symbol Supply voltage 1 VCC1 Supply voltage 2 VCC2 Conditions Ratings Only used by the BTL amplifiers Unit 5.6 to 13 V 3.9 to 13 V (Not used by the 5V regulator circuit) Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8V, VREF = 2.5V, unless otherwise specified. Parameter Symbol Ratings Conditions min typ Unit max Overall Characteristics No-load current drain, on state ICCON All outputs on, MUTE : high 20 40 mA No-load current drain, off state ICCOFF All outputs off, MUTE : low 15 35 mA 175 200 °C 50 mV Thermal shutdown circuit TSD (Design guarantee value *1) 150 The voltage difference between each of the -50 operating temperature Output Amplifier Block Output offset voltage VOFF + or - outputs. VREF input voltage range VINVREF Output voltage VO 1.5 The voltage across the outputs when 4 VCC-1.5 V 4.7 V 9 dB RL = 8Ω Voltage gain, input to output VG The voltage gain from an input to the corresponding +/- outputs.*2 Slew rate Muting on voltage SR VMUTE (Design guarantee value *1) The voltage at which the output on/off state 0.15 V/μs 1.2 V changes Power Supply Block (Using a 2SB632K) 5V power supply voltage IO = 200mA 4.75 5.00 5.25 V Line regulation ΔVOLIN 5.6V ≤ VCC ≤ 12V 20 100 mV Load regulation ΔVOLOAD 5mA ≤ IO ≤ 200mA 50 150 mV Reset Block RESET pin high-level voltage VORH RESET pin low-level voltage VORL RESET pin threshold voltage RESET pin hysteresis RESET pin output delay time 4.98 5.23 V ISRL = 2mA, Cd-GND 100 200 mV VRT *4 4.2 VHYS *5 td 4.73 Cd = 0.1μF 40 100 10 V 200 mV ms *1 : These parameters are not tested. *2 : The gain from input to output when only the VIN* pins are used. *3 : The MUTE pin voltage when the output changes between the on and off states. When the MUTE pin is high, all the BTL amplifiers will be on, and the when MUTE is low, all the BTL amplifiers will be off. *4 : The 5V regulator voltage when the RESET pin goes from high to low. *5 : The 5V regulator voltage difference between the RESET pin going from high to low the RESET pin going from low to high. That is, the hysteresis. No.A0596-2/9 LA6541NH Package Dimensions unit : mm (typ) 3233B HEAT SPREADER 15.2 (6.2) 0.65 7.9 10.5 15 (4.9) 28 1 14 0.8 0.25 2.45max 0.3 0.1 (2.25) 2.0 2.7 SANYO : HSOP28H(375mil) Pd max – Ta 2.5 Allowable power dissipation, Pd max – W (0.8) Specified circuit board : 76.1×114.3×1.6mm3 glass epoxy board 2 1.8 Mounted on a circuit board 1.5 1 0.8 0.94 Independent IC 0.5 0 – 30 0.42 0 20 40 60 80 100 Ambient temperature, Ta – °C No.A0596-3/9 LA6541NH Block Diagram VCC1 1 MUTE 2 Mute (output on/off control) 28 VCC2 27 VREF 15.4kΩ 15.4kΩ 11kΩ 11kΩ 26 VIN4 VG1 4 25 VG4 VO1+ 5 24 VO4+ VO1- 6 23 VO4- (NC) 7 22 (NC) FR Level shifter 3 Level shifter VIN1 GND GND FR 21 (NC) VO2- 9 20 VO3- VO2+ 10 19 VO3+ VG2 11 18 VG3 17 VIN3 16 CD 15 RESET Level shifter 8 Level shifter (NC) 15.4kΩ 15.4kΩ 11kΩ 11kΩ VIN2 12 REG_C 13 REG_B 14 Connect to the external pnp transistor collector. 5VREG Connect to the external pnp transistor base. RESET No.A0596-4/9 LA6541NH Pin Functions Pin No. Pin 1 VCC1 Power supply (This pin is shorted to VCC2 (pin 28) 2 MUTE Output on/off control 3 VIN1 Channel 1 input 4 VG1 Channel 1 input (Gain setting) 5 Channel 1 output (+) 6 VO1+ VO1- 7 (NC) (This pin must not be used.) 8 (NC) (This pin must not be used.) 9 Channel 2 output (-) 10 VO2VO2+ Channel 2 output (+) 11 VG2 Channel 2 input (Gain setting) 12 VIN2 Channel 2 input 13 REG_C 14 REG_B Connect this pin to the external pnp transistor base. 15 RESET Reset output 16 CD 17 VIN3 Description Channel 1 output (-) Connect this pin to the external pnp transistor collector. (This is the 5 V regulator output) Connection for the reset delay time setting capacitor Channel 3 input (Gain setting) 18 VG3 Channel 3 input (Gain setting) 19 Channel 3 output (+) 20 VO3+ VO3- 21 (NC) (This pin must not be used.) 22 (NC) (This pin must not be used.) 23 Channel 4 output (-) 24 VO4VO4+ 25 VG4 Channel 4 input (Gain setting) 26 VIN4 Channel 4 input (Gain setting) 27 VREF Reference voltage input 28 VCC2 Power supply (This pin is shorted to VCC1 (pin 1) Channel 3 output (-) Channel 4 output (+) No.A0596-5/9 LA6541NH Equivalent Circuits Pin No. 3 4 12 11 17 18 26 25 Pin VIN1 VG1 Description Equivalent circuit Input pins. VING* VIN* VCC VIN2 VG2 GND VIN3 VG3 GND VCC 11kΩ VIN4 VG4 GND 5 6 10 9 19 20 24 23 VO1+ VO1VO2+ VO2VO3+ VO3VO4+ VO4- Output pins. VCC 33kΩ VCC VO*-/+ GND GND 2 MUTE Muting control input. VCC The outputs will be on when the MUTE pin VCC is at the high level. The outputs will be off when the MUTE pin MUTE is at the low level ; in particular, the outputs 40kΩ go to the high-impedance state at this GND time. 30kΩ 27 VREF Reference voltage input. VREF VCC VCC GND GND Continued on next page No.A0596-6/9 LA6541NH Continued from preceding page. Pin No. 15 Pin RESET Description Equivalent circuit Reset output. VCC When REG C (5VREG) is high, RESET will be high. REG_C (5VREG) When REG C (5VREG) is low, RESET will GND VCC be low. See section 11, Reset Operation, for details on the reset operation. RESET GND GND 16 CD Reset output delay time setting. The delay time until the point the reset output switches from low to high is set by the capacitor connected between this pin and ground. See section 11, Reset Operation, for details on the reset operation. VCC GND GND CD No.A0596-7/9 LA6541NH Application Circuit Example VCC 1 VCC1 VCC2 28 VREF input (Reference voltage) MUTE 2 MUTE VREF 27 3 VIN1 VIN4 26 4 VG1 VG4 25 5 VO1+ VO4+ 24 SPINDLE input FOCUS input FOCUS M SPINDLE 6 VO1- VO4- 23 7 (NC) (NC) 22 GND LA6541NH GND 8 (NC) (NC) 21 9 VO2- VO3- 20 TRACKING M 10 VO2+ VO3+ 19 11 VG2 VG3 18 12 VIN2 VIN3 17 CD 16 SPINDLE input TRACKING input 100μF 5V input + 13 REG_C Reset delay time setting 14 REG_B RESET 15 VCC No.A0596-8/9 LA6541NH Reset Operation REG C (5VREG) 5V 100mV 4.2V T RESET td T td *1 : td is the delay time. It is set by an external capacitor connected between the CD pin and ground). *2 : The voltage at which RESET changes state is a typical value (voltage). SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of February, 2007. Specifications and information herein are subject to change without notice. PS No.A0596-9/9