FAIRCHILD FAN7631SJ

FAN7631
Advanced Pulse Frequency Modulation (PFM)
Controller for Half-Bridge Resonant Converters
Features
Description

Variable Frequency Control with 50% Duty Cycle
for Half-Bridge Resonant Converter Topologies






High Efficiency with Zero-Voltage-Switching (ZVS)
The FAN7631 is a pulse-frequency modulation controller
for high-efficiency half-bridge resonant converters that
includes a high-side gate drive circuit, an accurate
current-controlled oscillator, and various protection
functions. The FAN7631 features include variable dead
time, operating frequency up to 600kHz, protections such
as LUVLO, and a selectable latch or A/R protection using
the LS pin for user convenience.

Simple Remote On/Off Control with Latch or
Auto-Restart (A/R) Using FI or LS Pin

Protection Functions: Over-Voltage Protection
(OVP), Overload Protection (OLP), Over-Current
Protection (OCP), Abnormal Over-Current Protection
(AOCP), Internal Thermal Shutdown (TSD), and
High Precise Line Under-Voltage Lockout (LUVLO)

Level-Change OCP Function During Startup
Up to 600kHz Operating Frequency
Built-in High-Side Gate Driver
High Gate-Driving Current: +500mA/-1000mA
Programmable Dead Time with a Resistor
Pulse Skipping and Burst Operation for Frequency
Limit (Programmable) at Light-Load Condition
Applications





The Zero-Voltage-Switching (ZVS) technique reduces the
switching losses and improves the efficiency significantly.
ZVS also reduces the switching noise noticeably, which
allows a small Electromagnetic Interference (EMI) filter.
Offering everything necessary to build a reliable and
robust resonant converter, the FAN7631 simplifies
designs and improves productivity and performance. The
FAN7631 can be applied to resonant converter
topologies such as series resonant, parallel resonant,
and LLC resonant converters.
Related Resources
AN4151 — Half-Bridge LLC Resonant Converter Design
Using FSFR-Series Fairchild Power Switch (FPS™)
PDP and LCD TVs
Desktop PCs and Servers
Video Game Consoles
Adapters
Telecom Power Supplies
Ordering Information
Part Number
Operating Junction
Temperature
FAN7631SJ
FAN7631SJX
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
-40C ~ 130C
Package
16-Lead, Small-Outline Package (SOP)
Packaging
Method
Tube
Tape & Reel
www.fairchildsemi.com
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
April 2012
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Application Circuit Diagram
Figure 1.
Typical Application Circuit (Resonant Half-Bridge Converter)
Block Diagram
Figure 2.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
Internal Block Diagram
www.fairchildsemi.com
2
Figure 3.
Package Pin Assignments (16SOP)
Pin Definitions
Pin #
Name
Description
1
CON
This pin is used to enable / disable the gate drive outputs for pulse-skipping operation. When the
voltage of this pin is above 0.6V, the gate drive outputs are enabled. When the voltage of this pin
drops below 0.4V, gate drive signals for both MOSFETs are disabled.
2
RT
This pin programs the switching frequency. Typically, an opto-coupler is connected to this pin to
control the switching frequency for the output voltage regulation.
3
SS
This pin is used to program the soft-start time and overload protection delay. It also programs the
restart delay when the converter auto recovers from the protection states. Typically, a small
capacitor is connected on this pin.
4
DT
This pin is to adjust the dead time using an external resistor.
5
NC
No connection
6
FI
User protection function / fault input. This pin can be used as a latch protection, which is
operated when a voltage applied to this pin is higher than 4VDC.
7
SG
This pin is the ground of the control part.
8
LS
This pin senses the line voltage for line under-voltage lockout (LUVLO).
9
CS
This pin senses the current flowing through the main MOSFET. Typically, negative voltage is
applied on this pin.
10
PG
This pin is the power ground. This pin typically connects to the source of the low-side MOSFET.
11
LO
This pin is used for the low-side gate-driving signal.
12
LVCC
13
NC
14
CTR
This pin is connected to the drain of the low-side MOSFET. Typically, a transformer is connected
to this pin.
15
HO
This pin is used for the high-side gate-driving signal.
16
HVCC
This pin is for the supply voltage of the control IC and low-side gate-driving circuit.
No connection
This pin is used for the supply voltage of the high-side gate-driving circuit.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
www.fairchildsemi.com
3
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Pin Configuration
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions. Extended exposure to stresses above the recommended
operating conditions may affect device reliability so that any test which is stressing the parts to these levels is not
recommended. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.
Symbol
Parameter
Min.
HVCC to VCTR High-Side VCC Pin to Center Voltage
HVCC
VHO
Max.
Unit
-0.3
25.0
V
-0.3
625.0
V
High-Side Gate\-Driving Voltage
VCTR-0.3
HVCC+0.3
V
High-Side Offset Voltage
High-Side Floating Supply Voltage
HVCC-25
HVCC+0.3
V
Allowable Negative VCTR at 15VDC Applied HVCC to CTR Pin
-9.8
-7.0
V
Low-Side Supply Voltage
-0.3
25.0
V
VLO
Low-Side Gate Driving Voltage
-0.3
LVCC
V
VCON
Control Pin Input Voltage
-0.3
LVCC
V
VCS
Current Sense (CS) Pin Input Voltage
-5.0
1.0
V
VRT
RT Pin Input Voltage
-0.3
5.0
V
VCTR
LVCC
fsw
Recommended Switching Frequency
10
600
kHz
VLS
LS Pin Input Voltage
-0.3
LVCC
V
VFI
FI Pin Input Voltage
-0.3
LVCC
V
VSS
SS Pin Input Voltage
-0.3
Internally
(1)
Clamped
V
VDT
DT Pin Input Voltage
-0.3
Internally
(1)
Clamped
V
50
V/ns
1.24
W
dVCTR/dt
PD
Allowable CTR Voltage Slew Rate
Total Power Dissipation
(2)
TJ
TSTG
Maximum Junction Temperature
+150
Recommended Operating Junction Temperature
Storage Temperature Range
(2)
-40
+130
-55
+150
C
C
Notes:
1. VSS and VDT are internally clamped at 5.0V, which has a tolerance between 4.75V and 5.25V.
2. The maximum value of the recommended operating junction temperature is limited by thermal shutdown.
Thermal Impedance
Symbol
θJA
Parameter
Junction-to-Ambient Thermal Impedance
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
Value
Unit
102
ºC/W
www.fairchildsemi.com
4
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Absolute Maximum Ratings
TA=25C and LVCC=17V unless otherwise specified.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
Supply Section
ILK
Offset Supply Leakage Current
HVCC=VCTR
50
μA
IQHVCC
Quiescent HVCC Supply Current
HVCC,START- 0.1V, VCTR=0V
50
120
μA
IQLVCC
Quiescent LVCC Supply Current
LVCC,START - 0.1V, VCTR=0V
100
200
μA
fOSC=100kHz, CLoad=1nF,
VCON > 0.6V, VCTR=0V
3.0
4.5
mA
fOSC=300kHz, CLoad=1nF,
VCON > 0.6V, VCTR=0V
8
10
mA
100
200
μA
fOSC=100kHz, CLoad=1nF
VCON > 0.6V, VCTR=0V
5
7
mA
fOSC=300kHz, CLoad=1nF,
VCON > 0.6V, VCTR=0V
10
14
mA
fOSC=300kHz, VCON < 0.4V,
VCTR=0V (No Switching)
2.6
3.5
mA
V
IOHVCC
Operating HVCC Supply Current
(3)
(RMS Value)
fOSC=300kHz, VCON < 0.4V,
VCTR=0V (No Switching)
IOLVCC
Operating LVCC Supply Current
(3)
(RMS Value)
UVLO Section
LVCC,START
LVCC UVLO Turn-On Threshold
11.2
12.5
13.8
LVCC,STOP
LVCC UVLO Turn-Off Threshold
8.9
10.0
11.1
LVCC,HYS
LVCC UVLO Hysteresis
2.5
V
V
HVCC,START
HVCC UVLO Turn-On Threshold
8.2
9.2
10.2
V
HVCC,STOP
HVCC UVLO Turn-Off Threshold
7.8
8.7
9.6
V
HVCC,HYS
HVCC UVLO Hysteresis
0.5
V
Oscillator & Feedback Section
VBH
Pulse Skip Disable Threshold Voltage
0.54
0.60
0.66
V
VBL
Pulse Skip Enable Threshold Voltage
0.36
0.40
0.44
V
VRT
Regulated RT Voltage
1.5
2.0
2.5
V
fOSC
Output Oscillation Frequency
RT=11.6kΩ, CSS=1nF
48
50
52
RT=2.7kΩ, CSS=1nF
188
200
212
DC
Output Duty Cycle
RT=11.6kΩ, CLoad=100pF
49
50
51
RT=2.7kΩ, CLoad=100pF
48
50
52
kHz
%
Soft-Start and Restart Section
ISS1
Soft-Start Current 1
VCSS=0V, LVCC=17V
3
ISS2
Soft-Start Current 2
VCSS=1.6V, LVCC=17V
25
30
35
μA
Soft-Start Start Voltage
CSS=1nF, VCON=3V
1.5
1.6
1.7
V
VSS_START
VSS_END
VSSC
mA
Soft-Start End Voltage
CSS=1nF, VCON=3V
4.0
4.2
4.4
V
Clamped Soft-Start Voltage
CSS=1nF, VCON=3V
4.75
5.00
5.25
V
fOSC_SS
Initial Output Oscillation Frequency
During Soft-Start
VRT-CON
RT-CON Voltage for Startup
RT=11.6kΩVCSS=1.6V
300
RT=5.8kΩ
530
RT=2.7kΩ
kHz
600
60
120
mV
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
www.fairchildsemi.com
5
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics
TA=25C and LVCC=17V unless otherwise specified.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
Output Section
Isource
Isink
Peak Sourcing Current
LVCC=HVCC=17V,
TJ=-40C ~ 130C
500
mA
Peak Sinking Current
HVCC=17V,
TJ=-40C ~ 130C
1000
mA
tr
Rising Time
tf
Falling Time
HVCC=17V, CLoad=1nF
VHOH
High Level of High-Side Gate Signal
(VHVCC-VHO)
VHOL
Low Level of High-Side Gate Signal
VLOH
High Level of Low-Side Gate Signal
(VLVCC-VLO)
VLOL
Low Level of Low-Side Gate Signal
40
ns
20
ns
IO=20mA
1.0
V
0.6
V
1.0
V
0.6
V
μA
Protection Section
IOLP
OLP Sink Current
VOLP
OLP Threshold Voltage
tBOL
OLP Blanking Time(3)
VOCP
OCP Threshold Voltage
tBO
VAOCP
(3)
OCP Blanking Time
AOCP Threshold Voltage
25
30
35
-0.42
-0.37
-0.32
V
150
200
250
ns
-0.62
-0.56
-0.50
V
150
200
250
ns
-1.21
-1.10
-0.99
V
(3)
tBAO
AOCP Blanking Time
50
tDA
Delay Time (Low Side) Detecting from
(3)
VAOCP to Switch Off
250
400
ns
21
23
25
V
2.88
3.00
3.12
V
9
10
11
μA
VOVP
LVCC Over-Voltage Protection
VLINE
Line UVLO Threshold Voltage
ILINE
Line UVLO Hysteresis Current
VLS Sweep, -40C ~ 130C
VLS=2V
(3)
ns
TSD
Thermal Shutdown Temperature
130
140
150
C
VFI
Fault Input Threshold Voltage for Latch
Operation
3.8
4.0
4.2
V
ILR
Latch-Protection Sustain LVCC Supply
Current
100
150
μA
VLR
Latch-Protection Reset LVCC Supply
Voltage
LVCC=7.5V
5
V
Dead-Time Control Section
DT
Dead Time
RDT=2.7k, CLoad=1nF
100
150
200
RDT=18k, CLoad=1nF
250
350
450
Short, CLoad=1nF
50
Open, CLoad=1nF
1000
Recommended Dead Time Range
100
ns
600
Note:
3. This parameter, although guaranteed, is not tested in production.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
www.fairchildsemi.com
6
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics (Continued)
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
These characteristic graphs are normalized at TA=25ºC.
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [Ԩ]
LVCC Start Voltage vs. Temperature
Figure 5.
1.20
1.20
1.15
1.15
1.10
1.10
1.05
1.00
0.95
75
100
120
LVCC Stop Voltage vs. Temperature
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [Ԩ]
Figure 6.
25
50
75
100
120
Temperature [Ԩ]
HVCC Start Voltage vs. Temperature
Figure 7.
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
50
Temperature [Ԩ]
Normalized
Normalized
Figure 4.
25
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
HVCC Stop Voltage vs. Temperature
0.80
-40
-20
0
25
50
75
100
120
-40
Temperature [Ԩ]
0
25
50
75
100
120
Temperature [Ԩ]
Figure 8. Pulse Skip Disable Voltage vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
-20
Figure 9. Pulse Skip Enable Voltage vs. Temperature
www.fairchildsemi.com
7
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
These characteristic graphs are normalized at TA=25ºC.
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
Figure 10. Regulated RT Voltage vs. Temperature
50
75
100
120
Figure 11. Output Oscillation Frequency (RT=11.6k)
vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
25
Temperature [Ԩ]
Temperature [Ԩ]
1.05
1.00
0.95
0.90
0.85
1.05
1.00
0.95
0.90
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [Ԩ]
25
50
75
100
120
Temperature [Ԩ]
Figure 12. Output Oscillation Frequency (RT=2.7k)
vs. Temperature
Figure 13. Output Duty Cycle (RT=11.6k)
vs. Temperature
1.30
1.20
1.15
1.20
Normalized
Normalized
1.10
1.05
1.00
0.95
1.10
1.00
0.90
0.90
0.80
0.85
0.80
0.70
-40
-20
0
25
50
75
100
120
-40
Temperature [Ԩ]
0
25
50
75
100
120
Temperature [Ԩ]
Figure 15. ISS1 vs. Temperature
Figure 14. Output Duty Cycle (RT=2.7k)
vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
-20
www.fairchildsemi.com
8
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
These characteristic graphs are normalized at TA=25ºC.
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [Ԩ]
50
75
100
120
Figure 17. fOSC_SS (RT=11.6k) vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
Figure 16. ISS2 vs. Temperature
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
25
50
75
100
120
Temperature [Ԩ]
Temperature [Ԩ]
Figure 19. VOLP vs. Temperature
Figure 18. fOSC_SS (RT=2.7k) vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
25
Temperature [Ԩ]
1.05
1.00
0.95
1.05
1.00
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
Temperature [Ԩ]
0
25
50
75
100
120
Temperature [Ԩ]
Figure 20. IOLP vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
-20
Figure 21. VOCP vs. Temperature
www.fairchildsemi.com
9
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA=25ºC.
1.15
1.10
1.10
Normalized
1.20
1.15
Normalized
1.20
1.05
1.05
1.00
1.00
0.95
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
120
-40
-20
0
Temperature [Ԩ]
50
75
100
120
Figure 23. VOVP vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
1.05
1.05
Normalized
Normalized
Figure 22. VAOCP vs. Temperature
1.00
0.95
0.90
1.00
0.95
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
25
50
75
100
120
Temperature [Ԩ]
Temperature [Ԩ]
Figure 24. VLINE vs. Temperature
Figure 25. ILINE vs. Temperature
1.20
1.20
1.15
1.15
1.10
1.10
Normalized
Normalized
25
Temperature [Ԩ]
1.05
1.05
1.00
1.00
0.95
0.95
0.90
0.90
0.85
0.85
0.80
0.80
-40
-20
0
25
50
75
100
-40
120
-20
0
25
50
75
100
120
Temperature [Ԩ]
Temperature [Ԩ]
Figure 26. VFI vs. Temperature
Figure 27. Dead Time (DT=150ns) vs. Temperature
1.20
1.15
Normalized
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40
-20
0
25
50
75
100
120
Temperature [Ԩ]
Figure 28. Dead Time (DT=350ns) vs. Temperature
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
www.fairchildsemi.com
10
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
such as DT pin short-to-ground and lift open, shuntresistor and series resistor RDT,Short and RDT,Open are
internally connected to the DT pin. Even when this pin is
shorted to ground and lifted open, the dead time is
limited to 50ns (short to ground) and 1000ns (lifted
open). Since the internal resistors have relatively large
tolerance, it is recommended to set the dead time
between 150ns and 600ns to minimize the dead time
variation by the internal resistor tolerance.
1. Internal Oscillator
Figure 29 shows the simplified circuit of internal currentcontrolled oscillator and typical circuit configuration for
the RT pin. Internally, the voltage on the RT pin is
regulated at 2V by the V/I converter. The charging /
discharging current for the oscillator capacitor, CT, is
obtained by mirroring the current flowing out of the RT
pin (ICTC). By comparing the capacitor voltage with VTH
and VTL and driving S/R flip-flop with the comparator
outputs, the clock signal is obtained. Thus, the switching
frequency increases as the RT pin current increases.
Dead Time
As can be seen in Figure 29, an opto-coupler transistor is
typically connected to the RT pin through Rmax to
modulate the switching frequency. During an overload
condition, the opto-coupler is fully turned off and ICTC is
solely determined by Rmin, which sets the minimum
frequency. Meanwhile, the maximum switching frequency
is obtained when the opto-coupler is fully turned on.
Considering the typical saturation voltage of optotransistor (0.2V), the maximum frequency can be
obtained by Rmax and Rmin as:
f min 
11.6k 
 50kHz
Rmin
f max  (
11.6k  10.4k 

)  50kHz
Rmin
Rmax
HO Output
LO Output
time
Figure 30. Gate Driving Signals
Dead time(ns)
600
(1)
500
400
300
200
100
0
0
10
20
30
40
50
60
Dead time resistor (RDT, KΩ)
Figure 31. Dead Time vs. RDT
3. Soft-Start
Figure 29. Current-Controlled Oscillator
Since the voltage gain of the resonant converter is
inversely proportional to the switching frequency, the
soft-start is implemented by sweeping down the
switching frequency from a high initial frequency until the
output voltage is established. The current-steering circuit
connected to SS pin adaptively changes the sinking and
sourcing current of the SS pin to set soft-start time, OLP
shutdown delay, and restart time. As illustrated in Figure
32, the sourcing current, ISS1 (3mA), is enabled at the
beginning of startup, which rapidly raises VSS up to
VSS_START (1.6V). Then the sourcing current is switched to
ISS2 (30µA) and gate drive signals are enabled. Due to
the small value of ISS2, the SS pin voltage slowly rises,
allowing slow decrease of the switching frequency.
2. Gate Driver and Dead Time Programming
The FAN7631 employs a gate drive circuit with high
driving capability (source: 0.5A / sink: 1A) to cover a wide
variety of applications. The two gate drive signals (LO
and HO) are complimentary; each signal has 50% duty
cycle, including the dead time, as shown in Figure 30.
The dead time can be programmed by the resistor, RDT,
as shown in Figure 31. Internally, the voltage on the DT
pin is regulated at 1.4V by the V/I converter and IDT
programs the dead time using RDT. To improve the noise
immunity of the dead time circuit, a sample-and-hold
circuit is internally employed. However, severe noises in
a high-power application can affect the dead time circuit
operation and it is therefore recommended to use a
bypass capacitor of around 10nF in parallel with the RDT.
As a protective measure against abnormal conditions,
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
To minimize the frequency variation while the output
capacitance of the opto-transistor is charged up, softstart is delayed until the CON pin voltage (opto-coupler
transistor voltage) reaches the RT pin voltage. Thus, the
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Functional Description
4.2. Capacitive Sensing Method
The MOSFET drain current can be sensed using an
additional capacitor in parallel with the resonant
capacitor, as shown in Figure 34. While the low-side
switch is turned on, the current, ICB, through CB
introduces VSENSE across RSENSE. The ICB is a fraction of
the transformer primary-side current, Ip, determined by
the current divider with capacitors Cr and CB as:
When VSS reaches VSS_END (4.2V), soft-start ends. Then,
the high threshold of VCT comparator, VTH, is clamped at
VSS_END while VSS keeps increasing until it reaches VSSC
(5V). The soft-start time is given as:
tSS  CSS
2.6
3  105
iCB 
(2)
CB
C
ip  B ip
Cr  C B
Cr
(3)
Generally, 1/100~1/1000 is adequate for the ratio of
CB/Cr. RD is used as a damper for reducing noise
generated by the switching transition. To prevent the
damping resistor from affecting the current divider ratio,
the resistor should be much smaller than the impedance
of CB at the switching frequency, calculated as:
RD 
1
2 f S CB
(4)
Then, VSENSE can be obtained as:
VSense 
CB
Rsensei p
Cr
(5)
Figure 32. Soft-Start Waveforms
4. Current Sensing
FAN7631 employs a negative voltage sensing method to
sense the drain current of the MOSFET. This allows
sensing the current without a leading edge spike caused
by the low-side MOSFET’s driving current. Therefore, the
resistive-sensing method requires only a small RC filter.
The capacitive-sensing method is also available.
4.1. Resistive Sensing Method
The FAN7631 can sense the drain current as a negative
voltage, as shown in Figure 33. An RC filter with a time
constant of 1/30~1/10 of the operating period is typical.
Figure 34. Capacitive Sensing
Figure 33. Resistive Sensing
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
initial switching frequency is not affected by Rmax and is
solely determined as six times the minimum switching
frequency set by Rmin as in Equation (1). The maximum
switching frequency is also internally limited at 600kHz.
The FAN7631 has several self-protective functions:
Overload Protection (OLP), Over-Current Protection
(OCP), level-change OCP, Abnormal Over-Current
Protection (AOCP), Over-Voltage Protection (OVP),
Thermal Shutdown (TSD), Fault Input (FI), and Line
Under-Voltage Lockout (LUVLO or also called brownout).
Level-change OCP, OLP, OCP, OVP, and LUVLO are
Auto-Restart Mode protections while AOCP, TSD, and
fault input are Latch Mode protections.
Once auto-restart protection is triggered, switching is
instantly terminated and the MOSFETs remain off. Then
the FAN7631 keeps attempting to restart after the restart
delay until the protection situation is removed. When a
Latch Mode protection is triggered, the FAN7631 remains
off until LVCC drops to VLR (5V) and then rises above
LVCC,START (12.5V).
Figure 36. Over-Current Protection (OCP)
5.3. Abnormal Over-Current Protection (AOCP)
If the secondary-side rectifier diodes are shorted, a
large current with extremely high di/dt can flow through
the MOSFET before OCP is triggered. AOCP is
triggered with a short blanking time of 50ns, tBAO, when
the sensed voltage drops below -1.10V, terminating the
switching operation. Once the protection is triggered,
VSS is discharged by an internal switch. Since it is a
Latch Mode protection, the protection is reset when
LVCC drops to VLR (5V).
5.1. Overload Protection (OLP)
When the sensed voltage on the CS pin drops below
VOLP (-0.37V) for more than OLP blanking time, tBOL
(200ns), CSS starts to be discharged by sinking current
IOLP. If the sensed voltage on the CS pin does not drop
below VOLP in the next switching cycle, the current on the
SS pin is switched to charging current ISS1, restoring VSS
as illustrated in Figure 35. If the CS pin voltage drops
below VOLP for in next consecutive switching cycle until
CSS voltage, VSS, reaches VSS_START (1.6V); OLP is
triggered and the gate drive signals remain off. Once the
OLP is triggered, FAN7631 repeats charging and
discharging CSS four times, then restarts. The OLP delay,
tOLP, and self auto-restart time, tAR, are given as:
tOLP  CSS
3.4
3  105
t AR  8  CSS
2.6
3 105
(6)
(7)
Figure 37. Abnormal Over-Current Protection (AOCP)
5.4. Level-Change Over-Current Protection (OCP)
Even with soft-start, there can be large overshoot current
for the initial several switching cycles until the resonant
capacitor voltage reaches its steady-state value. To
prevent the startup failure by OCP, the OCP threshold is
changed to VAOCP level while the Latch Mode AOCP is
disabled during soft-start.
Figure 35. Overload Protection (OLP)
5.2. Over-Current Protection (OCP)
When the CS pin voltage drops below VOCP (-0.54V) for
longer than the OCP blanking time, tBO (200ns), OCP is
triggered, terminating switching operation. Then,
FAN7631 repeats charging and discharging CSS four
times before restarting.
Figure 38. Level-Change OCP
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
5. Protection Circuit
6. Simple Remote-On/Off
The power stage can be shut down with Latch Mode or
Auto-Restart Mode, as shown in Figure 41. For the Latch
Mode protection, the FI pin is used, which stops the
switching immediately once the voltage on FI pin is
pulled above VFI (4V) using an opto-coupler. To configure
an external protection with Auto-Restart Mode, an optocoupler can be used on the LS pin. When voltage on the
LS pin is pulled below VLINE (3V), line UVLO is triggered.
When LS pin voltage is pulled HIGH, above 3V,
FAN7631 starts up softly.
5.6. Thermal Shutdown (TSD)
The thermal shutdown function is integrated to detect
abnormal over-temperature, such as abnormal ambient
temperature rising or over-driving of gate drive circuit. If
the junction temperature exceeds TSD (130C), thermal
shutdown is triggered in Latch Mode.
5.7. Line-UVLO
FAN7631 includes a precise line-UVLO (or brownout)
function with programmable hysteresis voltage, as can
be seen in Figure 39. When the line voltage is recovered,
it starts up with soft-start, as shown in Figure 39. A
hysteresis voltage between the start and stop voltage is
programmable by ILINE and external resistor R1. In normal
operation, the comparator’s output is HIGH and ILINE is
disabled ILINE is activated when the comparator’s output
is LOW, introducing hysteresis.
If necessary, CFilter can be used to reduce noise
interference. Generally, hundreds of pico-farad to tens of
nano-farad is adequate depending on the level of noise.
Figure 41. External Protection Circuits
(Top: Latch Mode, Bottom: A/R Mode)
7. Skip Cycle Operation
The FAN7631 provides the pulse-skip function to prevent
the switching frequency from increasing too much at noload condition. Figure 42 shows the internal block
diagram for the control (CON) pin and its external
configuration. The CON pin is typically connected to the
collector terminal of the opto-coupler and the FAN7631
stops switching when the CON pin voltage drops below
0.4V. FAN7631 resumes switching when the CON pin
voltage rises above 0.6V. The frequency that causes
pulse skipping is given as:
Figure 39. Line-UVLO
f SKIP  (
5.8k  4.6k 

) 100kHz
Rmin
Rmax
(9)
Figure 40. Line UVLO Waveforms
The DC link input-voltages for start and stop are
calculated as:
R1  R2
R2
 VDL,STOP  I LINE  R1
VDL,STOP  VLINE 
VDL,START
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
Figure 42. Pulse-Skipping Circuit
(8)
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
5.5. Over-Voltage Protection (OVP)
When the LVCC reaches 23V, OVP is triggered. This
protection is used when auxiliary winding of the
transformer is utilized to supply VCC to the FAN7631.
Figure 43 shows the PCB layout guideline to minimize the usage of jumpers. Good PCB layout improves power system
efficiency and reliability and minimizes EMI. The Power Ground (PG) and Signal Ground (SG) should meet at a single
point. Jumpers should be avoided, especially for the ground trace.
Figure 43. PCB Layout Guideline
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
8. PCB Layout Guideline
Application
Fairchild
Device
Input Voltage Range
Rated Output Power
Output Voltage
(Rated Current)
LCD TV
FAN7631
400V (20ms Hold-Up Time)
192W
24V-8A
Features



High efficiency ( >94% at 400VDC input).
Reduced EMI noise through zero-voltage-switching (ZVS).
Enhanced system reliability with various protection functions.
Figure 44. Typical Application Circuit
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Application Circuit (Half-Bridge LLC Resonant Converter)
Usually, the LLC resonant converter requires large leakage inductance value. To obtain a large leakage inductance,
sectional winding method is used.


Core: EER3542 (Ae=107 mm2)
Bobbin: EER3542 (Horizontal)
2.5mm
15mm
8mm
Np
Ns2
Ns1
Figure 45. Winding Specifications
Table 1. Winding Specifications
Pin (S → F)
Wire
Turns
Winding Method
8→1
0.12φ×30 (Litz Wire)
45
Section Winding
Ns1
12 → 9
0.1φ×100 (Litz Wire)
5
Section Winding
Ns2
16 → 13
0.1φ×100 (Litz Wire)
5
Section Winding
Np
Pin
Specification
Primary-Side Inductance (LP)
1-8
630H ±5%
100kHz, 1V
Primary-Side Effective Leakage (LR)
1-8
145H ±5%.
Short One of the Secondary Windings
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
Remark
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Typical Application Circuit (Continued)
FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
Physical Dimensions
Figure 46. 16-Lead, Small-Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
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FAN7631 — Advanced PFM Controller for Half-Bridge Resonant Converters
© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
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19