SANYO LA7567EV

Ordering number : ENN7779A
SANYO Semiconductors
DATA SHEET
Monolithic Linear IC
LA7567EV
TV and VCR VIF/SIF IF Signal-Processing Circuit
with PAL/NTSC Multi-Format Audio Support
Overview
The LA7567EV is PAL/NTSC multi-format audio VIF/SIF IF ICs that adopt a semi-adjustment-free system. The VIF
block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the
adjustment steps in the manufacturing process. PLL detection is adopted in the FM detector to support multi-format
audio detection. A built-in SIF converter is included to simplify multi-format system designs. A 5V power-supply
voltage is used to match that used in most multimedia systems. In addition, these ICs also include a buzz canceller to
suppress Nyquist buzz and provide high audio quality. The LA7567EV feature improvements over the LA7567N and
LA7567NM in the audio and video signal-to-noise ratios and the video signal.
Functions
• VIF block: VIF amplifier, PLL detector, BNC, RF AGC, EQ amplifier, AFT, IF AGC, buzz canceller.
• First SIF block: first SIF, first SIF detector, AGC.
• SIF block: multi-format SIF converter, limiter amplifier, PLL FM detector.
Features
•
•
•
•
No AFT or SIF coils are required, making these circuits adjustment free.
A PAL/NTSC multi-format audio system can be constructed easily.
Built-in buzz canceller for excellent audio performance.
VCC = 5V, low power dissipation (250mW)
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
VCC max
6
Circuit voltage
V13, V17
VCC
Circuit current
Allowable power dissipation
Operating temperature
V
V
I6
–3
I10
–10
mA
I24
–2
mA
400
mW
Pd max
Ta ≤ 70°C, when mounted on a PCB*
Topr
Storage temperature
Tstg
*: Printed circuit board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board.
mA
–20 to +70
°C
–55 to +150
°C
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
81505MS OT B8-7701 No.7779-1/21
LA7567EV
Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
VCC
Operating supply voltage range
VCC op
Conditions
Ratings
Unit
5
V
4.5 to 5.5
V
Electrical Characteristics at Ta = 25°C, VCC = 5V, fp = 38.9MHz
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
[VIF Block]
Circuit current
I5
Maximum RF AGC voltage
V14H
Minimum RF AGC voltage
V14L
Input sensitivity
AGC range
Maximum allowable input
No-signal video output voltage
Sync. signal tip voltage
Video output level
VI
S1 = OFF
40.8
48.0
VCC – 0.5
VCC
33
55.2
mA
V
0
0.5
V
39
45
dBµV
GR
58
63
dB
VI max
95
100
dBµV
V6
3.0
3.3
3.6
V6 tip
1.05
1.35
1.64
V
V
VO
1.46
1.7
1.94
Vp-p
Black noise threshold voltage
VBTH
0.5
0.8
1.1
V
Black noise clamp voltage
VBCL
1.6
1.9
2.2
V
Video signal-to-noise ratio
S/N
48
52
dB
C-S beat
IC-S
38
43
dB
–3.0
–1.5
Frequency characteristics
fC
Differential gain
DG
6MHz
3.0
6.5
dB
Differential phase
DP
3
5
%
deg
No-signal AFT voltage
V13
2.0
2.5
3.0
Maximum AFT voltage
V13H
4.0
4.4
5.0
V
Minimum AFT voltage
V13L
0
0.18
1.00
V
24
32
AFT detection sensitivity
Sf
VIF input resistance
Ri
38.9MHz
1.5
VIF input capacitance
Ci
38.9MHz
3
APC pull-in range (U)
fpu
APC pull-in range (L)
17
0.7
fpl
V
mV/kHz
kΩ
pF
1.5
MHz
–1.5
–0.9
AFT tolerance frequency 1
dfa1
–450
–50
350
MHz
VCO1 maximum variability range (U)
dfu
1.0
1.5
VCO1 maximum variability range (L)
dfl
–1.5
–1.0
MHz
VCO control sensitivity
B
1.0
2.0
4.0
kHz/mV
Conversion gain
VG
22
28
32
dB
5.5 iMHz output level
SO
32
70
110
mVrms
50
100
kHz
MHz
[First SIF Block]
First SIF maximum input
Si max
First SIF input resistance
Ri (SIF)
33.4MHz
2
mVrms
kΩ
First SIF input capacitance
Ci (SIF)
33.4MHz
3
pF
[SIF Block]
Limiting sensitivity
Vli (lim)
FM detector output voltage *
VO (FM)
AMR rejection ratio
AMR
Total harmonic distortion
THD
SIF S/N
S/N (FM)
5.5MHz ±50kHz
42
48
54
dBµV
570
710
855
mVrms
50
60
0.3
57
dB
0.8
62
%
dB
[SIF Converter]
Conversion gain
Maximum output level
Carrier suppression ratio
Oscillator level
Oscillator leakage
Oscillator stopped current
VG (SIF)
8
11
14
dB
V max
103
109
115
dBµV
VGR (5.5)
15
21
dB
VOSC
35
70
mVp-p
OSCleak
14
25
I4
dB
300
µA
Note: *The FM detector output level can be reduced and the FM dynamic range can be increased by inserting a resistor and a capacitor in series between
pin 23 and ground.
No.7779-2/21
LA7567EV
Package Dimensions
unit : mm
3175C
Pd max -- Ta
Allowable power dissipation, Pd max - mW
500
7.8
0.5
5.6
13
7.6
24
12
1
0.15
0.65
(0.33)
(1.3)
1.5max
0.22
Printed circuit board: 114.3mm × 76.1mm × 1.6mm
glass epoxy board
400
300
200
100
0
--20
0
20
40
60
80
100
ILA07068
0.1
Ambient temperature, Ta - °C
SANYO : SSOP24 (275mil)
Pin Assignment
2nd SIF INPUT
1
24 FM DET OUT
BIAS FILTER
2
23 FM FILTER
MIX OUT
3
22 1st SIF OUT
(NICAM OUT)
CER.OSC
4
21 RF AGC VR
VCC
5
20 GND
VIDEO OUT
6
19 VIF
LA7567EV
EQ FILTER
7
18 VIF
EQ INPUT
8
17 IF AGC FILTER
APC FILTER
9
16 1st SIF AGC FILTER
VIDEO DET OUT 10
15 1st SIF INPUT
VCO COIL 11
14 RF AGC OUT
VCO COIL 12
13 AFT OUT
Top view
ILA06680
No.7779-3/21
LA7567EV
21
20
19
18
100kΩ
30kΩ
0.01µF
0.01µF
0.01µF
1kΩ
13
1kΩ
1kΩ
10kΩ
500Ω
6kΩ
10kΩ
14
2kΩ
30pF
620Ω
15
1kΩ
1kΩ
1kΩ
300Ω
16
2kΩ
1kΩ
17
AFT
OUTPUT
1kΩ
22
100Ω
23
SAW
(S)
2kΩ
24
SAW(P)
0.022µF
+
IF
INPUT
9V
RF AGC
OUTPUT
10kΩ-B
1µF
0.01µF
5.6kΩ
0.01µF
V
400Ω
400Ω
7
8
9
0.47µF
6
200Ω
9.2kΩ
5
10
11
12
500k
OSC
+
VIDEO
OUT
150Ω
+
3kΩ
330Ω
4
68Ω
3
0.01µF
BPF
6MHz
1kΩ 2kΩ
1V
200Ω
2
1.2kΩ
V
100µF
1
V
3kΩ 10kΩ
1kΩ
1.2kΩ
1kΩ 1kΩ
0.47 to 1µF
AUDIO
OUTPUT
RFAGC
VR
100kΩ
Internal Equivalent Circuit and External Components
330Ω
VCO
COIL
VCC
GND
ILA06681
No.7779-4/21
LA7567EV
AC Characteristics Test Circuit
23
22
21
20
RF
AGC
FM
DET
19
17
16
VIF
AMP
IF
AGC
15
14
RF AGC
OUT
(F)
100kΩ
1000pF
0.01µF
0.01µF
0.01µF
(M)
18
9V
100kΩ
24
GND
0.01µF
1µF
+
IF AGC
0.01µF
(M)
0.01µF
5.6kΩ
10kΩ-B
FMDETOUT
(D)
0.01µF
RFAGC
VR
51Ω
0.01µF
51Ω
30kΩ
1stSIFIN
VIFIN
1stSIFOUT
(NICAMOUT)
13
AFT
OUT
(B)
1st
AMP
AGC
VIDEO
DET
1st
DET
AFT
HPF
LIM
AMP
HPF
MIX
HPF
6
8
9
1.5kΩ
100kΩ
150Ω
+
0.01µF
S1
68Ω
+
7
10
12
24pF
330Ω
VIDEO
OUT
(A)
CONV.OUT
(E)
11
0.47µF
5
VCO
560Ω
2ndSIFIN
4
500kHz
+
1µF
51Ω
3
S2 10kΩ
2
0.01µF
1
EQ
AMP
VCC
GND
ILA06682
Test Circuit
Impedance
analyzer
19
0.01µF
0.01µF
0.01µF
18
17
16
15
14
13
8
9
10
11
12
100kΩ
20
0.01µF
0.01µF
21
100kΩ
22
0.01µF
23
10kΩ
0.01µF
0.01µF
0.01µF
24
0.01µF
1st SIF IN
VIF IN
LA7567EV
5
6
7
100µF
330Ω
4
0.01µF
3
10kΩ
2
0.01µF
1
+
VCC
ILA06683
No.7779-5/21
LA7567EV
Test Conditions
V1. Circuit current . . . . . . . . . . . . [I5]
(1)
(2)
(3)
(4)
Internal AGC
Input a 38.9MHz 10mVrms continuous wave to the VIF input pin.
RF AGC Vr MAX
Connect an ammeter to the VCC and measure the incoming current.
V2.V3. Maximum RF AGC voltage, Minimum RF AGC voltage . . . . . . [V14H, V14L]
(1)
(2)
(3)
(4)
Internal AGC
Input a 38.9MHz 10mVrms continuous wave to the VIF input pin.
Adjust the RF AGC Vr (resistor value max.) and measure the maximum RF AGC voltage. (F)
Adjust the RF AGC Vr (resistor value min.) and measure the minimum RF AGC voltage. (F)
V4. Input sensitivity. . . . . . . . . . . . . . . . . . . . . . . . [Vi]
(1)
(2)
(3)
(4)
Internal AGC
fp = 38.9MHz 400Hz 40% AM (VIF input)
Turn off the S1 and put 100kΩ through.
VIF input level at which the 400Hz detection output level at test point A becomes 0.64Vp-p.
V5. AGC range . . . . . . . . . . . . . . . . . . . . . . . . . . . . [GR]
(1) Apply the VCC voltage to the external AGC IF AGC (pin 17).
(2) In the same manner as for the V4 (input sensitivity),measure the VIF input level at which the detection output
level becomes 0.64Vp-p .............Vi1.
(3) GR = 20log
Vi1
dB
Vi
V6. Maximum allowable input. . . . . . . . . . . . . . . . [VI max]
(1) Internal AGC
(2) fp = 38.9MHz 15kHz 78% AM (VIF input)
(3) VIF input level at which the detection output level at test point A is video output (Vo) ±1dB
V7. No-signal video output voltage . . . . . . . . . . . [V6]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 17).
(2) Measure the DC voltage of VIDEO output (A).
V8. Sync. signal tip voltage . . . . . . . . . . . . . . . . . [V6tip]
(1) Internal AGC
(2) Input a 38.9MHz 10mVrms continuous wave to the VIF input pin.
(3) Measure the DC voltage of VIDEO output (A).
V9. Video output level . . . . . . . . . . . . . . . . . . . . . . [VO]
(1) Internal AGC
(2) fp = 38.9MHz 15kHz 78% AM Vi = 10mVrms (VIF input)
(3) Measure the peak value of the detection output level at test point A. . . . . . . . Vp-p
No.7779-6/21
LA7567EV
V10.V11. Black noise threshold level and clamp voltage . . . . . . [VBTH, VBCL]
(1) Apply DC voltage to the external AGC, IF AGC (pin 17) and adjust the voltage.
(2) fp = 38.9MHz 400Hz 40% AM10mVrms (VIF input)
(3) Adjust the IF AGC (pin 17) voltage to operate the noise canceller.
Measure the VBTH, VBCL at test point A.
VBCL
Video output
(V)
VBTH
Time
V12. Video S/N . . . . . . . . . . . . . . . . . . . . . . . . . . . . [S/N]
(1) Internal AGC
(2) fp = 38.9MHz CW = 10mVrms (VIF input)
(3) Measure the noise voltage at test point A in RMS volts through a 10kHz to 4MHz band-pass filter.
Noise voltage (N)
(4) S/N = 20 log
Video portion (Vp-p)
1.12Vp-p
= 20 log
(dB)
Noise voltage (Vrms)
Noise voltage (Vrms)
V13. C/S beat . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [ICS]
(1) Apply DC voltage to the external AGC IF AGC (pin 17) and adjust the voltage.
(2) fp = 38.9MHz CW;10mVrms
fc = 34.47MHz CW;10mVrms-10dB
fs = 33.4MHz CW;10mVrms-10dB
(3) Adjust the IF AGC (pin 17) voltage so that the output level at test point A becomes 1.3Vp-p.
(4) Measure the difference between the levels at 4.43MHz and 1.07MHz.
C/S beat
Output
(dB)
1.07MHz
4.43M 5.5M
Frequency(MHz)
V14. Frequency characteristics . . . . . . . . . . . . . . [fc]
(1) Apply DC voltage to the external AGC IF AGC (pin 17) and adjust the voltage.
(2) SG1: 38.9MHz continuous wave 10mVrms
SG2: 38.8MHz to 32.9MHz continuous wave 2mVrms
Add the SG1 and SG2 signals using a T pat and adjust each SG signal level so that the above-mentioned levels
are reached and input the added signals to the VIF IN.
(3) First set the SG2 frequency to 38.8MHz, and then adjust the IF AGC voltage (V17) so that the output level at test
point A becomes 0.5Vp-p.........V1
(4) Set the SG2 frequency to 32.9MHz and measure the output level..........V2
V2
(5) Calculate as follows:
fc = 20log
(dB)
V1
No.7779-7/21
LA7567EV
V15.V16. Differential gain, differential phase . . . [DG, DP]
(1) Internal AGC
(2) fp = 38.9MHz ALP50% 87.5% modulation video signal Vi = 10mVrms
(3) Measure the DG and DP at test point A
V17. No signal AFT voltage . . . . . . . . . . . . . . . . . [V13]
(1) Internal AGC
(2) Measure the DC voltage at the AFT output (B).
V18.V19.V20. Maximum minimum AFT output voltage, AFT detection sensitivity . . . . [V13H, V13L, Sf]
(1)
(2)
(3)
(4)
Internal AGC
fp = 38.9MHz ±1.5MHz Sweep = 10mVrms (VIF input)
Maximum voltage: V13H, minimum voltage: V13L
Measure the frequency deviation at which the voltage at test point B changes from V1 to V2.
..........∆f
Sf =
2000(mV)
mV/kHz
∆f (kHz)
∆f
AFT
output
(V)
V13H
V1 ; 3.5V
V2 ; 1.5V
V13L
IF frequency (MHz)
V21.V22. VIF input resistance, Input capacitance . . . . . . . . . . [Ri, Ci]
(1) Referring to the input impedance Test Circuit, measure Ri and Ci with an impedance analyzer.
V23.V24. APC pull-in range. . . . . . . . . . . . . . . . . . [fpu, fpl]
(1) Internal AGC
(2) fp = 33MHz to 44MHz continuous wave; 10mVrms
(3) Adjust the SG signal frequency to be higher than fp = 38.9MHz to bring the PLL to unlocked state.
Note: GThe PLL is assumed to be in unlocked state when a beat signal appears at test point A.
(4) When the SG signal frequency is lowered, the PLL is brought to locked state again. ...........(f1)
(5) Lower the SG signal frequency to bring the PLL to unlocked state.
(6) When the SG signal frequency is raised, the PLL is brought to locked state again. ...........(f2)
(7) Calculate as follows:
fpu = f1 - 38.9MHz
fpl = f2 - 38.9MHz
V25. AFT tolerance frequency . . . . . . . . . . . . . . . [∆Fa1]
(1) Internal AGC
(2) SG1:37.9MHz to 40.9MHz variable continuous wave 10mVrmns
(3) Adjust the SG1 signal frequency so that the AFT output DC voltage (test point B) becomes
2.5V; that SG1 signal frequency is f1.
(4) External AGC (Adjust the V17.)
(5) Apply 5V to the IFAGC (pin 17) and then pick up the VCO oscillation frequency from GND, etc. and measure
the frequency (f2)
(6) Calculate as follows:
AFT tolerance frequency ∆Fa1 = f2 - f1(kHz)
No.7779-8/21
LA7567EV
V26.V27. VCO Maximum variable range (U, L) . . [dfu, dfl]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 17).
(2) Pick up the VCO oscillation frequency from the VIDEO output (A), GND, etc. and adjust the VCO coil so coil
that the frequency becomes 38.9MHz.
(3) fl is taken as the frequency when 1V is applied to the APC pin (pin 9). In the same manner,
fu is taken as the frequency when 5V is applied to the APC pin (pin 9).
dfu = fu - 38.9MHz
dfl = fl - 38.9MHz
V28. VCO control sensitivity. . . . . . . . . . . . . . . . . [β]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 17).
(2) Pick up the VCO oscillation frequency from the VIDEO output (A), GND, etc. and adjust the VCO coil so that
the frequency becomes 38.9MHz.
(3) f1 is taken as the frequency when 3.0V applied to the APC pin (pin 9). In the same manner,
f2 is taken as the frequency when 3.4V is applied to the APC pin (pin 9).
β =
f2 – f1
400
( kHz mV )
F1. First SIF conversion gain . . . . . . . . . . . . . . . . [VG]
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV (VIF input)
fs = 33.4MHz CW; 500µV (First SIF input) . . . . V1
(3) Detection output level at test point C (Vrms) . . . . V2 (5.5MHz)
(4) VG = 20log
V2
dB
V1
F2. 5.5MHz output level. . . . . . . . . . . . . . . . . . . . . [SO]
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV (VIF input)
fs = 33.4MHz CW; 10mV (First SIF input) . . . . . . . . . . . . . . . . . V1
(3) Detection output level at test point C (5.5MHz) . . . . . . . . . . . . . . SO(mVrms)
F3. 1st SIF maximum input . . . . . . . . . . . . . . . . . . [Si max]
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV (VIF input)
fs = 33.4MHz CW; variable (First SIF input)
(3) Input level at which the detection output at test point C (5.5MHz) becomes So ±2dB......Si max
F4. F5. First SIF input resistance, input capacitance . . . . [Ri(SIF1), Ci(SIF1)]
(1) Using an input analyzer, measure Ri and Ci in the input impedance measuring circuit.
No.7779-9/21
LA7567EV
S1. SIF limiting sensitivity . . . . . . . . . . . . . . . . . . [Vli(lim)]
(1)
(2)
(3)
(4)
Apply the VCC voltage to the external AGC, IF AGC (pin 17).
fs = 5.5MHz fm = 400Hz ∆F = ±30kHz (SIF input)
Set the SIF input level to 100mVrms and then measure the level at test point D.......V1
Lower the SIF input level until V1-3dB occurs. Measure the input level at that moment.
S2–5. S7–10. FM detection output voltage, distortion factor . . . . . . [VO(FM, THD]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 17).
(2) fs = 4.5MHz fm = 1kHz ∆F = ±25kHz, fs = 5.5MHz or 6.0MHz fm = 1kHz ∆F = ±50kHz,
(SIF input Vi = 100mVrms)
(3) Assign the level at test point D to the FM detection output voltage and measure the distortion factor.
S3. AM rejection ratio . . . . . . . . . . . . . . . . . . . . . . [AMR]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 17).
(2) fs = 5.5MHz fm = 400Hz AM = 30%
(SIF input Vi=100mVrms)
(3) Measure the output level at test point D............VAM
VO(DET)
(4) AMR = 20log
VAM
dB
S5. SIF S/N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [S/N]
(1) External AGC (V17 = VCC)
(2) fs = 5.5MHz NO MOD Vi = 100mVrms
(3) Measure the output level at test point D...........Vn
(4) S/N = 20log
VO(DET)
Vn
dB
C1. Converter conversion gain . . . . . . . . . . . . . . VG(SIF)
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV (VIF input)
fs = 33.4MHz CW; 316µV (First SIF input)
(3) Measure the 6MHz component at test point E (MIX output). ...................V1
(4) Measure the 5.5MHz component at test point F (NICAM output). ...........V2
(5) VG mix = 20log
V1
dB
V2
C2. SIF converter maximum output level . . . . . . [Vmax]
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV (VIF input)
fs = 33.4MHz CW; 10mV (First SIF input)
(3) Measure the 6MHz component at test point E (MIX output). .........Vmax(dBµV)
C3. Carrier suppression ratio (VGR(5.5))
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV (VIF input)
fs = 33.4MHz CW; 316µV (First SIF input)
(3) Measure the 6MHz component at test point E (MIX output). .........V6 (dBµV)
(4) Measure the 5.5MHz component at test point E (MIX output). ......V5.5 (dBµV)
(5) Perform the following calculation.
Carrier suppression ratio VGR(5.5)(dB) = V6 - V5.5
No.7779-10/21
LA7567EV
C5. OSC leakage (OSC leak)
(1) Internal AGC
(2) fp = 38.9MHz CW; 10mV(VIF input)
fs = 33.4MHz CW; 316µV(First SIF input)
(3) Measure the 6MHz component at test point E (MIX output). ..........V6(dBµV)
(4) Measure the 500kHz component at test point E (MIX output). .......V0.5(dBµV)
(5) Perform the following calculation.
Carrier suppression ratio OSCleak(dB)=V6 - V0.5
Note 1)
Note 2)
Unless otherwise specified for VIF test, apply the VCC voltage to the IF AGC and adjust the VCO coil so
that oscillation occurs at 38.9MHz.
Unless otherwise specified, the SW1 must be ON.
No.7779-11/21
LA7567EV
Application Circuit Diagrams
PAL SPLIT
IN PUT
22
21
20
RF
AGC
FM
DET
19
18
0.01µF
(M)
0.022µF
10kΩ-B
23
17
VIF
AMP
IF
AGC
16
15
14
13
100kΩ
24
SAW(P)
GND
+
1µF
5.1kΩ
(M)
0.01µF
AF OUT
9V
30kΩ
0.01µF
1000pF
RF AGC
OUT
100kΩ
SAW
(S)
TSF5315
AFT
OUT
1st
AMP
AGC
VIDEO
DET
1st
DET
AFT
HPF
LIM
AMP
HPF
MIX
HPF
BPF
7
8
9
150Ω
+
330Ω
10
11
12
560Ω
6
0.01µF
5
VCO
0.47µF
4
3
+
100µF
2
68Ω
1
EQ
AMP
15µH
2.2kΩ
330Ω
VCC
GND
VIDEO
OUT
ILA06684
NT (US) SPLIT
IN PUT
23
22
21
20
RF
AGC
FM
DET
(M)
0.022µF
10kΩ-B
1µF
(M)
0.01µF
24
1µH
1kΩ
19
18
0.01µF
GND
+
17
VIF
AMP
IF
AGC
16
15
14
13
100kΩ
SAW(P)
7.5kΩ
AFT
OUT
1st
AMP
AGC
VIDEO
DET
1st
DET
AFT
HPF
LIM
AMP
HPF
330Ω
6
7
8
9
10
11
12
560Ω
5
+
0.47µF
1µF
BPF
4
VCO
150Ω
3
0.01µF
2
+
100µF
1
EQ
AMP
15µH
330Ω
2.2kΩ
MIX
HPF
10kΩ
AF OUT
9V
30kΩ
0.01µF
1000pF
RF AGC
OUT
100kΩ
SAW
(S)
TSF1241
VCC
GND
VIDEO
OUT
ILA06685
No.7779-12/21
LA7567EV
JAPAN SPLIT
IN PUT
22
21
20
RF
AGC
FM
DET
19
18
17
0.01µF
1000pF
16
VIF
AMP
IF
AGC
15
14
AFT
OUT
100kΩ
23
1kΩ
0.01µF
10kΩ-B
1µF
(M)
0.01µF
24
SAW(P)
GND
+
(M)
0.022µF
7.5kΩ
AF OUT
9V
RF AGC 30kΩ
OUT
100kΩ
SAW
(S)
TSF1137
13
1st
AMP
AGC
VIDEO
DET
1st
DET
AFT
HPF
LIM
AMP
HPF
MIX
HPF
BPF
6
7
8
9
+
10
330Ω
11
12
560Ω
1µF
10kΩ
5
0.47µF
4
150Ω
3
VCO
0.01µF
2
+
100µF
1
EQ
AMP
15µH
330Ω
2.2kΩ
VCC
GND
VIDEO
OUT
ILA06686
NT (US) INTER
23
10kΩ-B
22
21
20
RF
AGC
FM
DET
0.01µF
1000pF
SAW(P)
19
18
17
VIF
AMP
IF
AGC
16
15
14
13
100kΩ
24
GND
(M)
0.022µF
62pF 22µH
1µF
+
(M)
0.01µF
AFT
OUT
1st
AMP
AGC
VIDEO
DET
1st
DET
AFT
* INTER
16PIN
GND
HPF
LIM
AMP
HPF
BPF
330Ω
7
8
9
10
11
12
560Ω
6
0.47µF
5
+
VCO
150Ω
4
0.01µF
3
+
100µF
2
100kΩ
1
EQ
AMP
15µH
330Ω
2.2kΩ
MIX
HPF
1µF
AF OUT
7.5kΩ
9V
RF AGC 30kΩ
OUT
100kΩ
IN PUT
TSF5220
VCC
GND
VIDEO
OUT
ILA06687
No.7779-13/21
LA7567EV
Sample Application Circuit
When the SIF, first SIF, AFT, and RF AGC circuits are not used:
• When the SIF circuit is not used:
Leave pins 1, 23, and 24 open.
Connect pin 2 to ground through a 2kΩ resistor.
• When the first SIF circuit is not used:
Leave pins 3, 4, 15 and 22 open.
Connect pin 16 to ground.
• When the AFT circuit is not used:
Since there is no way to defeat the AFT circuit, connect a 100kΩ resistor and a 0.01µF capacitor in parallel between
pin 13 and ground.
• When the RF AGC circuit is not used:
Leave pins 14 and 21 open.
Insert a 0.01µF capacitor between pin 21 and ground for oscillation prevention.
IN PUT
SAW
(S)
SAW(P)
(M)
GND
1kΩ
24
23
22
21
20
RF
AGC
FM
DET
100kΩ
TSF5315
19
18
17
VIF
AMP
IF
AGC
16
15
14
AFT
OUT
13
1st
AMP
AGC
VIDEO
DET
1st
DET
AFT
HPF
LIM
AMP
HPF
7
8
9
10
11
12
560Ω
6
0.47µF
5
+
VCO
150Ω
4
0.01µF
3
100µF
2
2kΩ
1
EQ
AMP
15µH
330Ω
2.2kΩ
MIX
HPF
VCC
GND
VIDEO
OUT
ILA06688
No.7779-14/21
LA7567EV
Pin Functions
Pin No.
1
Pin
SIF INPUT
Description
Equivalent circuit
• SIF input. The input impedance is about 1kΩ. Since
buzzing and buzz beating can occur if interference enters
this input pin, care must be taken when design the pattern
layout for this pin. Note that the video and chrominance
signals are especially likely to interfere with the audio
signal. Also, the VIF carrier signal can also cause
interference.
1
1kΩ
1kΩ
ILA06689
24kΩ
4.2V
2
FM power supply filter
4kΩ
C1
TO VCO BIAS
14kΩ
2
• FM detector bias line filter input. Used to improve the FM
detector signal-to-noise ratio.
C1 should be at least 0.47µF, and 1µF is recommended.
If the FM detector is not used, connect pin 2 to ground
through a 2kΩ resistor. This stops the FM detector VCO.
ILA06690
3
4
SIF converter
• Pin 3 is the SIF converter output. The signal is passed
through a 6MHz bandpass filter and input to the SIF circuit.
There is a 200Ω resistor in series with the emitter-follower
output.
• Pin 4 is the SIF converter 500kHz oscillator connection.
Since this oscillator circuit includes an ALC, the oscillator
level is held fixed at a low level. If this circuit is not used,
connect pin 4 to ground through a 10kΩ external resistor.
Providing this external resistor stops the 500kHz oscillator
and allows the converter to be used as an amplifier.
• When this circuit is used with an intercarrier, the buzz
characteristics can be improved by changing the value of
the resistor connected between pin 4and ground to 100kΩ.
200Ω
ILA06713
500kHz
68Ω
3
4
400Ω
4(R)
ILA06691
5
VCC
• Use the shortest distance possible when decoupling VCC
and ground.
Continued on next page.
No.7779-15/21
LA7567EV
Continued from preceding page.
Pin No.
Pin
Description
Equivalent circuit
• Equalizer circuit. This circuit is used to correct the video
signal frequency characteristics.
Pin 8 is the EQ amplifier input. This amplifier amplifies a
1.5Vp-p video signal to 2Vp-p.
2kΩ
6
EQ OUTPUT
9.2kΩ
• Notes on equalizer amplifier design
The equalizer amplifier is designed as a voltage follower
amplifier with a gain of about 2.3dB. When used for
frequency characteristics correction, a capacitor, inductor,
and resistor must be connected in series between pin 7
and ground.
7
C
• Approach used in the equalizer amplifier
If vi is the input signal and vo is the output signal, then:
6
7
8
EQ amp
1kΩ
L =Z
R1
—— +1 (vi + vin) = Vo × G
2
R
ILA06692
Where G is the voltage-follower amplifier gain.
Assume:
vin: Imaginary short
G: About 2.3dB
vin ≈ 0.
Then:
voG
R1
AV = —— = —— +1
vi
Z
• R1 is the IC internal resistance, and is 1kΩ. In the
application design, simply select Z to correspond to the
desired characteristics. However, since the EQ amplifier
gain will be maximum at the resonant point defined by Z,
care is required to assure that distortion does not occur.
EQ INPUT
200Ω
8
AGC
ILA06693
FROM
APC DET
9
APC FILTER
• PLL detector APC filter connection. The APC time constant
is switched internally in the IC. When locked, the VCO is
controlled by loop A and the loop gain is reduced. When
unlocked and during weak field reception, the VCO is
controlled by loop B and the loop gain is increased.
A
1kΩ
1kΩ
1kΩ
For this APC filter we recommend:
R = 150 to 390Ω
C = 0.47µF
B
9
R
+
C
ILA06694
Continued on next page.
No.7779-16/21
LA7567EV
Continued from preceding page.
Pin No.
Pin
Description
Equivalent circuit
2kΩ
Composite video output
• Output for the video signal that includes the SIF carrier.
A resistor must be inserted between pin 10 and ground to
acquire adequate drive capability.
R ≥ 300Ω
15pF
10
2pF
10
ILA06695
11
11
12
VCO tank
12
• VCO tank circuit used for video signal detection.
See the coil specifications provided separately for details
on the tank circuit. This VCO is a vector synthesis VCO.
ILA06696
13
AFT OUTPUT
• AFT output. The AFT center voltage is generated by an
external bleeder resistor. The AFT gain is increased by
increasing the resistance of this external bleeder resistor.
However, this resistor must not exceed 390kΩ.
This circuit includes a control function that controls the AFT
voltage to naturally approach the center voltage during
weak field reception.
13
ILA06697
9V
14
RF AGC OUTPUT
• RF AGC output. This output controls the tuner RF AGC.
A protective 100Ω resistor is inserted in series with the
open collector output. Determine the external bleeder
resistor value in accordance with the specifications of the
tuner.
to tuner
100Ω
14
ILA06698
15
1st SIF INPUT
• First SIF input. A DC cut capacitor must be used in the
input circuit.
• If a SAW filter is used:
The first SIF sensitivity can be increased by inserting an
inductor between the SAW filter and the IC to neutralize the
SAW filter output capacitance and the IC input
capacitance.
2kΩ
2kΩ
• When used in an intercarrier system:
This pin (pin 15) may be left open.
15
ILA06699
Continued on next page.
No.7779-17/21
LA7567EV
Continued from preceding page.
Pin No.
16
Pin
1st SIF AGC FILTER
Description
Equivalent circuit
• First SIF AGC filter connection.
This IC adopts an average value AGC technique. The first
SIF conversion gain is about 30dB, and the AGC range is
over 50dB. A 0.01µF capacitor is normally used in filter
connected to this pin.
• When used in an intercarrier system:
Connect this pin (pin 16) to ground. The IC internal switch
will operate to connect the intercarrier output to the SIF
converter input.
1kΩ
1kΩ
INTER / SPLIT SW
LO=INTER
16
ILA06700
17
IF AGC FILTER
1kΩ
• IF AGC filter connection
The signal peak-detected by the built-in AGC detector is
converted to the AGC voltage at pin 17. Additionally, a
second AGC filter (a lag-lead filter) used to create the dual
time constants is provided internally in the IC.
Use a 0.022µF capacitor as the external capacitor, and
adjust the value according to the sag, AGC speed, and
other characteristics.
17
ILA06701
18
18
19
VIF input
• VIF amplifier input.
The input circuit is a balanced circuit, and the input circuit
constants are:
R ≈ 1.5kΩ
C ≈ 3pF
19
ILA06702
20
GND
Continued on next page.
No.7779-18/21
LA7567EV
Continued from preceding page.
Pin No.
Pin
Description
Equivalent circuit
4.2V
20kΩ
560Ω
RF AGC VR
20kΩ
21
• RF AGC VR connection.
This pin sets the tuner RF AGC operating point. Also, the
FM output and the video output can both be muted at the
same time by connecting this pin to ground.
21
22
20kΩ
• First SIF output.
Internally, this is an emitter-follower output with a 600Ω
resistor attached. When used in an intercarrier system, the
buzz characteristics can be improved by forming a
chrominance carrier trap with this pin.
20kΩ
ILA06703
620Ω
NICAM output
6kΩ
22
Forms a chrominance
killer trap.
22
ILA06704
23
FM filter
• Connection for a filter used to hold the FM detector output
DC voltage fixed. Normally, a 1µF electrolytic capacitor
should be used. The capacitance should be increased if
the low band (around 50Hz) frequency characteristics need
to be improved.
The FM detector output level can be reduced and the FM
dynamic range can be increased by inserting a resistor and
a capacitor in series between pin 23 and ground.
1kΩ
1kΩ
23
R
+
C
ILA06706
FM Detector output
300Ω
R2
24
C
R1
10kΩ
24
• Audio FM detector output. A 300Ω resister is inserted in
series with an emitter-follower output.
• For applications that support stereo:
Applications that input this signal to a stereo decoder may
find that the input impedance is reduced, the left and right
signals are distorted, and that the stereo characteristics are
degraded. If this problem occurs, add a resistor between
pin 24 and ground.
R1 ≥ 5.1kΩ
• For applications that support mono:
Create an external deemphasis circuit.
t = C × R2
ILA06707
No.7779-19/21
LA7567EV
Notes on Sanyo SAW Filters
There are two types of SAW filters, which differ in the piezoelectric substrate material, as follows:
• Lithium tantalate (LiTaO3) SAW filter
TSF11■
■ ■ ... Japan
TSF12■
■ ■ ... US
Although lithium tantalate SAW filters have the low temperature coefficient of –18ppm/°C, they suffer from a large
insertion loss. However, it is possible, at the cost of increasing the number of external components required, to
minimize this insertion loss by using a matching circuit consisting of coils and other components at the SAW filter
output. At the same time as minimizing insertion loss, this technique also allows the frequency characteristics, level,
and other aspects to be varied, and thus provides increased circuit design flexibility. Also, since the SAW filter
reflected wave level is minimal, the circuit can be designed with a small in-band ripple level.
• Lithium niobate (LiNbO3) SAW filter
TSF52■
■ ■ ... US
TSF53■
■ ■ ... PAL
Although lithium niobate SAW filters have the high temperature coefficient of –72ppm/°C, they feature an insertion
loss about 10dB lower than that of lithium tantalate SAW filters. Accordingly, there is no need for a matching circuit
at the SAW filter output. Although the in-band ripple is somewhat larger than with lithium tantalate SAW filters,
since they have a low impedance and a small field slew, they are relatively immune to influences from peripheral
circuit components and the geometry of the printed circuit board pattern. This allows stable out-of-band trap
characteristics to be acquired. Due to the above considerations, lithium tantalate SAW filters are used in applications
for the US and Japan that have a high IF frequency, and lithium niobate SAW filters are used in PAL and US
applications that have a low IF frequency.
Notes on SAW Filter Matching
In SAW filter input circuit matching, rather than matching the IF frequency, flatter video band characteristics can be
acquired by designing the tuning point to be in the vicinity of the audio carrier rather than near the chrominance
carrier. The situation shown in figure on the right makes it easier to acquire flat band characteristics than that in figure
on the left.
SAW filter
characteristics
The high band is reduced
The high band is extended
Frequency
Frequency
With the Tuning Set to the IF frequency
Coil Specifications
With the Tuning Set to the Vicinity of S and C
JAPAN f = 58.75MHz
t=5t
0.12ø
C=24pF
S
ILA06708
US f = 45.75MHz
t=6t
0.12ø
C=24pF
S
PAL f = 38.9MHz
t=7t
0.12ø
C=24pF
S
VCO coil
ILA06709
SAW filter
(SPLIT)
ILA06710
ILA06711
Test production no. V291XCS-3220Z
Toko Co., Ltd.
Test production no. 291XCS-3188Z
Toko Co., Ltd.
Test production no. 292GCS-7538Z
Toko Co., Ltd.
Picture
TSF1137U
Sound
Picture
TSF1241
Sound
Picture
TSF5315
Sound
TSF5220
TSF5221
TSF5321
TSF5344
SAW filter
(INTER)
Toko Co., Ltd.
2-1-17 Higashi-yukigaya, Ohta-ku, Tokyo, Japan
TEL: +81-3-3727-1167
No.7779-20/21
LA7567EV
Notes on VCO Tank Circuits
• Built-in capacitor VCO tank circuits
When the power is turned on, the heat generated by the IC is transmitted through the printed circuit board to the VCO
tank circuit. At this point, the VCO coil frame functions as a heat sink and the IC heat is dissipated. As a result, it
becomes more difficult to transmit heat to the VCO tank circuit's built-in capacitor, and the influence of drift at power
on is reduced. Therefore, it suffices to design the circuit so that the coil and capacitor thermal characteristics cancel.
Ideally, it is better to use a coil with a core material that has low temperature coefficient characteristics.
• External capacitor VCO tank circuits
When an external capacitor is used, heat generated by the IC is transmitted through the printed circuit board directly
to the VCO tank circuit external capacitor. While this capacitor is heated relatively early after the power is turned on,
the coil is not so influenced as much by this heat, and as a result the power-on drift is increased. Accordingly, a coil
whose core material has low temperature coefficient characteristics must be used. It is also desirable to use a capacitor
with similarly low temperature coefficient characteristics.
Note: Applications that use an external capacitor here must use a chip capacitor. If an ordinary capacitor is used,
problems such as the oscillator frequency changing with the capacitor orientation may occur.
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products(including technical data,services) described or
contained herein are controlled under any of applicable local export control laws and regulations,
such products must not be expor ted without obtaining the expor t license from the authorities
concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of August, 2005. Specifications and information herein are subject to
change without notice.
No.7779-21/21