STK850 N-CHANNEL 30V - 0.0024 Ω - 30A - PolarPAK™ STripFET™ Power MOSFET General features Type VDSS RDS(on) RDS(on)*Q g PTOT STK850 30V <0.0029Ω 58.8 nC*mΩ 5.2W ■ ULTRA LOW TOP AND BOTTOM JUNCTION TO CASE THERMAL RESISTANCE ■ VERY LOW CAPACITANCES ■ 100% Rg TESTED ■ FULLY INCAPSULATED DIE ■ IN COMPLIANCE WITH THE 2002/95/EC EUROPEAN DIRECTIVE PolarPAK™ Description This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, moreover the double sides cooling package with ultra low junction to case thermal resistance allows to handle higher levels of current. Internal schematic diagram Applications Bottom View ■ HIGH CURRENT VRM ■ SINCHRONOUS RECTIFICATION ■ DC-DC CONVERTERS FOR TELECOM Top View Order codes Sales Type Marking Package Packaging STK850 K850 PolarPAK™ TAPE & REEL February 2006 Rev 3 1/12 www.st.com 12 STK850 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter VDS Drain-Source Voltage (VGS = 0) VGS Gate-Source Voltage Value Unit 30 V ± 16 V ID Note 2 Drain Current (continuous) at TC = 25°C 30 A ID Drain Current (continuous) at TC = 100°C 18.75 A Drain Current (pulsed) 120 A Total Dissipation at TC = 25°C 5.2 W 0.0416 W/°C -55 to 150 °C IDM Note 1 PTOT Note 2 Derating Factor Tj Tstg Table 2. Thermal data Typ. Max Unit Thermal Resistance Junction-amb 20 24 °C/W Rthj-c Note 3 Thermal Resistance Junction-case (Top Drain) 0.8 1 °C/W Rthj-c Note 4 Thermal Resistance Junction-case (Source) 2.2 2.7 °C/W Rthj-amb Note 2 2/12 Operating Junction Temperature Storage Temperature STK850 2 Electrical characteristics Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 3. On/off states Symbol Parameter Test Conditions V(BR)DSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current (VGS = 0) IGSS Gate Body Leakage Current (VDS = 0) VGS = ±16V VGS(th) Gate Threshold Voltage VDS= VGS, ID = 250µA RDS(on) Static Drain-Source On Resistance VGS= 4.5V, ID= 15A Table 4. Symbol gfs Note 5 Ciss Coss Crss Qg Qgs Qgd Table 5. Symbol td(on) tr td(off) tf ID = 250µA, VGS= 0 Min. Typ. Max. 30 V VDS = Max Rating, 1 10 µA µA ±100 nA 2.5 V 0.0024 0.0029 0.0029 0.0035 Ω Ω Typ. Max. Unit VDS = Max Rating,Tc=125°C 1 VGS= 10V, ID= 15A Unit Dynamic Parameter Forward Transconductance Test Conditions Min. VDS =10V, ID = 15A Input Capacitance VDS =25V, f=1 MHz, V GS=0 Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=15V, ID = 30A VGS =4.5V (see Figure 14) 48 S 3150 940 90 pF pF pF 24.5 8 8.2 32.5 nC nC nC Typ. Max. Unit Switching times Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Test Conditions VDD= 15V, ID= 15A, RG=4.7Ω, VGS=4.5V (see Figure 15) VDD=15V, ID= 15A, RG=4.7Ω, VGS=4.5V (see Figure 15) Min. 20 57 ns ns 31 13 ns ns 3/12 STK850 Electrical characteristics Table 6. Source drain diode Symbol Parameter ISD ISDM Note 1 Source-drain Current Source-drain Current (pulsed) VSD Note 5 Forward on Voltage ISD= 15A, VGS=0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD= 30A, di/dt = 100A/µs, VDD=20V, Tj=150°C trr Qrr IRRM Test Conditions (see Figure 15) (1)Pulse width limited by package (2) When mounted on FR-4 board of 1inch2 , 2 oz Cu and ≤ 10sec (3) Steady State (4) Measured at Source pin when the device is mounted on FR-4 board in steady state (5) Pulsed: pulse duration = 300µs, duty cycle 1.5% PolarPAK is SILICONIX Trademark 4/12 Min. Typ. 39 39.8 2 Max. Unit 30 120 A A 1.2 V ns nC A STK850 2.1 Electrical characteristics Electrical characteristics (curves) Figure 1. Safe Operating Area Figure 2. Thermal Impedance Figure 3. Output Characteristics Figure 4. Transfer Characteristics Figure 5. Transconductance Figure 6. Static Drain-source on Resistance 5/12 STK850 Electrical characteristics Figure 7. Gate Charge Figure 9. Normalized Gate Threshold Voltage Figure 10. Normalized On Resistance vs vs Temperature Temperature Figure 11. Source-drain Diode Forward Characteristics 6/12 Figure 8. Capacitance Variations Figure 12. Normalized BVDSS vs Temperature STK850 3 Test circuits Test circuits Figure 13. Switching Times Test Circuit For Resistive Load Figure 14. Gate Charge Test Circuit Figure 15. Test Circuit For Inductive Load Switching and Diode Recovery Times 7/12 Package mechanical data 4 STK850 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 8/12 STK850 Table 7. Package mechanical data PolarPAK (Option L) mechanical data Ref Dimensions Millimiters A Inches Min. Typ. Max. Min. Typ. Max. 0.75 0.80 0.85 0.030 0.031 0.033 A1 0.05 0.002 b1 0.48 0.58 0.68 0.019 0.023 0.027 b2 0.41 0.51 0.61 0.016 0.020 0.024 b3 2.19 2.29 2.39 0.086 0.090 0.094 b4 0.89 1.04 1.19 0.035 0.041 0.047 b5 0.23 0.33 0.43 0.009 0.013 0.017 c 0.20 0.25 0.30 0.008 0.010 0.012 D 6 6.15 6.30 0.236 0.242 0.248 D1 5.74 5.89 6.04 2.226 2.232 0.238 E 5.01 5.16 5.31 0.197 0.203 0.209 E1 4.75 4.90 5.05 0.187 0.193 0.199 H1 0.23 H2 0.45 H3 0.31 H4 0.45 K1 4.22 K2 1.08 K3 1.37 0.054 K4 0.24 0.009 M1 4.30 4.50 4.70 M2 3.43 3.58 3.73 M3 0.22 0.009 M4 0.05 0.002 P1 0.15 0.20 0.25 T1 3.48 3.64 T2 0.56 0.76 T3 1.20 0.051 T4 3.90 0.154 T5 < 0° 0.009 0.56 0.020 0.51 0.012 0.56 0.020 4.37 4.52 0.166 0.172 0.178 1.13 1.18 0.043 0.044 0.046 0.169 0.177 0.185 0.135 0.141 0.147 0.006 0.008 0.010 4.10 0.137 0.143 0.150 0.95 0.022 0.030 0.037 0.007 0.014 10° 12° 0.41 0.18 0.36 10° 12° 0° 0.022 0.016 0.020 0.022 9/12 Package mechanical data Figure 16. Package dimentions plus footprint 10/12 STK850 STK850 5 Revision History Revision History Date Revision Changes 10-Nov-2005 1 First version 19-Dec-2005 2 Complete version 02-Feb-2006 3 Modified description on first page, mechanical data updated 11/12 STK850 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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