STS8NFS30L N - CHANNEL 30V - 0.018Ω - 8A S0-8 MOSFET PLUS SCHOTTKY RECTIFIER STripFET MAIN PRODUCT CHARACTERISTICS MOSFET V DSS R DS(on ) 30 V <0.022 Ω 8 A SCHOTTKY IF (A V) V RRM V F(M AX) 3 A 30 V 0.51 V ID SO-8 DESCRIPTION: This product associates the latest low voltage StripFET in n-channel version to a low drop Schottky diode. Such configuration is extremely versatile in implementing, a large variety of DCDC converters for printers, portable equipment, and cellular phones. INTERNAL SCHEMATIC DIAGRAM MOSFET ABSOLUTE MAXIMUM RATINGS Symbol VDS Parameter Drain-source Voltage (VGS = 0) V DGR Drain- gate Voltage (RGS = 20 kΩ) V GS Gate-source Voltage o Valu e Unit 30 V 30 V ± 20 V ID Drain Current (continuous) at Tc = 25 C 8 A ID o 5 A IDM(•) P t ot Drain Current (continuous) at Tc = 100 C Drain Current (pulsed) 32 A Total Dissipation at Tc = 25 o C 2.5 W SCHOTTKY ABSOLUTE MAXIMUM RATINGS Symb ol V RRM I F(RMS) Parameter Valu e Un it Repetitive Peak Reverse Voltage 30 V RMS Forward Current 20 A I F (AV) Average F orward Current T L=125 o C δ =0.5 3 A I FSM Surge Non Repetitive Forward Current tp= 10 ms Sinusoidal 75 A I RSM Non Repetitive Peak Reverse Current tp=100 µs 1 A dv/dt Critical Rate Of Rise Of Reverse Voltage 10000 V/µs (•) Pulse width limited by safe operating area December 1999 1/8 STS8NFS30L THERMAL DATA R thj -amb R thj -amb T s tg Tj (*) Thermal Resistance Junction-ambient MOSFET (*) Thermal Resistance Junction-ambientSCHOT TKY Storage T emperature Range Maximum Junction Temperature (*) mounte d on FR-4 board (ste ady stat e) o 50 100 -65 to 150 150 o C/W C/W o C o C MOSFET ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) Min. V GS = 0 Typ. Max. 30 Unit V o T c = 125 C V GS = ± 20 V 1 10 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On Resistance V GS = 10V V GS = 4.5V I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. Typ. Max. Unit 1 1.6 2.5 V 0.018 0.021 0.022 0.026 Ω Ω ID = 4 A ID = 4 A 8 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =4 A V GS = 0 Min. Typ. Max. Unit 10 S 1050 250 85 pF pF pF STS8NFS30L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions t d(on) tr Turn-on Delay T ime Rise Time V DD = 15 V ID = 4 A R G = 4.7 Ω V GS = 4.5 V (Resistive Load, see fig. 3) Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V ID = 8 A Min. Typ. Max. 22 60 V GS = 4.5 V Unit ns ns 17.5 4 7 23 nC nC nC Typ. Max. Unit SWITCHING OFF Symbo l Parameter Test Con ditions Min. t d(of f) tf Turn-off Delay T ime Fall T ime V DD = 15 V ID = 4 A V GS = 4.5 V R G = 4.7 Ω (Resistive Load, see fig. 3) 42 10 ns ns tr (Voff) tf tc Off-voltage Rise T ime Fall T ime Cross-over Time V DD = 24 V ID = 8 A V GS = 4.5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) 11 12 25 ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions Min. ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 8 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 8 A di/dt = 100 A/µs T j = 150 o C V DD = 20 V (see test circuit, figure 5) t rr Q rr I RRM Typ. V GS = 0 Max. Unit 8 32 A A 2 V 50 ns 40 nC 1.6 Α (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area SCHOTTCKY STATIC ELETTRICAL CHARACTERISTICS Symbo l I R (∗) V F(∗) Parameter Test Con ditions o Min. Typ. Max. Unit Reversed Leakage Current T J= 25 C T J= 125 oC V R =30V V R=30V 0.03 0.2 100 mA mA Forward Voltage drop T J= 25 oC o T J= 125 C I F =3A I F =3A 0.38 0.51 0.46 V V 3/8 STS8NFS30L Safe Operating Area Thermal Impedance Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/8 STS8NFS30L Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STS8NFS30L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STS8NFS30L SO-8 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M S 0.6 0.023 8 (max.) 0016023 7/8 STS8NFS30L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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